Chapter: Memory Management

Memory
 Memory
Computer has 2 types of memory:
a) Main Memory: temporarily stores data and instructions
executed by the computer. CPU retrieve instructions from
main memory and executes it.

b) Secondary Memory: directly is not accessed by CPU. It is

an external storage.
 Address Binding
Address Binding: Assigning an address to data or
instruction.

Address binding is a process of generating address where the

data/instruction is to be stored in memory.

3 types of address binding:

1. Compile time binding

2. Load time binding
3. Run time binding
 Address Binding
Address Binding: Fixing a physical address to the logical
address of a process address space

Compile time binding: it is known to compiler at compile time

where a program will reside in physical memory (Main
Mem.)

Load time binding: if program location in memory is unknown

until run-time.

Execution/Run time binding: If the process can be moved

during its execution from one memory segment to another,
then binding must be delayed until run time. The absolute
addresses are generated by hardware.
 Address Space of process
•Make sure that each process has a separate memory space.

•Separate per-process memory space protects the processes

from each other.

•To separate memory spaces, we need the ability to

determine the range of legal addresses that the process
may access and to ensure that the process can access only
these legal addresses.
 Address Space of process
We can provide this protection
by using two registers, usually a
base and a limit

Base register holds the smallest

legal physical memory address

Limit register specifies the size

of the range.
e.g. For example, if the base register
holds 300040 and the limit register is
120900, then the program can legally
access all addresses from 300040
through 420939 (inclusive)
 Protection

Protection of memory space is accomplished by having the

CPU hardware compare every address generated in user
mode with the registers.

Any attempt by a program executing in user mode to

access operating-system memory or other users’ memory
results in a trap to the operating system
 Protection

Base register and limit registers can only be updated by OS

in kernel mode.
 Logical and Physical Address Space
1. Logical Address or Virtual address:
a. The address generated by CPU.
b. Logical address is address of instruction / data as used by
program at some time.

Set of all logical address generated by program is Logical

address space
 Logical and Physical Address Space
2. Physical Address:
a. It is the address used seen by memory management unit
(MMU).
b. It refers to actual location in the main memory.
c. The user can never view physical address of program

Set of all logical address that a process actually occupies is Physical

address space

The logical address is used like a reference, to access the

physical address

MMU is used to map logical and physical addresses.

 Logical and Physical Address Space
•The run-time mapping from logical (virtual) to physical
addresses is done by a hardware device called the memory-
management unit (MMU).

•The base register is now called a relocation register.

•The value in the relocation register is added to every address

generated by a user process at the time the address is sent to
memory.
 Logical and Physical Address Space
•Assume logical addresses (in the range 0 to max) and
physical addresses.

•For User program CPU generates only logical addresses and

thinks that the process runs in locations 0 to max.

•These logical addresses must be mapped to physical

addresses before they are used by MMU
Logical and Physical Address Space
 Swapping
Technique of removing a process from main memory and storing it
into secondary memory, then bringing it back into main memory
for continued execution.

It is a technique used in multiprogramming environments which

have limited memory capacity.

Action of moving process out of main memory is called Swap Out

Action of moving process into main memory is called Swap In

Area on the disk where swapped out process are stored is

known as Swap Space.
 Swapping
During Swap-Out foll.
Things are checked:
While in Main Memory was
user program modified?
Yes: write it back to Sec.
Memory

No: Sec. Memory already has

a copy of it, no need to
write.
Overwrite J3 with new
program. I.e bring new
program
Contiguous File Allocation

Relocation Register contains base address of the process

Partitions
P1 needs 10mb space
P2 needs 30mb space
P3 needs 20mb space
P1 finishes its execution P4 need 25mb
So space is free

Free
P3 finishes its execution P5 require 25Mb space
So space is free
Partition Allocation
One method of allocating contiguous memory is to divide all available
memory into equal sized partitions, and to assign each process
to their own partition.

Partition Allocation
Algorithms:

a) First Fit:
– Checks all partitions
serially
– When partition with size
= or > encounters, it is
allocated for storage.
Partition Allocation Algorithms
b) Best Fit: This approach will check all the free partitions and
will allocate that free partition to a process which leads to
minimum internal fragmentation.

Disadvantage:
1) Complexity is more
2) Overhead to check all the partitions to find best suitable
space

c) Worst Fit: Allocate the largest memory hole

 Fragmentation
1. Internal Fragmentation: memory is allocated in blocks
of a fixed size, whereas the actual memory needed will
rarely be that exact size.
Partition of greater size is allocated to process of small size,
rest of the space of that partition is wasted.
 Fragmentation
External Fragmentation: means that the available memory
is broken up into lots of little pieces, none of which is big
enough to satisfy the next memory requirement, although
the sum total could.
– Due to non utilization of space, even space is empty
Fragmentation
– For Fixed sized partitions
There is:
• Internal Fragmentation
• External Fragmentation

– For Variable sized partitions

There is:
• External Fragmentation
Partition Allocation Table
Contains information of space/ memory used by memory
management module for allocation of memory to a process

a) No. of partitions in main memory

b) Size of each partition
c) Starting location of partition
d) Status of partition (allocated or free)
Memory Allocation - Example

Given 3 free memory partitions of 10KB, 20 KB and 15KB ( in

order) How would each of the first-fit, best- fit and worst fir
algorithms place processes of 15KB, 10KB, 20KB and 5KB (in
order)
Memory Allocation - Example
For 15KB
Memory Allocation - Example
For 10KB
Memory Allocation - Example
For 20KB
Memory Allocation - Example
For 5KB
Memory Allocation - Example
 Overlay
• The main problem in Fixed partitioning is the size of a
process has to be limited by the maximum size of the
partition.
• In order to solve this problem, solution used is called as
Overlays.
• The concept of overlays is that whenever a process is
running it will not use the complete program at the same
time, it will use only some part of it.
• whatever part you required, you load it an once the part
is done, then you just unload it, means just pull it back
and get the new part you required and run it.
 Overlay
• “The process of transferring a block of program code
or other data into internal memory, replacing what is
already stored”.

• overlay is a technique to run a program that is bigger

than the size of the physical memory by keeping only
those instructions and data that are needed at any given
time.Divide the program into modules in such a way that
not all modules need to be in the memory at the same
time.
 Overlay
• Keep only those instructions and data into the memory
that are needed at some time.

• Overlay of instructions or data is needed when process

is larger than amount of memory allocated to it.

• It is implemented by user, No special support is needed

from the OS.

• Complex to implement.
Paging / Paged Memory Management
– Paging is a memory management scheme that allows
processe’s physical memory to be discontinuous, and
eliminates problems with fragmentation by allocating
memory in equal sized blocks known as pages.
Paging
Paging / Paged Memory Management

– Every process is divided in to number of pages

– Memory is divided into partitions whose size is same as page
size : frames
– Each frame has frame no.
– Page size is same as frame size
– Put any page in any free frame
– Paging allows non-contiguous memory allocation
– Page numbers, frame numbers and frame sizes are
determined by the machine architecture
– Paging leads to Internal Fragmentation
Pages size and Frame size is always in powers of two
Paging / Paged Memory Management

– CPU generates logical address and put the pages into

random frames

– Mapping is required to map which page is stored in which

page number

– From frame no. physical address could be found

Paging / Paged Memory Management

– Physical address space of a process in non- contiguous

– Implementation:
• Frames: Fixed sized blocks of the physical memory
• Pages: Fixed sized slots of the logical memory
– When a process is to be executed, its pages are loaded into
any available memory frames.
– Page Table: is a data structure. Used to translate logical
address to physical address
– CPU generated logical addresses to fetch the instructions.
Address Translation
– Address generated by CPU is divided into:

a) Page Number (p): used as an index into page table, which

contains base address of each page in the physical memory.

b) Page Offset (d): combined with base address to define

physical memory address that is sent to the memory unit.
Actual address of any byte in page or frame (Position of
instruction in page or frame)

• Address of physical memory, where page resides.

• The number of bits in the offset determines the maximum size of
each page, and should correspond to the system frame size.
Address Translation
Address Translation
Translation of Address to memory
How many address combinations can be generated from
bits:
1 bit  2^1=2 i.e 0 or 1
2 bit  2^2=4 i.e 00,01,10,11 ……..so on
n bits  2^n combination of address locations can be
generated.

If we have n bit address, and system is byte addressable

(every location/partition is of 1 Byte) it will support
memory of:
2^n x 1Byte
Translation of Address to memory
Translate n bit address to memory

Q1. Assume memory is byte addressable and address is of size

14bit. Compute size of memory.
Ans

Using 14 bits how many address combinations we can generate?

2^14.

2^4 x 2^10 =16 K *1 Byte

= 16KB
Translation of Address to memory
Translate n bit address to memory

Q2. Assume memory is 2 Byte addressable and address is of

size 22bit. Compute size of memory.
Ans

Using bits how many address combinations we can generate?

2^22.

2^2 x 2^20 = 4M
4M x 2Byte= 8MB
Translation of Address to memory
Translate n bit address to memory

Q3. Assume memory is Byte addressable and address is of size

34bit. Compute size of memory.
Ans

Using bits how many address combinations we can generate?

2^34.

2^4 x 2^30 = 16G

16G x 1Byte= 16GB
Translation of Address to memory
a) 210 means 1K i.e 1Kilo (1024)

b) 220 means 1M i.e 1Mega

c) 230 means 1G i.e 1Giga

d) 240 means 1T i.e 1Tera

e) 250 means 1P i.e 1Peta

No. of bits required to address memory
If memory size is given then compute how many bits are required
to address that memory.

Memory Size= Total no. of locations x size of each location

Total no. of locations= Memory Size/ size of each location

No. of bits required to address memory
Q1. Memory size is of 64KB. System is Byte addressable. How
many bits are required to represent 64KB?

Ans: 64KB/1B
= 64K

26 x 210= 216

Total 16 bits are required to rep. memory of 64 KB

No. of bits required to address memory
Q2. Memory size is of 32KB. System is Byte addressable. How
many bits are required to represent 32KB?

Ans: 32KB/1B
= 32K

25 x 210= 215

Total 15 bits are required to rep. memory of 32 KB

No. of bits required to address memory
Q2. Memory size is of 256MB. System is Byte addressable. How
many bits are required to represent 256MB?

Ans:
Total 28 bits are required to rep. memory of 256MB
Address Translation
How to break logical address into page number and page
offset?

Physical Address= frame x page size + offset

Example
Q. Using a page size of 4 bytes and physical memory of 32 bytes,
find the physical address if logical address is:
a) 4
b) 10
Solution:
Example- Page Table
Example- Page Table
Example
Q. Using a page size of 4 bytes and physical memory of 32 bytes,
find the physical address if logical address is:
a) 4
b) 10
Solution:
Example
Q. Using a page size of 4 bytes and physical memory of 32 bytes,
find the physical address if logical address is:
a) 4
b) 10
Solution:
Example
1. if logical address space can hold 2^13 addresses:
Means
a) logical address is 13 bit long.
b) logical address space is 2^13= 8KB if system is Byte
addressable
Example
Q1. LA=24bit
PA=16bit
Page Size =1KB. System is byte addressable.
Find total number of pages and frames.
Sol:
We need to compute 4 things in sequence:
a) Total addressable locations from L.A and P.A
b) Total locations and offset from page size and total bits to
represent page size.
c) Total pages.
d) Total frames.
Example
Sol: Total addressable locations from 24 bits
224 = 24 x 220 = 16M
Every location is byte addressable
So Total memory:
16Mx1B= 16MB
Total addressable locations from 16 bits
224 = 26 x 210 = 64K
Every location is byte addressable
So Total memory:
64Kx1B= 64KB
c) Page size= 1KB
total addressable locations and offset = Page size/ size of each
location
= 1KB/1B
=1K locations
Example
c) Page size= 1KB
total addressable locations and offset = Page size/ size of each
location
= 1KB/1B
=1K locations
Total bits required to represent 1K locations:
210 i.e. 10 bits
So offset is 10bit.

d) Total pages with 14bit

214 = 24 x 210 = 16K pages
e) Total frames with 6bit
26 = 64 frame
Example
Q2. LA=33bit
PA=24bit
Page Size =2KB. System is byte addressable.
Find total number of pages and frames.
Sol:
a) Total pages = 4M
b) Total frames= 8K
Frame Allocation