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Lect 18 - Binary Addition and Subtraction

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0% found this document useful (0 votes)
963 views18 pages

Lect 18 - Binary Addition and Subtraction

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Bong
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Binary additon &

subtraction

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 1


Multiplexers
Class 18 – Subtraction
 Binary Addition and Subtraction
 Subtraction circuits
 Incrementer, Decrementer

 Material from section 4-3 and 4-4 of text

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 2


Multiplexers
Binary Subtraction
 Have previously looked at the subtraction operation. A
quick review.
 Just like subtraction in any other base
 Minuend 10110
 Subtrahand - 10010
 Difference 00100
 And when a borrow is needed. Note that the borrow gives
us 2 in the current bit position.

 .
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 3
Multiplexers
And a full example
 And more ripple -

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 4


Multiplexers
In General
 When there is no borrow into the msb position,
then the subtrahend in not larger than the
minuend and the result is positive and correct.

 If a borrow into the msb does occur, then the


subtrahend is larger than the minuend. This was
seen back in lecture 2.
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 5
Multiplexers
Consider
 Now do the operation 4 – 6

 Correct difference is -2 or -0010


 Different because 2n was brought in and made
the operation M-N+2n
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 6
Multiplexers
Desired
 Actual desired magnitude is N-M
 To get this need to do 2n – (M-N+2)= N-M

 Doing the subtraction from 2n gives the


correct result.
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 7
Multiplexers
Two’s compliment
 But how do you represent a minus sign
electronically in a computer?
 How can you represent it such that arithmetic
operations are manageable?
 There are two types of compliments for each
number base system.
 Have the r’s complement
 Have the (r-1)’s complement
 For base 2 have 2’s complement and
1’s complement
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 8
Multiplexers
1’s Complement
 1’s complement of N is defined as (2n -1)-N.
 If n=4 have (2n -1) being 1 0000 - 1 = 1111
 So for n=4 would subtract any 4-bit binary
number from 1111.
 This is just inverting each bit.
 Example: 1’s compliment of 1011001
 is 0100110
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 9
Multiplexers
2’s complement
 The 2’s complement is defined as 2n-N
 Can be done by subtraction of N from 2n or
adding 1 to the 1’s complement of a number.
 For 6 = 0110
 The 1’s complement is 1001
 The 2’s complement is 1010

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 10


Multiplexers
Operation with 2’s complement
 Add 4 and -6
 Will use the 2’s complement of -6 or 1010
 4 0100
 -6 1010
 1110
 And taking the 2’s complement of 1110 get
0001 + 1 = 0010

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 11


Multiplexers
A 2’s complement table for 4 bits
 Listing the
values
represented.

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 12


Multiplexers
A circuit that does +/-
 A general adder subtractor
 OP=0 for addition/ =1 for subtraction

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 13


Multiplexers
Another number format
 Signed magnitude –
use the MSB to
indicate the sign. The
remaining bits
indicate the
magnitude.

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 14


Multiplexers
Overflow
 When adding 2 n-bit numbers it is possilbe to
get a n+1 bit result if there is a carry out.
 On paper it is easy just add another bit.
 In 2’s complement add a msb 0 for a positive
or a msb 1 for a negative.

 In a computer the number of bits that can be


used is fixed.
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 15
Multiplexers
Overflow indication.
 In 8-bit 2’s complement notation the range
that can be represented is -127 to +127.
 Then the operation to add +70 to +80 is
 Carries 0 1
 +70 0 100 0110
 +80 0 101 0000
 +150 1 001 0110
 Also look at the addition of -70 and -80
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 16
Multiplexers
The other addition
 The addition of -70 and -80
 Carries 1 0
 -70 1 011 1010
 -80 1 011 0000
 -150 0 110 1010
 The rule – if the carry into the msb position differs from
the carry out from the msb position then an overflow has
occurred.
 The circuit

 .
9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 17
Multiplexers
Class 18 assignment
 Covered sections 4-3 through 4-4
 Problems for hand in
 none
 Problems for practice
 4-3, 4, 5, 6, 7, 8,16

 Reading for next class: sections 5-1, 5-2

9/15/09 - L15 Decoders, Copyright 2009 - Joanne DeGroat, ECE, OSU 18


Multiplexers

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