Scribd
Upload
187 views

RTL Building Block: Nguyễn Thị Ngọc Huyền Trần Trung Hiếu

1) The document discusses register-transfer level (RTL) design which models digital circuits as the flow of signals between hardware registers and logical operations on those signals. 2) RTL descriptions separate circuits into registers (sequential logic) and combinational logic consisting of gates. 3) RTL is used in the logic design phase and is converted to gate-level for physical layout through logic synthesis and other design tools.

Uploaded by

Huyen Nguyen
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
187 views

RTL Building Block: Nguyễn Thị Ngọc Huyền Trần Trung Hiếu

1) The document discusses register-transfer level (RTL) design which models digital circuits as the flow of signals between hardware registers and logical operations on those signals. 2) RTL descriptions separate circuits into registers (sequential logic) and combinational logic consisting of gates. 3) RTL is used in the logic design phase and is converted to gate-level for physical layout through logic synthesis and other design tools.

Uploaded by

Huyen Nguyen
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 17

RTL Building Block

Nguyễn Thị Ngọc Huyền


Trần Trung Hiếu
Outline
• Arithmetic logic unit (ALU)

• Electronic register

• Ripple carry adder circuit

• RTL Building Block


 RTL description
 RTL in the circuit design cycle
Arithmetic logic unit (ALU)
• An arithmetic logic unit (ALU) is a combinational digital electronic
circuit that performs arithmetic and bitwise
operations on integer binary numbers. This is in contrast to a floating-
point unit (FPU), which operates on floating point numbers. An ALU is
a fundamental building block of many types of computing circuits,
including the central processing unit (CPU) of computers.
Arithmetic logic unit
• Signals
• An ALU has a variety of input and output nets, which are the electrical conductors used to convey digital
signals between the ALU and external circuitry. When an ALU is operating, external circuits apply signals to
the ALU inputs and, in response, the ALU produces and conveys signals to external circuitry via its outputs.

• Data
• A basic ALU has three parallel data buses consisting of two input operands (A and B) and a result output (Y).

• Opcode
• The opcode input is a parallel bus that conveys to the ALU an operation selection code, which is an
enumerated value that specifies the desired arithmetic or logic operation to be performed by the ALU. The
opcode size (its bus width) determines the maximum number of different operations the ALU can perform;
for example, a four-bit opcode can specify up to sixteen different ALU operations.
Arithmetic logic unit
• Status
• Outputs
• The status outputs are various individual signals that convey supplemental information about the result of
the current ALU operation. General-purpose ALUs commonly have status signals such as:
• Carry-out, which conveys the carry resulting from an addition operation, the borrow resulting from a
subtraction operation, or the overflow bit resulting from a binary shift operation.
• Zero, which indicates all bits of Y are logic zero.
• Negative, which indicates the result of an arithmetic operation is negative.
• Overflow, which indicates the result of an arithmetic operation has exceeded the numeric range of Y.
• Parity, which indicates whether an even or odd number of bits in Y are logic one.
• Inputs
• The status inputs allow additional information to be made available to the ALU when performing an
operation. Typically, this is a single "carry-in" bit that is the stored carry-out from a previous ALU operation.
Functions of ALU
• Arithmetic operation
• Add: A and B are summed and the sum appears at Y and carry-out.
• Add with carry: A, B and carry-in are summed and the sum appears at Y and carry-out.
• Subtract: B is subtracted from A (or vice versa) and the difference appears at Y and carry-
out. For this function, carry-out is effectively a "borrow" indicator. This operation may
also be used to compare the magnitudes of A and B; in such cases the Y output may be
ignored by the processor, which is only interested in the status bits (particularly zero and
negative) that result from the operation.
• Subtract with borrow: B is subtracted from A (or vice versa) with borrow (carry-in) and
the difference appears at Y and carry-out (borrow out).
• Two's complement (negate): A (or B) is subtracted from zero and the difference appears
at Y.
• Increment: A (or B) is increased by one and the resulting value appears at Y.
• Decrement: A (or B) is decreased by one and the resulting value appears at Y.
• Pass through: all bits of A (or B) appear unmodified at Y. This operation is typically used
to determine the parity of the operand or whether it is zero or negative, or to load the
operand into a processor register.
Functions of ALU
• Bitwise logical operations
• AND: the bitwise AND of A and B appears at Y.
• OR: the bitwise OR of A and B appears at Y.
• Exclusive-OR: the bitwise XOR of A and B appears at Y.
• Ones' complement: all bits of A (or B) are inverted and appear at Y.

• Bit shift operations


• Arithmetic shift: the operand is treated as a two's complement integer, meaning that the
most significant bit is a "sign" bit and is preserved.
• Logical shift: a logic zero is shifted into the operand. This is used to shift unsigned
integers.
• Rotate: the operand is treated as a circular buffer of bits so its least and most significant
bits are effectively adjacent.
• Rotate through carry: the carry bit and operand are collectively treated as a circular
buffer of bits.
D Flip Flop
• The flip flop is a basic building block of sequential logic circuits. It is a circuit that
has two stable states and can store one bit of state information. The output
changes state by signals applied to one or more control inputs.
• The basic D Flip Flop has a D (data) input and a clock input and outputs Q
and Q (the inverse of Q). Optionally it may also include the PR (Preset)
and CLR (Clear) control inputs.
• The truth table and diagram
Electronic register
• An electronic register is a form of memory that uses a series of flip-flops to store
the individual bits of a binary word, such as a byte (8 bits) of data. The length of
the stored binary word depends on the number of flip-flops that make up the
register.

• The binary word to be stored is applied to the four D inputs and is remembered
by the flip-flops at the rising edge of the next clock (CK) pulse. The stored data
can then be read from the Q outputs at any time, as long as power is maintained,
or until a change of data on the D inputs is stored by a further clock pulse, which
overwrites the previous data.
Parallel In/Parallel Out’ (PIPO) register
• A simple 4-bit register is illustrated in Fig. 5.7.1 and consists of four D Type flip-
flops, sharing a common clock input, providing synchronous operation ensuring
all bits are stored at exactly the same time.
Ripple carry adder circuit.
• Multiple full adder circuits can be cascaded in parallel to add an N-bit
number. For an N- bit parallel adder, there must be N number of full
adder circuits. A ripple carry adder is a logic circuit in which the carry-
out of each full adder is the carry in of the succeeding next most
significant full adder
Full adder

• Full adder is a logic circuit that adds two input operand bits plus a
Carry in bit and outputs a Carry out bit and a sum bit.. The Sum
out (Sout) of a full adder is the XOR of input operand bits A, B and
the Carry in (Cin) bit. Truth table and schematic of a 1 bit Full adder is
shown below

A Full adder can be made by


combining two half adder circuits
together (a half adder is a circuit
that adds two input bits and
outputs a sum bit and a carry bit).
Full adder

Consider the second last row of


the truth table, here the operands
are 1, 1, 0 ie (A, B, Cin). Add them
together ie 1+1+0 = 10 . In binary
system, the number order is 0, 1,
10, 11……. and so the result of
1+1+0 is 10 just like we get 1+1+0
=2 in decimal system. 2 in the
decimal system corresponds to 10
in the binary system. Swapping the
result “10” will give S=0 and Cout =
1 and the second last row is
justified.
Register-transfer level (RTL)
• In digital circuit design, register-transfer level (RTL) is a design abstraction which
models a synchronous digital circuit in terms of the flow of digital signals (data)
between hardware registers, and the logical operations performed on those
signals.

• Register-transfer-level abstraction is used in hardware description


languages (HDLs) like Verilog and VHDL to create high-level representations of a
circuit, from which lower-level representations and ultimately actual wiring can
be derived.
RTL description
• A synchronous circuit consists of two kinds of elements: registers
(Sequential logic) and combinational logic.
• Registers (usually implemented as D flip-flops) synchronize the
circuit's operation to the edges of the clock signal, and are the only
elements in the circuit that have memory properties.
• Combinational logic performs all the logical functions in the circuit
and it typically consists of logic gates.
RTL description
• For example, a very simple synchronous circuit is shown in the figure. The inverter is connected
from the output, Q, of a register to the register's input, D, to create a circuit that changes its state
on each rising edge of the clock, clk. In this circuit, the combinational logic consists of the inverter.
• register-transfer level. The term refers to the fact that RTL focuses on describing the flow of
signals between registers.
RTL in the circuit design cycle
• RTL is used in the logic design phase of the integrated circuit design cycle.

• An RTL description is usually converted to a gate-level description of the circuit by


a logic synthesis tool. The synthesis results are then used
by placement and routing tools to create a physical layout.

• Logic simulation tools may use a design's RTL description to verify its correctness.

You might also like