Lecture 3 Features of 16-Bit Microprocessor 8086
Lecture 3 Features of 16-Bit Microprocessor 8086
and Microcontrollers
Lecture 3
Presentation Layout
Lecture objectives
Introduction
Features of 8086
Architecture of 8086
8086 co-processors
8086 internal components
Questions
Conclusion
References
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Lecture Objectives
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Introduction
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16 Bit?
Introduced by Intel Corporation in
1978
8086 is a 16bit processor.
It’sALU, internal registers and
most of its instructions are
designed to work with 16bit
binary words
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Upwardly compatible with the older
8080/8085 series of 8-bit
microprocessors- allow programs written
for the 8080/8085 to be easily converted
to run on the 8086
8086 has a 16bit data bus. It can read
data from or write data to memory or
I/O ports either 16bits or 8 bit at a time.
Internal data paths are 16 bits wide.
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8086has a 20bit address bus/lines which
means, it can address up to 220 = 1 048
576 memory locations 1Mbytes of memory
words.
Each of the 1 048 576 memory addresses
of the 8086 represents a byte –wide
location. i.e. 16 bit numbers are stored
in two consecutive memory locations.
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Ifthe first byte of a word is at an even address, the
8086 can read the entire word in one operation. If
the first byte of the word is at an odd address, the
8086 will read the first byte of the word in one
operation, and the second byte in another operation.
Due to the 1Mbytes memory size multiprogramming is
made feasible as well as several multiprogramming
features have been incorporated in 8086 design.
8086 includes few features, which enhance
multiprocessing capability (it can be used with math
coprocessors like 8087, I/O processor 8089 etc.
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Operates on +5v supply and single phase
(single line) clock frequency. (Clock is
generated by separate peripheral chip
8284).
8086 comes with different versions.
Frequency range of 8086 is 5-10 MHz 8086
runs at 5 MHz (standard operating speed),
8086-2 runs at 8 MHz, 8086-1 runs at 10
MHz
It is housed in a 40-pin Dual-Inline-
Package (DIP)
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Contains approximately 29,000 transistors
and is fabricated using the HMOS((High
density, short channel MOS) technology .
Ithas multiplexed address and data bus
due to which the pin count is reduced
considerably.
The min mode is designed for small single
processor systems whilst in the max mode
the device is designed to work in medium
or large systems using more than one
processor.
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Higher Throughput (Speed)(This is
achieved by a concept called
pipelining).
Nowadays 8086 is no longer used. But
the concept of its principles and
structures is very useful for
understanding other advanced Intel
microprocessors.
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Coprocessors
8086 MP is a member of
IAPX-86 family. The family
includes several “ slave”
processors that perform
jobs that the processor
itself cannot or not as easily
Coprocessors ctd
A coprocessor is a chip that works side-by-
side with the main microprocessor
The coprocessor handles some of the more
specialized tasks, such as doing math
calculations or displaying graphics on the
screen, thereby taking some of the work
load off the main processor so it can go on
with the business of directing and keeping
order over the whole show.
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Coprocessors ctd
A coprocessor is installed to reduce the
burden on a computer's CPU and thus free
it for more general duties such as
transferring data and handling multiple
tasks.
A coprocessor may be designed to work
just with a particular type of CPU, in
which case its instructions can be
included in the main program and are
passed on to the coprocessor by the CPU
as it encounters them.
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Coprocessors ctd
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Support Component Function
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Architecture of 8086
Architecture describes the functional
components that make up the MPU and the
interaction between them.
Include the temporary storage devices known as
registers, which are used to hold data,
instructions, and status information.
There are also devices to perform arithmetic
and logical operations.
Controldevices are used to control the flow of
information through the MPU.
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8086CPU is divided into two independent
functional parts, the Bus interface unit (BIU)
and execution unit (EU).
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Bus interface unit (BIU)
The BIU main components are
Segment Registers
Instruction Pointer
6-Byte Instruction Queue
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Functions of BIU
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Instruction Queue
To increase the execution speed, BIU fetches as many as six
instruction bytes ahead to time from memory.
All six bytes are then held in first-in-first-out 6-byte register
called instruction queue.
Then all bytes are given to EU one by one.
This pre-fetching operation of BIU may be in parallel with
execution operation of EU, which improves the execution speed
of the instruction.
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Execution Unit
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Functions of Execution Unit
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Pipelining
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Questions
Explain the implementation of pipelining in
8086 processor?
Identify the various versions and speeds of
8086
Explain the use of each : ROM, PROM,
EPROM, EEPROM
State and explain 2 similarities and 2
differences oft he Intel 80386 chip and the
Motorola 68030 chip.
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Questions ctd
What are the data bus sizes and address bus sizes of:
a. 8088
b. 8086
c. 80286
d. 80386sx
e. 80386
f. 80486
g. 80586/Pentium
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Questions ctd
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Conclusion
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References