Data Communication and Computer Networks (EIE418) : Prof. E. Adetiba (PH.D, R.Engr. (COREN) )
Data Communication and Computer Networks (EIE418) : Prof. E. Adetiba (PH.D, R.Engr. (COREN) )
(EIE418)
Transmitter Receiver
Transmission medium
k bits
Fig. 3.7: Block Coding
• With k bits, we can create a combination
of 2k datawords while n bits can produce a
combination of 2n codewords.
• Since n > k, the number of possible
codewords is larger than the number of
possible datawords.
• The block coding process is one-to-one,
which implies that we have 2n − 2k
codewords that are not used, known as
invalid or illegal codewords.
• The trick in error detection is the
existence of these invalid codes.
Exercise 3.2
If k = 5 and n=6 for an even parity-check code:
i)generate the possible datawords and codewords
in a tabular form.
ii) find dmin and the number of errors s that can be
detected by the code.
Assignment 1
Using MATLAB, implement the even parity-check
code generator that can compute the dataword for
any given k bits and the corresponding codewords.
Submission Date: 5/11/2019.
Submission Rule: Code submissions with sample
outputs should be made to the class rep.
3.3.1.2 Cyclic Redundancy Check (CRC)
• CRC is a special type of linear block codes
which is used in data networks such as
LANs and WANs for error detection.
• At the encoder:
The dataword has k bits while the codeword has n bits
The size of the dataword is augmented by adding
(n − k) 0s to the right-hand side of the dataword.
The outcome which is n-bit in size is fed into the
generator.
The generator uses a divisor of (n − k + 1) bits, which is
predefined and agreed upon.
The generator divides the augmented
dataword by the divisor (modulo-2 division).
The quotient of the division is discarded while
the remainder (r2 r1 r0) is the CRC bits, which is
appended to the dataword to create the
codeword.
Thus:
Codeword = Dataword + CRC bits
• At the decoder:
The decoder receives the codeword (which is possibly
corrupted in transition).
A copy of all n bits is fed to the checker(a replica of the
generator).
The remainder produced by the checker is a syndrome
of (n − k) bits, which is fed to the decision logic
analyzer.
The analyzer examines the the syndrome bits. If they
are all 0s, this is interpreted as no error and the 4 left-
most bits of the codeword are accepted as the
dataword, other-wise, there is an error and the 4 bits
are discarded.
Example 3.3
If a CRC code is C(7, 4), generate the corresponding
codeword for dataword 1001.
Solution
k=4
n=7
augmentation bits = (n-k) 0s = 3 0s = 000
augmented dataword = 1001000
divisor bits = (n-k+1)bits = 4bits,
Given a divisor of value 1011 (represented in
polynomial as x3 + x +1), the design of the encoder
and decoder for C(7,4) is shown in Fig. 3.10.
Fig. 3.10: A CRC Design for C(7,4)
• As shown in Fig. 3.10, the CRC bits (which is the
remainder) is computed by the generator (using
modulo-2 division) to obtain 110:
• At the receiver:
received message = 011100110101
since n = 4, there are 3 chunks.
The chunks are 0111 0011 0101
Adding all chunks using 1’s complement, we have:
0111
0011
0101
————–
1111
————–
the compliment of 1111 = 0000, therefore, there is no error.