These PowerPoint color

diagrams can only be used by

instructors if the 3rd Edition
has been adopted for his/her
course. Permission is given to
individuals who have
purchased a copy of the third
edition with CD-ROM
Electronic Materials and
Devices to use these slides in
seminar, symposium and
conference presentations
provided that the book title,
author and © McGraw-Hill are
displayed under each diagram.
pn Junction Si solar cells at work. Honda‘s two seated Dream car is
powered by photovoltaics. The Honda Dream was first to finish 3,010 km
in four days in the 1996 World Solar Challenge.

|SOURCE: Courtesy of Centre for Photovoltaic Engineering, University of New South Wales,
Sydney, Australia.
 p n
B­ As+
h+ (a)
e­
M
Metallurgical Junction
Neutral p-region Eo Neutral n-region

(b)

M
Space charge region
W W
log(n), log(p) p n

ppo
nno
ni (c)

npo pno
x=0
x
 net
M

eNd
­Wp

Wn
x (d)

­eNa

Properties of the pn junction

 M
E (x)
-W p 0 Wn
x
(e )

Eo
V (x)
Vo
(f)

x
P E (x)
eV o
H o le P E (x )

x (g )

E lectro n P E (x )

-eV o
 L o g (C o n c e n tra tio n )
N eu tra l p -reg io n Eo - E N eu tra l n -re g io n

p po M in u te in crea se
n no

(a ) E x ces s h o les
p n (0 )
E x ces s electro n s H o le
n p (0 ) d iffu sio n
E lectro n
d iffu sio n p no
n po SCL
x' x

V
M
eV o
e(V o ­ V )

(b ) W
Wo

x
Forward biased pn junction and the injection of minority carriers. (a) Carrier
concentration profiles across the device under forward bias. (b) The hole potential
energy with and without an applied bias. W is the width of the SCL with forward bias
Fig 6.2
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
J
p -re g io n SCL n -re g io n

J = J elec + J h o le
To ta l c u rre n t
M a jo rity c a rrie r
d iffu sio n a n d d rift
c u rre n t J h o le
J elec M in o rity c a rrie r d iffu sio n
c u rre n t

x
-W p Wn

The total current anywhere in the device is constant. Just outside

the depletion region it is due to the diffusion of minority carriers.

Fig 6.3
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 C urrent
Ge Si GaAs

~ 0 .1 m A
V oltage
0 0 .2 0 .4 0 .6 0 .8 1 .0
Schematic sketch of the I-V characteristics of Ge, Si and GaAs pn Junctions

Fig 6.4
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
M in o rity C a rrier
C o n c e n tra tio n
Eo -E
p n (0)
Excess
Excess holes
electrons
n p (0 ) Holes
Electrons

npo
p no
x
x'
p W n

V
Minority carrier injection and diffusion in a short diode.
Fig 6.5
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 L o g (c a rrie r c o n ce n tratio n )
p -sid e n -sid e
SCL
ppo n no
C
nM pM
E le ctro n s H o les
n p (0 ) p n (0 )
n po A
p no
B D
Wp Wn
x
M

V
Forward biased pn junction and the injection of carriers and their
recombination in the SCL
Fig 6.6
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I

100 m A = 1 M in ority = 1 S eries

carrie r resistan ce
1 mA d iffu sion lim itation
Ge
= 2
1 0 A
Si
G aA s
10 0 nA = 2 R ecom b in atio n
cu rren t
1 nA V
0 0.2 0 .4 0 .6 0 .8 1.0

Schematic sketch of typical I-V characteristics of Ge, Si and GaAs

pn junctions as log(I) vs V. The slope indicates e/( kT)

Fig 6.7
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 a b

M in o rity C arrie r
C o n c e n tra tio n
N e u tral p -reg io n E o+ E N eu tra l n -regio n M
e(V o + V r )
T h e rm a ll

H o le P E (x )
y
eV o
g e n e rated
EHP

H o les
E lectro n s pno x
npo Wo
Wo x
W (V = -V r )
W D iffu sio n
D rift

V
r

Reverse biased pn junction. (a) Minority carrier profiles and the origin of the reverse
current. (b) Hole PE across the junction under reverse bias

Fig 6.8
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I R ev e rse d io d e cu rre n t (A ) a t V = 5 V

mA 1 0 -4
3 2 3 K G e P h o to d io d e
1 0 -6 S lo p e = 0 .6 3 eV
1 0 -8
1 0 -1 0
V 238 K
Id e a l d io d e 1 0 -1 2
1 0 -1 4
nA
S p a c e c h a rg e la ye r 1 0 -1 6
g e n e ra tio n , su rfa c e le a k a g e 0 .0 0 2 0 .0 0 4 0 .0 0 6 0 .0 0 8
c u rre n t, e tc . (b ) 1 /Tem p e ra tu re (1 /K )
(a )

(a) Reverse I-V characteristics of a pn junction (the positive and negative current axes have
different scales). (b) Reverse diode current in a Ge pn junction as a function of temperature
in a ln(Irev) vs 1/T plot. Above 238 K, Irev is controlled by ni2 and below 238 K it is
controlled by ni. The vertical axis is a logarithmic scale with actual current values. (From
D. Scansen and S.O. Kasap, Cnd. J. Physics. 70, 1070-1075, 1992.)
Fig 6.9
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 a b

p-Type S em iconducto r n -Type S em iconducto r Eo

p n
Ec
CB CB n M
eV o = p - n
p
Ec Ec D o n o rs in S C L
EFn EFp Ec
Eg EFn
EFp Ev
Ev Ev
A c c e p to rs in S C L
VB VB M Ev

B u lk

(a) Two isolated p and n-type semiconductors (same material). (b) A pn junction
band diagram when the two semiconductors are in contact. The Fermi level must be
uniform in equilibrium. The metallurgical junction is at M. The region around M
contains the space charge layer (SCL). On the n-side of M, SCL has the exposed
positively charged donors whereas on the p-side it has the exposed negatively
charged acceptors.

Fig 6.10
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 Eo (a ) E o -E (b )
p n
M
Ec Ec
e (V o ­ V )
eV o Ec
Ec eV E Fn
E Fp EFp
E Fn
Ev Ev
Ev
Ev
p n p n

I
V

Energy band diagrams for a pn junction under (a) open circuit and (b) forward bias

Fig 6.11
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 E o+ E (c ) Eo+E (d )
Ec
Ec
e (V o + V r ) e (V o + V r )
T h e rm a l
E Fp E Fp g e n e ra tio n
Ec Ec
Ev EFn Ev E Fn

Ev Ev
p n p n

Vr Vr I = Ve ry S m a ll

Energy band diagrams for a pn junction under (c) reverse bias conditions. (d) Thermal generation of electron hole
pairs in the depletion region results in a small reverse current.

Fig 6.11
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
Net Space Charge D io d e v o lta g e = -V r
Density
d Q = In c re m e n ta l c h a rg e
a C d ep
eN d
b

(1 0 -1 0 3 ) p F /m m 2

S p ac e c h arg e reg io n

D io d e v o lta g e = -(V r+ d V r) Reverse Forward

-eN a M
M
D io d e V o lta g e 0 Vo

The depletion region behaves like a capacitor. (a) The charge in the
depletion region depends on the applied voltage just as in a capacitor
(b) The incremental capacitance of the depletion region increases with
forward bias and decreases with reverse bias. Its vaue is typically in
the range of picofarads per mm2 of device area.

Fig 6.12
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 SCL N eu tral n -regio n

p n '(0 ) w h en V + dV
p n (0) w h en V
I = Q / h dQ

Q
pno
x'

V to V + dV
Consider the injection of holes into the n-side during forward bias.
Storage or diffusion capacitance arises because when the diode
voltage increases from V to V+dV then more minority carriers are
injected and more minority carrier charge is stored in the n-region.
Fig 6.13
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 C u rren t
1 = dI T an gen t
rd dV
I+ dI
dI
I

dV

V o ltage
0 0 .5 V V+dV

The dynamic resistance of the diode is defined as dV/dI which is the

inverse of the tangent at I.
Fig 6.14
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I
Vbr
V

Reverse I-V characteristics of a pn junction.

Fig 6.15
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 E o+ E

p h+ n

e-

I = M Io

W
D e p le tio n re g io n (S C L )

V
r

Avalanche breakdown by impact ionization.

Fig 6.16
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 A V br B
I = (V r -V b r )/R

R
V r > V br

Vr
If the reverse breakdown current when Vr > Vbr is limited by an
external resistance, R, to prevent destructive power dissipation then
the diode can be used to clamp the voltage between A and B to remain
approximately Vbr.

Fig 6.17
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 SC L
p n
Ec
CB e(V o + V r )
EFp
Ev Tunneling
Ec
a E Fn

VB
Ev

p Tunneling n

Vr
Zener breakdown involves electrons tunneling from the VB of p side to
the CB of n-side when the reverse bias reduces Ec to line up with Ev.
Fig 6.18
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 200

E b r (V / m )
100

A v a la n ch e T u n n e lin g
0 N d (cm -3 )
1014 10 15 1 0 16 1017 1018

The breakdown field Ebr in the depletion layer for the onset of reverse
breakdown vs. doping concentration Nd in the lightly doped region in
a one-sided (p+n or pn+) abrupt pn junction. Avalanche and tunneling
mechanisms are separated by the arrow [data extracted from M. Sze
and G. Gibbons, Solid. State. Electronics, 9, 831 (1966)]

From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 The Bipolar Junction Transistor: BJT

From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 p+ n p
(a )
E m iter B ase C o lle cto r
E B C
x E
p n (0)
IE IC
p n(x )
n p (0 )
(b ) n p (x ) pno
n po
W EB WB W BC
IB VCB
VEB
IE IC
(a) A schematic illustration of the pnp bipolar transistor with three differently doped regions. (b) The pnp bipolar
operated under normal and active conditions.

Fig 6.20
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 In p u t E pnp C O u tp u t
circu it circu it (c )
B I
B

V EB V CB
E B C
E
E lectro n
IE D iffu sio n IC
H o le
H o le d iffu sio n
d rift

R e com b in a tio n
(d )
E le ctro n s L ea k ag e cu rre nt

IB
(c) The CB configuration with input and output circuits identified. (d) The illustration of various current components
under normal and active conditions.

Fig 6.20
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 IC (mA)

3 IE = 3 m A

2 IE = 2 m A

1 IE = 1 m A
IE = 0
-V C B
0 5 10 IC B O

DC I-V characteristics of the pnp bipolar transistor (exaggerated to

highlight various effects).

Fig 6.21
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 B ase SCL
p n (0 )
p n (x )
V C B = -5 V

V C B = -1 0 V

x
WB W BC

W 'B W 'B C
The Early effect. When the BC reverse bias increases, the depletion
width WBC increases to W'BC which reduces the base width WB to W'B
As pn(0) is constant (constant VEB), the minority carrier concentration
gradient becomes steeper and the collector current IC increases.
Fig 6.22
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 E B C
p+ n E p
In p u t p n (0 ) O u tp u t
IE + ie IC + ic
p n (x)
E C
v e b (t) RC
x v c b (t)

VEE B VCC
IB + ib

A pnp transistor operated in the active region in the common base amplifier
configuration. The applied (input) signal veb modulates the dc voltage across the
BE junction and hence modulates the injected hole concentration up and down
about the dc value pn(0). The solid line shows pn(x) when only the dc bias VEE
is present. The dashed lines show how pn(x) is modulated up and down by the
signal veb superimposed on VEE.
Fig 6.23
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 IC O u tp u t

I C (m A )
C E
4 I B = 0 .0 3 m A
IB E lec tro n
x
B d iffu sion 3 I B = 0 .0 2 m A
VCE
n p (0 ) 2 I B = 0 .0 1 m A
In p u t
n p(x ) 1
IB = 0
VBE
E IC E O V C E
0 5 10
IE

(a) (b )
(a) An npn transistor operated in the active region in the common emitter configuration. The
dc voltage across the BE junction, VBE, controls the current IE and hence IB and IC. The
input current is the current that flows between VBE and the base which is IB. The output
current is the current flowing between VCE and the collector which is IC. (b) DC I-V
characteristics of the npn bipolar transistor in the CE configuration (exaggerated to
highlight various effects).
Fig 6.24
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 IC + ic

C RC

E
IC x O u tp u t
IB + ib B Q B
In p u t
v ce (t)
QB
n p (x) VCC
vbe(t) n'p (0) n p (0)

E
VBB
IE + ie

An npn transistor operated in the active region in the common emitter amplifier configuration. The
applied signal vbe modulates the dc voltage across the BE junction and hence modulates the injected
minority concentration up and down about the dc value np(0). The solid line shows np(x) when only the
dc bias VBB is present. The dashed line shows how np(x) is modulated up by a positive small signal
signal vbe superimposed on VBB.
Fig 6.25
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
A C source Sm all signal equivalent circuit Load

S B ib C
Rs
Rc
r be
v in vbe ic = g m v be vce
vs

S E E

Low frequency small signal simplified equivalent circuit of the

bipolar transistor in the CE configuration with a load resistor RC in
the collector circuit.
Fig 6.26
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 G ate
p+ G
B asic structure
G
S o u rce C ircu it sym bo l
D rain
n -ch a n n el for n-ch ann el F E T
S n D S D

p+
S G D
D ep letion M e tal electrod e
p+
reg io n
p+ G In sulation
C ro ss sectio n
n
(S iO 2 )
n n D epletion
S n -ch an n el D p regio n s
n -chan nel
C h ann el
thickn ess p+
(a) (b)

(a)The basic structure of the junction field effect transistor (JFET) with an n-channel. The two p + regions are
electrically connected and form the gate. (b) A simplified sketch of the cross section of a more practical n-
channel JFET

Fig 6.27
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 G
V ch ID = 1 0 m A

VDS S D

0 A x
B
VGS = 0
G
p+ VDS = VP = 5 V
ID = 6 m A
n n (b )
S D G
A B
I D = 1 0 .1 m A
D e p le tio n S A D
re g io n n -c h a n n e l
P in c h e d o ff
channel
VDS = 1 V P

(a) (c) VDS = 10 V

(a) The gate and source are shorted (VGS = 0) and VDS is small, (b), VDS has
increased to a value that allows the two depletion layers to just touch, when VDS =
VP (= 5 V) when the p+n junction voltage at the drain end, VGD = -VDS = -VP = -5
V. (c) VDS is large (VDS > VP) so that a short length of the channel is pinched off.

Fig 6.28
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I D (m A ) V D S (s a t) = V P
ID S S
10 VGS = 0

5
ID S V G S = -2 V
V D S (s at) = V P + V G S V G S = -4 V
V G S = -5 V
0
0 4 8 12
VDS

Typical ID vs VDS characteristics of a JFET for various fixed gate

voltages VGS.

Fig 6.29
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 G
P in ch ed o ff ch an n el

ID = 1 0 m A
P
S A D
E

L ch po

VDS > 5 V

The pinched-off channel and conduction for VDS > VP (=5 V).

Fig 6.30
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 V G S = -2 V V G S = -2 V
G G
p+
I D = 1 .8 m A
A n B
S D S D

VDS = 0 V VDS = 1 V

V G S = -2 V
(a) G (b )

I D = 3 .6 m A
A
(c) S D
P P in c h e d o ff
VDS = 3 V

(a) The JFET with a negative VGS voltage has a narrower n-channel at the start. (b) Compared to the
VGS = 0 case, the same VDS gives less ID as the channel is narrower. (c) The channel is pinched off at
VDS = 3 V sooner than the VGS = 0 case where it was VDS = 5 V.
Fig 6.31
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 VGS = ­5 V
G
p+ SC L
n

S D

V DS
When VGS = ­5 V the depletion layers close the whole channel from the
start, at VDS = 0. As VDS is increased there is a very small drain current
which is the small reverse leakage current due to thermal generation of
carriers in the depletion layers.

Fig 6.32
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 IDS (m A )
I DS
RD O u tp u t
10
C S ign a l
D vds 8
B
G B id ( t)
In p u t 6
V DS Q T im e
S ign a l 4
S V DD +18 V A
v gs V GS A
2

V GG ­ 1 .5 V V GS 0
­4 ­2 0

(a ) A v g s ( t)

(b ) B

T im e

(a) Typical IDS versus VGS characteristics of a JFET. (b) The dc circuit where VGS in the
gate–source circuit (input) controls the drain current IDS in the drain–source (output)
circuit in which VDS is kept constant and large (VDS > VP).
Fig 6.33
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I D S (m A )

10
ID S 8
RD O u tp u t B
S ig n a l B i d (t)
C 6
Q T im e
D vds A 4
A
In p u t G 2
VDS
S ig n a l V GS
0
S VDD +18 V -4 -2 0
vgs VGS
A v g s(t)
VGG -1.5 V B

T im e
(a ) (b )

(a) Common source (CS) ac amplifier using a JFET. (b) Explanation of

how ID is modulated by the signal vgs in series with the dc bias voltage
VGG.
Fig 6.34
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 Fig 6.34
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 x
F ix e d m etal io n s

M eta l
+Q
(a ) V
C E
-Q
M eta l

C h a rg e d e n sity
M o b ile e lec tro n s
x

M eta l
+Q
(b ) V
E W
D e p letio n
-Q
re g io n

F ix e d a c ce p to rs C h arg e d en sity
p -typ e sem ico n d u cto r x

(c )
In v ersio n +Q
V > V th la yer
E Wn
Wa -Q

C o n d u ctio n
e lectro n D e p le tio n C h a rg e d e n sity
re g io n
The field effect. (a) In a metal-air-metal capacitor, all the charges reside on the surface. (b) Illustration of
field penetration into a p-type semiconductor. (c) As the field increases eventually when V > Vth an
inversion layer is created near the surface in which there are conduction electrons.
Fig 6.35
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
S o u rc e G a te D ra in
S G D M e ta l e le c tro d e s
D
S iO 2 in su la tio n
n+ p n+ H e a v ily d o p e d G B lk
n -re g io n
p -typ e su b strate S
D e p le tio n la ye r
B lk B u lk (S u b stra te )

The basic structure of the enhancement MOSFET and its circuit

symbol.

Fig 6.36
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
SEM cross section of a MOS Transistor
|SOURCE: Courtesy of Don Scansen, Semicondutcor Insights, Kanata, Ontario, Canada

Fig 6.36
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 VDS = 4V
VDS
VGS = 3 V I =0 ID
V th = 4 V D
VGS = 8 V I D = 4 .2 m A
S G ID
D
S G D IDS
VDS A P
D e p le tio n VDS
n+ p n+ V D S (sat)
reg io n n+ n+
p
(a) B elo w th re sho ld V G S < V th an d V D S > 0
(c) A b o v e th resh o ld V G S > V th a n d satu ratio n, V D S = V D S (s a t)
V D S = 0 .5 V VDS = 10 V

VGS = 8 V ID = 1 m A ID I D = 4 .5 m A
V th = 4 V VGS = 8 V
ID
S G D D
S G
A n B
V A
DS
VDS
n+ n+ n -c h a n n e l is th e n+ P' n+
p in v e rsio n laye r p

(b ) A b o v e th re sh o ld V G S > V th an d V D S < V D S(s at) (d ) A b ov e th re sh o ld V >V a n d satu ratio n re g io n , V >V

GS th DS D S (s at)

The MOSFET ID vs VDS characteristics

Fig 6.37
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I D (m A ) I D S (m A )
V D S (s a t) VDS = 20 V
V G S= 10 V
10 10
S a tu ra tio n , I D  I D S

8V
5 5
6V V th = 4 V
5V
4V
0 0
0 10 20 30 0 5 10
VDS VGS
(a) (b )

(a) Typical ID vs VDS characteristics of an enhancement MOSFET

(Vth = 4 V) for various fixed gate voltages VGS.
(b) Dependence of ID on VGS at a given VDS ( >V DS(sat)).
Fig 6.38
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 (a)
M etal x x
O x id e +Q
In ve rsion
E lay er
V = V1

Wa -Q V1
p -sem ico n du cto r V sc V ox
D e p letion
C h arge d en sity V o ltag e , V
regio n

Q mi
Q ot
(b ) V = V1 Qf
Q it

(a) The threshold voltage and the ideal MOS structure.

(b) In practice, there are several charges in the oxide and at the oxide-semiconductor interface that effect the threshold
voltage: Qmi = Mobile ionic charge (e.g. Na+), Qot = Trapped oxide charge, Qf = Fixed oxide charge, Qit = Charge
trapped at the interface.
Fig 6.39
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
VACUUM Im p lan t ion s

S iO 2 insulation
Im p lan ted Na
ch an n el u n d er
p G ate oxid e
th e gate
p -ty p e su b stra te x
W afe r h o ld er

Schematic illustration of ion implantation for the control of Vth.

Fig 6.40
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 D o n o r io n s
G ate o v erlap s th e d rain an d so u rce
S G D

n+ p n+ n+ p n+

D o n o r im p lan ted n -reg io n s

(a) (b)
(a) There is an overlap of the gate electrode with the source and drain
regions and hence additional capacitance between the gate and drain.
(b) n + type ion implantation extends the drain and source to line-up with
the gate.

Fig 6.41
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 D o n o r io n s

D o p ed P o lyc rysta llin e S i

S iO 2 D onor
(th in ) n+ n+
p im p la n te d
p -typ e su b stra te p re g io n

(a) (b)
S G D

A l e le c tro d e n+ n+
p

(c )
The poly-Si gate technology. (a) Poly-Si is deposited onto the oxide and the areas outside
the gate dimesions are etched away. (b) The poly-Si gate acts as a mask during ion
implantion of donors to form the n+ source and drain regions. (b) A simplified schematic
sketch of the final poly-Si MOS transistor.
Fig 6.42
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
E le c tro n e n e rg y
p n+ p
Ec n+
eV o
Ec
EF Eg EF Eg
Ev h E g
eV o
Ev
D istan ce in to d ev ic e V
E le ctro n in C B
H o le in V B
(a) (b )
(a) The energy band diagram of a p-n+ (heavily n-type doped) junction
without any bias. Built-in potential Vo prevents electrons from diffusing
from n+ to p side. (b) The applied bias reduces Vo and thereby allows
electrons to diffuse, be injected, into the p-side. Recombination around
the junction and within the diffusion length of the electrons in the p-side
leads to photon emission.
Fig 6.43
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 L ig h t o u tp u t

p E p ita x ial
n+
la yers
n+
S ubstrate

A schematic illustration of one possible LED device structure. First n+ is

epitaxially grown on a substrate. A thin p layer is then epitaxially grown on
the first layer.

Fig 6.44
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 Ec
EN

Eg

Ev

(a) Photon emission in a direct bandgap semiconductor. (b) GaP is

an indirect bandgap semiconductor. When doped with nitrogen there
is an electron recombination center at EN. Direct recombination
between a captured electron at EN and a hole emits a photon.
Fig 6.45
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 (a) A lG aA s G aA s p A lG a A s p

~ 0 .2 m Ec
Ec
E le c tro n s in C B N o b ia s
eV o 1 .4 e V 2 eV
EF EF
Ec Ev
(b ) 2 eV
Ev H o le s in V B

W ith fo rw a rd
b ia s
(c )

n+ p p
(d )

A lG a A s G aA s A lG a A s

(a) A double heterostructure diode has two junctions which are between two different bandgap semiconductors
(GaAs and AlGaAs). (b) A simplified energy band diagram with exaggerated features. EF must be uniform. (c)
Forward biased simplified energy band diagram. (d) Forward biased LED. Schematic illustration of photons
escaping reabsorption in the AlGaAs layer and being emitted from the device.
Fig 6.46
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 R ela tiv e in te n sity
E g + kT
E 1
E le c tro n s in C B (2 .5 -3 )kT
CB
2kT h
1/ kT 0 h
Ec 2 h  h  h 

Eg E g (c)
1 2 3 R e lativ e in ten sity
Ev
1
VB H o les in V B

C arrier co n ce n tra tio n

p er u n it e n ergy 0 
  
(a ) (b ) (d )

(a) Energy band diagram with possible recombination paths. (b) Energy distribution of electrons in the CB and
holes in the VB. The highest electron concentration is (1/2)kT above Ec. (c) The relative light intensity as a
function of photon energy based on (b). (d) Relative intensity as a function of wavelength in the output spectrum
based on (b) and (c).
Fig 6.47
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
R elative (a ) (b)
intensity V (c)
655nm R elative light intensity

1.0 2

0.5 
1
24 nm

0  0 0
700 0 20 40 I (m A) 0 20 40 I (m A)
600 650

(a) A typical output spectrum (relative intensity vs wavelength) from a red GaAsP LED. (b) Typical output
light power vs. forward current. (c) Typical I-V characteristics of a red LED. The turn-on voltage is around
1.5V

Fig 6.48
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 R elative spectral o u tp u t p o w er
40 o C

1
2 5 oC

8 5 oC

0
740 8 00 840 8 80 90 0
W av elen gth (nm )
The output spectrum from AlGaAs LED. Values normalized to
peak emission at 25 oC
 Solar Cells: Photovoltaics

|SOURCE: Courtesy of NASA, Dryden Flight Center

Solar cell inventors at Bell Labs (left to right) Gerald Pearson, Daryl Chapin
and Calvin Fuller are checking a Si solar cell sample for the amount of
voltage produced (1954).

|SOURCE: Courtesy of Bell Labs, Lucent Technologies

 N eu tral N eu tral
n-regio n Eo p-regio n

D iffu sio n
D rift
Long

M edium Le B ac k
e le c tro d e
S h o rt

F in g e r
e le c tro d e
Lh
D ep letio n
reg io n
n W p

Voc

The principle of operation of the solar cell (exaggerated features to

highlight principles)
Fig 6.49
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 F in g er ele c tro d es B u s ele c tro d e
fo r c u rre n t c o llec tio n

Finger electrodes on the surface of a solar cell reduce the series

resistance
Fig 6.50
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 EH Ps

exp( x)

Lh W Le

Iph

Photogenerated carriers within the volume Lh + W + Le give rise to a photocurrent Iph. The variation in
the photegenerated EHP concentration with distance is also shown where a is the absorption coefficient
at the wavelength of interest.
Fig 6.51
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
L igh t I = Id Iph
I I sc = I p h
I
d
V
V Ip h V = 0 Iph

R R
(a) (b ) (c )

(a) The solar cell connected to an external load R and the convention
for the definitions of positive voltage and positive current. (b) The
solar cell in short circuit. The current is the photocurrent, Iph. (c) The
solar cell driving an external load R. There is a voltage V and current I
in the circuit.
Fig 6.52
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I (m A )

20
D ark
V oc
0 V
0 .2 0 .4 0 .6
Iph
L ig h t

T w ic e th e lig h t
­20

Typical I-V characteristics of a Si solar cell. The short circuit current is Iph
and the open circuit voltage is Voc. The I-V curves for positive current
requires an external bias voltage. Photovoltaic operation is always in the
negative current region
Fig 6.53
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 I (mA) V oc
0.1 0.2 0.3 0.4 0.5 0.6
I 0 V
V
I
I-V for a solar cell
under an illumination
V 100 of 700 W m-2
Slope = ­ 1/R

I Operating point
The load line for
I R Isc = Iph P R=3
200 (I-V for the load)
(a) (b)

(a) When a solar cell drives a load R, R has the same voltage as the solar cell but the current
through it is in the opposite direction to the convention that current flows from high to low
potential. (b) The current I and voltage V in the circuit of (a) can be found from a load line
construction. Point P is the operating point (I, V). The load line is for R = 30 .

Fig 6.54
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 N eu tra l D ep le tio n N e u tra l
n -reg io n re g io n p -reg io n

B ack
Rs e le ctro d e
F in g e r
e le c tro d e

Rp

RL
Series and shunt resistances and various fates of photegenerated
EHPs.

Fig 6.55
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 A Iph Rs
I A I

Ip h Id Id

Iph V RL Iph Rp V RL

(a) (b)
B B
Id eal so lar cell L o ad S o lar cell L oad

The equivalent circuit of a solar cell (a) Ideal pn junction solar cell
(b) Parallel and series resistances Rs and Rp.

Fig 6.56
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 O x id e
n L igh t
p Le

Inverted pyramid textured surface substantially reduces reflection

losses and increases absorption probability in the device

Fig 6.58
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
AlGaAs window layer on GaAs passivates the surface states and
thereby increases the photogeneration efficiency

Fig 6.59
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 Voc
0 0.2 0.4 0.6
0 V
Rs = 50 

Rs = 0
-5
Rs = 20 

Isc
Iph -10

I (mA)

The series resistance broadens the I–V curve and reduces the maximum available power
and hence the overall efficiency of the solar cell.The example is a Si solar cell with η ≈ 1.5
and
Io ≈ 3 × 10−6 mA. Illumination is such that the photocurrent Iph = 10 mA.
Fig 6.57
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 n p
(a)
A lG aA s G aA s

Ec

Ec 1 .4 e V

Ev
2 eV
(b )
Ev

A heterojunction solar cell between two different bandgap

semiconductors (GaAs and AlGaAs)
Fig 6.60
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 p n p n

C ell 1 (E g1 ) C ell 2 (E g 2 < E g1 )

A tandem cell. Cell 1 has a wider bandgap and absorbs energetic

photons with h > Eg1. Cell 2 absorbs photons that pass cell 1 and
have h > Eg2.

Fig 6.61
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 SiO2
Electrode
p+ Electrode

(a) The schematic structure of an

idealized pin photodiode (b) The net
i-Si +
n
(a)
space charge density across the
net W photodiode. (c) The built-in field
eNd
across the diode. (d) The pin
photodiode in photodetection is
(b)
x reverse biased.

eNa

E(x)

x
(c)

Eo

W
E
h > Eg

e
h+
(d)

Iph R Vout

Vr

Fig 6.62
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 E n e rgy

n p p CB
E Fn
(a ) AlGaAs G aA s AlGaAs Ec E le ctro n s in C B

(~ 0 .1 m )
Electrons in CB Ec h o
Ec H o les in V B = e m p ty sta te s
Ev
Ec
S tim ulated 2 eV E Fp
em issio n s 1 .4 e V
2 eV
VB
(b ) E v (c)
Ev D e n sity o f states

H oles in V B

(a) A double heterostructure diode has two junctions which are

between two different bandgap semiconductors (GaAs and
AlGaAs).(b) Simplified energy band diagram under a large forward
bias. Lasing recombination takes place in the p-GaAs layer, the active
layer. (c) The density of states and energy distribution of electrons and
holes in the conduction and valence bands in the active layer

Fig 6.63
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 D istru b ted
O p tical cav ity B ragg reflecto r
co n tain in g
ac tiv e layer O p tical cav ity
D istrib u ted B ragg C u rren t
reflecto r

D iffractio n
lim ited
laser b eam
S em ico n d u cto r
crystal
C o rru g ated P o lished fa ce
d ielectric stru ctu re

Semiconductor lasers have an optical cavity to build up the required

electromagnetic oscillations. In this example, one end of the cavity
has a Bragg distrubuted reflector, a reflection grating, that reflects
only certain wavelengths back into the cavity.

Fig 6.64
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
O p tical o u tpu t p o w e r

O p tical P o w er
L ase r d io d e
10 m W
LED
L a ser

5 mW
~ 0 .1 n m
I th LED

0 I  (n m )
0 50 100 1475 1550 1625
C u rre nt (m A )
(a ) (b )

(a) Typical optical power output vs. forward current for a laser diode
and an LED . (b) Comparison of spectral output characteristics.

Fig 6.65
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 NMOSFET amplifier.
Fig 6.67
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
From Principles of Electronic Materials and Devices, Third Edition, S.O. Kasap (© McGraw-Hill, 2005)
 R elative spectral o u tp u t p o w er
40 o C

1
2 5 oC

8 5 oC

0
740 8 00 840 8 80 90 0
W av elen gth (nm )
The output spectrum from AlGaAs LED. Values normalized to
peak emission at 25 oC