ADITYA ENGINEERING COLLEGE (A)
EMBEDDED SYSTEMS
K.PAVANI
Sr.Assistant Professor
Department of Electronics and Communication Engineering
Aditya Engineering College (A)
Email: [email protected]
ADITYA ENGINEERING COLLEGE (A)
REAL TIME OPERATING SYSTEMS
(UNIT-IV-PART 1)
K.PAVANI
Sr.Assistant Professor
Department of Electronics and Communication Engineering
Aditya Engineering College (A)
Email: [email protected]
Aditya Engineering College (A)
Unit-4 Outcomes
At the end of the Course, Student will be able to:
CO 4 : Examine to integrate hardware and firmware for an embedded system in the RTOS
environment.
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Contents
Operating system basics
Types of operating systems
Tasks
Process and Threads
Multiprocessing
and Multitasking
Task Scheduling, Threads
Processes and Scheduling
Task communication
Task synchronization.
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
ADITYA ENGINEERING COLLEGE (A)
OPERATING SYSTEM BASICS
K.PAVANI
Sr.Assistant Professor
Department of Electronics and Communication Engineering
Aditya Engineering College (A)
Email: [email protected]
Aditya Engineering College (A)
Learning Outcomes
At the end of this lecture, Student will be able to:
LO 1 :Understand the basics of an opera ng system and the need for an operating
system
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Operating System Basics
The operating system acts as a bridge between the user applications/tasks and the underlying system
resources through a set of system functionalities and services.
The OS manages the system resources and makes them available to the user applications/tasks on a need
basis.
A normal computing system is a collection of different I/O subsystems, working, and storage memory.
The primary functions of an operating system is
Make the system convenient to use
Organize and manage the system resources efficiently and correctly
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
The Operating System Architecture
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Classification of Kernel
Monolithic Kernel Microkernel
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
TYPES OF OPERATING SYSTEMS
Depending on the type of kernel and kernel services, purpose and type of
computing systems where the OS is deployed and the responsiveness to
applications, Operating Systems are classified into different types.
General Purpose Operating System (GPOS)
Real-Time Operating System (RTOS)
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
The basic functions of a Real-Time kernel
Task/Process management
Task/Process scheduling
Task/Process synchronisation
Error/Exception handling
Memory management
Interrupt handling
Time management
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
TASKS, PROCESS AND THREADS
In the operating system context, a task is defined as the program in execution
and the related information maintained by the operating system for the
program.
A ‘Process’ is a program, or part of it, in execution.
A thread is the primitive that can execute code. A thread is a single sequential
flow of control within a process. ‘Thread’ is also known as lightweight
process.
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
PROCESS
Structure of a Process Memory organization of a Process
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
PROCESS LIFE CYCLE
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Threads
Memory organization of a Process and its associated Threads
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
CONCEPT OF MULTITHREADING
Process with multi-threads
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Thread v/s Process
Thread Process
Thread is a single unit of execution and is part of process Process is a program in execution and contains one or
more threads.
A thread does not have its own data memory and heap Process has its own code memory, data memory and
memory. It shares the data memory and heap memory with stack memory.
other threads of the same process.
A thread cannot live independently; it lives within the A process contains at least one thread.
process.
There can be multiple threads in a process. The first thread Threads within a process share the code, data and heap
(main thread) calls the main function and occupies the memory. Each thread holds separate memory area for
start of the stack memory of the process. stack(shares the total stack memory of the process).
Threads are very inexpensive to create Processes are very expensive to create. Involves many
OS overhead.
Context switching is inexpensive and fast Context switching is complex and involves lot of OS
overhead and is comparatively slower
If a thread expires, its stack is reclaimed by the process. If a process dies, the resources allocated to it are
reclaimed
by the OS and all the associated threads of the process
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
also dies.
Aditya Engineering College (A)
MULTIPROCESSING AND MULTITASKING
The ability to execute multiple processes simultaneously is referred as
multiprocessing.
The ability of an operating system to hold multiple processes in memory and
switch the processor (CPU) from executing one process to another process is
known as multitasking.
Types of Multitasking
1. Co operative multitasking
2. Preemptive multitasking
3. Non preemptive multitasking
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
TASK SCHEDULING
Non preemptive scheduling
FIFO/FIFS
LIFO/LCFS
SJF
Priority based scheduling
Preemptive scheduling
SJF/SRT
RR Scheduling
Priority based scheduling
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Round Robin Scheduling
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
TASK COMMUNICATION
Co operating process
1. Co operation through sharing
2. Co operation through communication
Competing process
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
IPC COMMUNICATION MECHANISMS
Shared Memory
Message Passing
RPC and sockets
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
SHARED MEMORY
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
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PIPES:
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
MEMORY MAPPED OBJECTS:
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Message Passing
Message Queue:
Concept of message queue based indirect messaging for IPC
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Mail box
Concept of Mailbox based indirect messaging for IPC
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Remote Procedure Call ( RPC) and Sockets
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
SOCKETS
Internet socket (INET):
Stream sockets
Datagram sockets
UNIX socket
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
TASK SYNCHRONISATION
ISSUES IN TASK COMMUNICATION:
• Racing
• Dead lock
1.Mutual exclusion
2.Hold & wait
3.No resource pre emption
4.Circular wait
• All four conditions are known as Coffman conditions
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Racing Condition:
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Deadlock visualisation
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Scenarios leading to deadlock
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
ADITYA ENGINEERING COLLEGE (A)
Hardware Software Co-Design
(UNIT-IV-PART 2)
K.PAVANI
Sr.Assistant Professor
Department of Electronics and Communication Engineering
Aditya Engineering College (A)
Email: [email protected]
Aditya Engineering College (A)
Contents
Fundamental Issues in Hardware Software Co-Design
Computational models in embedded design
Hardware software Trade-offs
Integration of Hardware and Firmware.
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
FUNDAMENTAL ISSUES IN HARDWARE SOFTWARE CO-DESIGN
Selecting the model
Selecting the Architecture:
a. Controller architecture
b. Data path architecture
c. Finite state machine data path
d. CISC architecture
e. VL instruction word
f. Parallel processing architecture
Selecting languages
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Computational models in embedded design
Data Flow Graph (DFG) model
Control Data Flow Graph/Diagram(CDFG)
State Machine model
Sequential Program model
Concurrent/Communicating Process Model
Object Oriented model
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Data Flow Graph/Diagram (DFG) Model:
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Control Data Flow Graph/Diagram (CDFG):
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
State Machine Model:
FSM Model for Automatic seat belt warning system
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
FSM Model for timer
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
FSM Model for Automatic Tea\Coffee Vending Machine
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
FSM Model for Coin Operated Telephone System
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Sequential Program Model:
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Concurrent/Communicating Process Model:
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
HARDWARE SOFTWARE TRADE-OFFS
Processing speed and performance
Frequency of change
Memory size and gate count
Reliability
Man hours(effort) and cost
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Integration of Hardware and Firmware
Embedding of firmware into target hardware board.
Process of “embedding intelligence” to the product.
Techniques :
1. Out of circuit Programming
2. In system Programming (ISP)
a.In system programming with SPI Protocol
3. In Application programming (IAP)
4. Use of factory Programmed chip
5. Firmware loading of Operating system based devices
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
Out-of-Circuit Programming
The processor or memory chip into which the firmware needs to be embedded is taken out of the target board
and it is programmed with the help of a programming device
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
IN SYSTEM PROGRAMMING (ISP)
• Programming is done “within the system”
• ISP support
• Target board, PC, ISP cable and ISP utility are the main requirements
IN SYSTEM PROGRAMMING WITH SPI PROTOCOL
Contains a built in SPI interface or on chip EEPROM or flash memory is programmed through this interface
I/O lines:
MOSI: master out slave in
MISO: master in slave out
SCK : system clock
RST :reset of target device
GND : ground of target device
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
Aditya Engineering College (A)
IN APPLICATION PROGRAMMING (IAP)
• Can modify selected portion of code memory
USE OF FACTORY PROGRAMMED CHIP
• Firmware is embedded at the time of chip fabrication
FIRMWARE LOADING OF OPERATING SYSTEM BASED DEVICES
• ISP technique
• A special code called boot loader program is used for pre loading or loading the memory using JTAG
Embedded Systems K.Pavani,Sr.Assistant Professor,Department of ECE 4/25/23
