M2 Session4
M2 Session4
Program Translation
• LLL produces more efficient code but they are harder to write, less
portable and more prone to errors and harder to maintain.
• Optimizing compilers improves the performance of inefficiency
intoduced by HLLs.
Optimization for computer architecture .
• The rapid evolution of computer architecture has also demand for
new compiler technology. Almost all high performance systems
take advantage of the two basic techniques
• Parallelism
• Memory hierarchies.
• Programmer can write multi threaded code for multiprocessor or parallel code can
be automatically generated by a compiler from sequence program.
• Such a compiler hides from the programmer the details of finding parallelism in a
program distributing the computation across the machine and minimizing
synchronization and communication among the processor.
Memory Hierarchies
• A memory hierarchies consists of several levels of storage with different
speeds and sizes.
• With the level closet to the processor being the fastest but smallest..
• Both parallelism and the existence of a memory hierarchy improve the
potential performance of a machine.
• Memory hierarchies are found in all machine.
• A processor usually has a small number of registers consisting of 100
bytes , several level of caches containing kilo bytes to mega bytes,
physical memory containing mega bytes to giga bytes , finally secondary
storage that contains giga bytes and beyond.
• It is possible to improve the effectiveness of memory hierarchy by
changing the layout of the data or changing the order of instructions
accessing the data.
Design of new Computer architecture
• In early day of computer architecture design , compiler are developed
after the machine were built. That has changed now.
• In modern computer architecture development compiler are developed
in the processor design stage and compiled code running on simulator
is used to evaluate the proposed architectural features.
1.RISC [ Reduced instruction set computer]: Most architecture like power
pc, SPARC, MIPS, alpha are RISC concepts.
2.CISC [ complex instruction set computer]: It includes complex memory
addressing modes to support data structures accesses and procedure
invocation instruction that save register and pass parameter on the stack.
8086 architecture are CISC concepts.
All these architecture are developed by corresponding compiler technology.
Program Translations
• Compiler as a translation from a high level language to the machine
level same technology can be applied to translate between different
kinds of language.
1. Binary Translation
• Complier technology can be used to translate the binary code for one
machine to that of another allowing a machine to run programs
originally complied for another instruction set.
• Binary translation technology has been used by various computer
companies to increase the availability of software for their machine.
• Binary translator have been developed to convert 8086 code into alpha
and sparc code.
2. Hardware Synthesis
• Not only in software written H.L.L , even hardware design are mostly
described in high level language . Hardware description language like
VHDL (very high speed integrated circuit hardware description
language)
Type checking
Bounds Checking