Week 6

Data Transfer Instructions

AR101 - Computer Architecture and Organization

 At the end of the session, the students should be
able to:

 Identify the different Data Transfer Instructions.

 Use the data transfer instructions command

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

Data Transfer Instructions

•These instructions are used to move data between the registers, or
between memory and the registers. These instructions perform a simple
task – to copy data from a source to a destination. While copying the
contents stored in the source are not altered.

•Data transfer instructions are the instructions which transfers data in the
microprocessor. They are also called copy instructions.

•Data Transfer Instruction, Description and Examples

AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Classifications of Instructions:

1. Data Transfer Instructions

2. Arithmetic Instructions
3. Logic Instructions
4. Shift Instructions
5. Rotate Instructions
6. Flag Control Instructions
7. Jump Instructions
8. String Instructions
https://docs.oracle.com/cd/E19253-01/817-5477/eoizm/index.html

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

The MOV Instruction

The MOV instruction facilitates the movement of data either between
registers or between a register and main memory. They do not affect
the flags.

Format: MOV D, S
Action: D [S]

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

MOV Instruction
Destination Source Example
Register Register MOV CX, BX
Register Main Memory MOV CX, [BP + SI]
Main Memory Register MOV [BX], DX
Register Immediate MOV CX, 80FEH
Main Memory Immediate MOV word ptr [BX], 1834H
Segment Register Register MOV DS, BX
Register Segment Register MOV AX, CS
Segment Register MM MOV SS, [1AFFH]
Main Memory Segment Register MOV [BP + SI + 1000H], DS

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

Example – MOV Instruction

• Determine the contents of all the affected general-purpose registers and memory addresses after
executing the following program. Each instruction is dependent of one another. Whenever
necessary, use the memory map (handout) for additional data. Assume the following register
contents:

AX = 0015H BP = 0002H CS = 3000H

BX = 0019H SP = 0035H DS = 2000H
CX = 0012H DI = 0017H SS = 2000H
DX = 001BH SI = 001EH ES = 4000H

MOV AX, BX
MOV DI, 0005H
MOV [BP + SI], AX
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

The XCHG Instruction

The XCHG (Exchange) instruction swaps the contents of the source and
destination operands.

Format: XCHG D, S
Action: [D] [S]

Destination Source Example

MM Register XCHG [BX], CX
Register Register XCHG AH, BL

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

Example – XCHG Instruction

Determine the contents of all the affected general-purpose registers and memory addresses
after executing the following program. Each instruction is dependent of one another.
Whenever necessary, use the memory map (handout) for additional data. Assume the
following register contents:
AX = 0015H BP = 0002H CS = 3000H

BX = 0019H SP = 0035H DS = 2000H

CX = 0012H DI = 0017H SS = 2000H

DX = 001BH SI = 001EH ES = 4000H

XCHG DI, SI
XCHG BX, [CX]
XCHG [BX + 0020H], AX
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Exercise # 1
• Unless otherwise stated, determine the contents of all the affected general-purpose
registers and memory addresses after executing the following program. Each
instruction is dependent of one another. Whenever necessary, use the memory map
(handout) for additional data. Assume the following register contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H
CX = 0012H DI = 0017H SS = 2000H
DX = 001BH SI = 001EH ES = 4000H

MOV AX, 0034H

XCHG CX, [AX]
MOV [CX + SI], BX

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

Exercise #2
• Unless otherwise stated, determine the contents of all the affected general-purpose
registers and memory addresses after executing the following program. Each
instruction is dependent of one another. Whenever necessary, use the memory map
(handout) for additional data. Assume the following register contents:
AX = 0015H BP = 0002H CS = 3000H

BX = 0019H SP = 0035H DS = 2000H

CX = 0012H DI = 0017H SS = 2000H

DX = 001BH SI = 001EH ES = 4000H

XCHG AX, BX
MOV [CX], AX
XCHG BX,[CX + SI + 000FH]

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

The PUSH Instruction

The XCHG (Exchange) instruction swaps the contents of the source and
destination operands.
Format: PUSH S
Action: SP SP - 2
[SP + 1] [SH]
[SP] [SL]
Source Example
Register PUSH AX
Seg Reg PUSH DS
MM PUSH BETA

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

Example – PUSH Instruction

• Unless otherwise stated, determine the contents of all the affected general-
purpose registers and memory addresses after executing the following program.
Each instruction is dependent of one another. Whenever necessary, use the
memory map (handout) for additional data. Assume the following register
contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H

CX = 0012H DI = 0017H SS = 2000H

DX = 001BH SI = 001EH ES = 4000H

PUSH AX
PUSH [BX]
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Exercise # 3
• Unless otherwise stated, determine the contents of all the affected general-
purpose registers and memory addresses after executing the following program.
Each instruction is dependent of one another. Whenever necessary, use the
memory map (handout) for additional data. Assume the following register
contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H
CX = 0012H DI = 0017H SS = 2000H
DX = 001BH SI = 001EH ES = 4000H

PUSH DX
PUSH [BX + DI]
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

The POP Instruction

POP transfers a word data pointed to by SP to the destination operand.
Afterwards, the value of SP is incremented by 2.
Format: POP D
Action: DL [SP]
DH [SP + 1]
SP SP + 2
Destination Example
Register POP AX
Seg Reg POP DS
MM POP BETA

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

Example – POP Instruction

• Unless otherwise stated, determine the contents of all the affected general-
purpose registers and memory addresses after executing the following program.
Each instruction is dependent of one another. Whenever necessary, use the
memory map (handout) for additional data. Assume the following register
contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H

CX = 0012H DI = 0017H SS = 2000H

DX = 001BH SI = 001EH ES = 4000H

POP AX
POP [BX]
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Exercise # 4
Unless otherwise stated, determine the contents of all the affected general
purpose registers and memory addresses after executing the following program.
Each instruction is dependent of one another. Whenever necessary, use the
memory map (handout) for additional data. Assume the following register
contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H
CX = 0012H DI = 0017H SS = 2000H
DX = 001BH SI = 001EH ES = 4000H

POP CX
POP[BX + DI + 000AH]
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Exercise #5
• Unless otherwise stated, determine the contents of all the affected general-purpose registers and
memory addresses after executing the following program. Each instruction is dependent of one
another. Whenever necessary, use the memory map (handout) for additional data. Assume the
following register contents:
AX = 0015H BP = 0002H CS = 3000H

BX = 0019H SP = 0035H DS = 2000H

CX = 0012H DI = 0017H SS = 2000H

DX = 001BH SI = 001EH ES = 4000H

POP CX
POP [BP + SI + 0010H]
PUSH SI
PUSH [DI]
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

The LEA Instruction

The LEA (Load Effective Address) instruction is for transferring the
effective address (not data) of the source operand to the destination
operand.
Format: LEA D, S
51802H 44H
Action: D EA of S
51801H 33H
51800H 22H
Example: Assume the following: 517FFH 11H

DS = 5000H
LIST = 1800H
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Example – LEA Instruction

• Unless otherwise stated, determine the contents of all the affected general-purpose registers and
memory addresses after executing the following program. Each instruction is dependent of one
another. Whenever necessary, use the memory map (handout) for additional data. Assume the
following register contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H

CX = 0012H DI = 0017H SS = 2000H

DX = 001BH SI = 001EH ES = 4000H

LIST = 0020H ALPHA = 0030H GAMMA = 0040H

MOV AX, LIST
LEA BX, ALPHA
LEA DI, GAMMA
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

Exercise # 6
Unless otherwise stated, determine the contents of all the affected general purpose registers and
memory addresses after executing the following program. Each instruction is dependent of one
another. Whenever necessary, use the memory map (handout) for additional data. Assume the
following register contents:
AX = 0015H BP = 0002H CS = 3000H
BX = 0019H SP = 0035H DS = 2000H
CX = 0012H DI = 0017H SS = 2000H
DX = 001BH SI = 001EH ES = 4000H

LEA AX, LIST

MOV ALPHA, BX
MOV GAMMA, DI
LEA SI, ALPHA
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

End of Lesson…
•References:
•
•[1]
https://www.includehelp.com/embedded-system/data-transfer-instructions-8086-microprocesso
r.aspx
•
•[2] Data transfer instructions in 8086 microprocessor - GeeksforGeeks
•[3] Williams, Stallings (2010), Computer Organization and Architecture:
• Designing for Performance (8th Edition, Prentice Hall, New Jersey).
•
•[4] Stalling, William, Computer Organization and Architecture:
• Principles of Structure and Function (4th Edition)
AR101 - Computer Architecture and Organization
 Week 6– Data Transfer Instructions

OPCODE OPERAND EXPLANATION EXAMPLE

MOV D, S D=S MOV AX, [SI]

PUSH D pushes D to the stack PUSH DX

POP D pops the stack to D POP AS

PUSHA none put all the registers into the stack PUSHA

POPA none gets words from the stack to all registers POPA

XCHG D, S exchanges contents of D snd S XCHG [2050], AX

IN D, S copies a byte or word from S to D IN AX, DX

Here D stands for destination and S stands for source.

D and S can either be register, data or memory address.

AR101 - Computer Architecture and Organization

 Week 6– Data Transfer Instructions

OUT D, S copies a byte or word from D to S OUT 05, AL

XLAT none translates a byte in AL using a table in the memory XLAT

LAHF none loads AH with the lower byte of the flag register LAHF

SAHF none stores AH register to lower byte of the flag register SAHF

PUSHF none copies the flag register at the top of the stack PUSHF

POPF none copies a word at the top of the stack to the flag register POPF

Here D stands for destination and S stands for source.

D and S can either be register, data or memory address.

AR101 - Computer Architecture and Organization