COMPUTER AIDED DIGITAL DESIGN
Sumanth Sakkara
Department of Electronics and Communication Engineering.
COMPUTER AIDED DIGITAL DESIGN
Hardware Description Language 2
Mr. Sumanth Sakkara
Department of Electronics and Communication
Engineering.
Computer Aided Digital Design
FINITE STATE MACHINES
FINITE STATE MACHINES (FSM) :
HDL descriptions of state machines are correspondingly divided into three parts
to model the
1.State register
2.Next state logic .
3.Output logic.
In Moore machines, the outputs depend only on the current state of the
machine.
In Mealy machines, the outputs depend on both the current state and the
current inputs
Computer Aided Digital Design
FINITE STATE MACHINES
Example: FSM STATE ENCODING
• Alyssa P. Hacker has a snail that crawls down a paper tape with 1’s and 0’s on it. The
snail smiles whenever the last two digits it has crawled over are 01. Design Moore
and Mealy FSMs of the snail’s brain. sequence 0100110111
.
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Example: FSM STATE ENCODING
• Alyssa P. Hacker has a snail that crawls down a paper tape with 1’s and 0’s on it. The
snail smiles whenever the last two digits it has crawled over are 01. Design Moore
and Mealy FSMs of the snail’s brain.
.
Moore FSM Mealy FSM
Reset Reset
0 1 0/0
S0 S1 S2 S0 S1
0 0 1
1 0 0 1/0 0/0
1
1/1
Mealy FSM: arcs indicate input/output
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Moore FSM
Reset
0 1
S0 S1 S2
0 0 1
1 0 0
1
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Moore FSM
Reset
0 1
S0 S1 S2
0 0 1
1 0 0
1
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Mealy FSM
Reset
0/0
S0 S1
1/0 0/0
1/1
Computer Aided Digital Design
Hardware Description Language 2 : PATTERN RECOGNIZER MOORE FSM
Mealy FSM
Reset
0/0
S0 S1
1/0 0/0
1/1
Computer Aided Digital Design
Hardware Description Language 2
FINITE STATE MACHINES (FSM) :
Two traffic sensors, TA and TB, Each sensor
indicates TRUE if students are present and FALSE
if the
street is empty.
.
Two traffic lights, LA and LB, to control traffic.
Each light receives digital inputs specifying
whether it should be green, yellow, or red. Hence,
his FSM has two inputs, TA and TB, and two
outputs, LA and LB.
A clock with a 5-second period. On each clock tick
(rising edge), the lights may change based on the
traffic sensors.
Inputs: CLK, Reset, TA, TB
Black box view of finite state machine
Outputs: LA, LB
Computer Aided Digital Design
Hardware Description Language 2
•FINITE STATE MACHINES (FSM) State transition diagram :
In a state transition diagram, circles represent
states and arcs represent transitions between
. states.
The transitions take place on the rising edge of
the clock;
Computer Aided Digital Design
Hardware Description Language 2
:
FSM: HDL Program
Computer Aided Digital Design
Hardware Description Language 2
:
Computer Aided Digital Design
Hardware Description Language 2
:
Sketch the state transition diagram for
the FSM described by the following HDL
code. An FSM of this nature is used in a
branch predictor on some
microprocessors.
Computer Aided Digital Design
Hardware Description Language 2
:
THANK YOU
Sumanth Sakkara
Department of Electronics and Communication
[email protected]+91 80 6666 3333 Ext 741