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Chapter 3 Boolean Algebra and Logic Circuits

This document discusses Boolean algebra and logic circuits. It begins by defining Boolean algebra as the manipulation of variables that can have one of two values, such as true/false or on/off. Boolean expressions are created using common operators like AND, OR, and NOT. Logic gates are used to implement Boolean functions electronically, with gates like AND, OR, NOT, NAND, and NOR. Boolean algebra identities and theorems can be used to simplify Boolean expressions and logic circuits. Karnaugh maps provide a systematic way to simplify functions with up to four variables.

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0% found this document useful (0 votes)
16 views

Chapter 3 Boolean Algebra and Logic Circuits

This document discusses Boolean algebra and logic circuits. It begins by defining Boolean algebra as the manipulation of variables that can have one of two values, such as true/false or on/off. Boolean expressions are created using common operators like AND, OR, and NOT. Logic gates are used to implement Boolean functions electronically, with gates like AND, OR, NOT, NAND, and NOR. Boolean algebra identities and theorems can be used to simplify Boolean expressions and logic circuits. Karnaugh maps provide a systematic way to simplify functions with up to four variables.

Uploaded by

fofpof
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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BOOLEAN ALGEBRA

& LOGIC CIRCUITS


Boolean Algebra and Logic Gates
2
Boolean Algebra
Boolean Algebra
3

 Manipulation of variables that can have 1 of 2


values
 “true” and “false” in formal logic
 “on” and “off”, 1 and 0, or “high” and “low” in digital
systems

 Boolean expressions are created by performing


operations on Boolean variables
 Common Boolean operators : AND, OR, and NOT
Boolean Operators AND OR
4

 Described using a truth table


 AND operator = Boolean product
 OR operator = Boolean sum
Boolean Operator NOT
5

 Describedusing a truth table


 NOT operation is designated by an overbar
 Sometimes indicated by a prime mark ( ‘ ) or an
“elbow” ()
Boolean Function
6

 at least 1 Boolean variable,


Consists  at least 1 Boolean operator, and
of  at least 1 input from the set {0,1}

Produces an output that is also a member of the set


{0,1}
Boolean Function
7

 Truth table for Boolean function


Rules of precedence
8

 NOT has highest priority,


followed by AND
and then OR
Boolean Algebra and Computers
9

Computers contain circuits that implement Boolean


functions
 The simpler the Boolean function, the smaller the

circuit
 Simpler circuits are cheaper to build, consume less power,
and run faster
 There are a number of Boolean identities that help us
simplify Boolean functions
Boolean Identities (1)
10

 2 forms : AND (product) form, OR (sum) form


Boolean Identities (2)
11
Boolean Identities (3)
12

 Most useful
Using Boolean Identities (1)
13

 To simplify the function


Using Boolean Identities (2)
14

 Sometimes more economical to build a circuit using


the complement of a function (and complementing
its result) than to implement the function directly

 DeMorgan’s law provides an easy way of finding


the complement of a Boolean function
Using DeMorgan’s Law
15

 Replaceeach variable by its complement and


change all ANDs to ORs and all ORs to ANDs
Minterms & Maxterms
16

 Any Boolean expression may be expressed as:


 Minterms
 Product terms that contain all of the function’s variables
exactly once, either complemented or not complemented

 Maxterms
 Sum terms that contain all of the function’s variables
exactly once, either complemented or not complemented
2-variable expression
17

X Y Minter Maxter
m m
0 0 X'.Y' X+Y
0 1 X'.Y X+Y'
1 0 X.Y' X'+Y
1 1 X.Y X'+Y'

Any minterm is the complement of the corresponding


maxterm
3-variable expression
18

X Y Z Minter Maxter
m m
0 0 0 X'.Y‘.Z’ X+Y+Z
0 0 1 X'.Y‘.Z X+Y+Z’
0 1 0 X'.Y.Z’ X+Y‘+Z
0 1 1 X'.Y.Z X+Y‘+Z

1 0 0 X.Y‘.Z’ X'+Y+Z
1 0 1 X.Y‘.Z X'+Y+Z’
1 1 0 X.Y.Z’ X'+Y‘+Z
Canonical Form (1)
19

 Many forms for the same Boolean expression


 Logically equivalent forms
 Identical truth tables

 To eliminate confusion, use canonical form

Canonical forms are generally not simplified


Canonical Forms (2)
20

 2 canonical forms for Boolean expressions :


 sum-of-products and product-of-sums

 Sum-of-products : minterms are ORed together


F(x, y, z) = xyz + x’y + xyz’

 Product-of-sums : maxterms are ANDed together


F(x, y, z) = (x+z) . (x+y’+z’) . (x+y+z’)
Sum-of-Products (SOP)
21

Sum of minterms

 Derive SOP from truth table,


 OR together all of the minterms which give an
output value of 1
Converting Function To SOP
22

X Y F Minter
m
0 0 0 X'.Y'
0 1 0 X'.Y
1 0 1 X.Y'
1 1 1 X.Y

f(X.Y) = X.Y' + X.Y


Products-of-Sums (POS)
23

Product of maxterms

 Derive POS from truth table,


 AND together all of the maxterms which give an
output value of 0
Converting Function To SOP
24

X Y F Maxter
m
0 0 1 X+Y
0 1 0 X+Y'
1 0 1 X'+Y
1 1 1 X'+Y'

F(X,Y) = (X+Y')
Example
25

SOP
Exercise Give SOP and POS forms
26

X Y Z Functio
n
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0
Exercise Give SOP and POS forms
27

X Y Z Functio X Y F Maxter
n m
0 0 0 1
0 0 1 X+Y
0 0 1 0
0 1 0 X+Y'
0 1 0 0
1 0 1 X'+Y
0 1 1 1
1 1 1 X'+Y'
1 0 0 0

1 0 1 1 F(X,Y) = (X+Y')
1 1 0 1

1 1 1 0
28
Logic Gates
Digital Logic
29

 Implement Boolean functions with transistors


5 volts represent Boolean true or 1
0 volts represent Boolean false or 0
Logic Gates
30

 Used to implement Boolean functions


 Electronic devices that produce result based on 2
or more input values
 Consist of 1 to 6 transistors
Logic Gates: AND, OR, and
NOT
31
Logic Gate: exclusive OR
(XOR)
32

 Output of XOR is true only when inputs differ


Logic Gates: NAND and NOR
33
Logic Gates: NAND and NOR
34

(X.Y) X. (X.Y)
’ Same as Y ’

(X+Y) X+Y (X+Y)’


’ Same as
Logic Gates: NAND and NOR
35

 Universal gates
 Inexpensive to manufacture
 Any Boolean function can be constructed using only
NAND or only NOR gates
Logic Gates
36

 Gatescan have multiple inputs and more than one


output
 A second output can be provided for the complement
of the operation
Exercise
37

 Investigatethe relationship between the following


circuits. Which law does it represent?
DeMorgan’s Law

38
DeMorgan’s Law

39
Notation Used at Circuit Intersections
Exercise
41

 Simplify x · (x + y)==x · x + x · y
=x+x·y
= x · (1 + y)
=x·1
=x Absorption law
 Simplify x + (x · y)==x · (1 + y)
=x·1
=x
Exercise
42

1. Select the Boolean expression that is not equivalent to x.x+x.x’


(a) x · (x + x’) (b) (x + x’) · x (c) x’ (d) x
2. Select the expression which is equivalent to x · y + x · y · z
(a) x · y (b) x · z (c) y · z (d) x · y · z
3. Select the expression which is equivalent to (x + y) · (x + y’)
(a) y (b) y’ (c) x (d) x’
4. Select the expression that is not equivalent to x · (x’ + y) + y
(a) x · x’ + y · (1 + x) (b) 0 + x · y + y
(c) x · y (d) y
Exercise
43

 Obtain the expression of the following circuits

A.B.C’

A.B(A’+BC)’
Exercise 11
44

 Give the canonical SOP form of this function:


F(x,y,z) = xy + yz
= xy (z+z’) + (x+x’)yz
= xyz + xyz’ + xyz + x’yz
= xyz + xyz’ + x’yz
45
Simplifying Logic Circuits
Simplifying Logic Circuits
46

Obtaining one Boolean function for the circuit

Simplifying the Boolean function


Simplifying Boolean Functions
47

2 approaches

Using Boolean Using Karnaugh


identities maps
time-consuming and/or error-prone systematic,
step-by-step approach
Using Boolean Identities
48

 Simplify by trying 3 things :


 Grouping
 Multiplication by redundant variables
 Application of DeMorgan's Theorem
Using Boolean Identities
49

 Grouping :
 Given A + AB + BC
 write it as A(1+ B) + BC

 then apply 1+ B =1

 Minimized form A + BC
Using Boolean Identities
50

 Multiplication by redundant variables


 Multiplying by terms of the form (A + A’) does not
alter the logic
 Given AB + AC’ + BC
= AB (C + C’) + AC’ + BC
= ABC + ABC’ + AC’ + BC
= BC (A + 1) + AC’ (B + 1)
= BC + AC’
Using Boolean Identities
51

 Application of DeMorgan's Theorem


 ((AB’C) + (ACD)’ + BC’)’ = ABCD
Example
52

Design a logic circuit having 3 inputs, A, B, C will have its output


HIGH only when a majority of the inputs are HIGH

 Step 1 Set up the truth table

 Step 2 Write the minterms


for each case where the output is 1
Example
53

 Step 3 Write the SOP form the output

 Step 4 Simplify the output expression


Example
54

 Step 5 Implement the circuit


55
Karnaugh Maps
K-maps
K-Map Forms
56

Sum-of-Product (SOP) Form Product-of-Sum (POS) Form

Based on Based on maxterms


minterms
SOP K-map
57

 Table with 1 cell for each minterm


1 cell for each line of the truth table of a function

Truth table

K-map
SOP K-map
58

3 variable example:
x\ yz 00 01 11 10
represents
0 ? x’y’z’

1 ?? xyz’
 Each square represents 1 minterm
 Minterms are ordered according to Gray code
 only one variable changes between adjacent squares

 Squares on edges are considered adjacent to squares on opposite


edges
4 variable example :

wx\ yz 00 01 11 10
w’xy’z
00

01 ? ?? w’xyz

11

10

59
Filling out a K-map
60

K-map can be filled based on truth table or SOP

Truth table SOP form

K-map
Simplification based on SOP K-
map
61

 Finding adjacent 1’s in the k-map


 Remember that adjacent squares differ by only one variable
 Hence the combination of 2 adjacent squares has the form
P ( x + x’ )
 This can be simplified to just P
Example
62

Hence the Boolean function reduces to x + y


Rules of SOP Grouping
63

 Groupings can contain only 1’s; no 0’s


 Diagonal groups are not allowed
 The number of 1’s in a group must be a power of 2 – even if it
contains a single 1
 The groups must be made as large as possible
 Groups can overlap and wrap around the sides of the K-map
64

Hence the Boolean function reduces to z


65

Hence the Boolean function reduces to x’ +


z’
66
Choosing SOP K-map Groups
67

 Possible to have different pick groups within a Kmap, while


keeping the groups as large as possible
 The (different) functions that result from the groupings below
are logically equivalent
Don’t Care Conditions
68

 Some minterms may never occur or not matter


 In K-map, X means “don't care”

 When minimizing , X is like a "joker"


 X can be 0 or 1 - whatever helps best with the minimization
Example
69

simplifies to B if X is assumed 1
Don’t Care Example
70
Don’t Care Example w/ One
Grouping
71
Don’t Care Example w/ Different
Grouping
72
Don’t Care Origins
73

 Realcircuits don’t always need to have an output


defined for every possible input

 Set
of inputs that can never happen = “don’t care”
condition
K-Map with 5 variables
74
75
76
K-Map with 6 variables

77
78
POS K-map
79

 Product-of-sums form
 Same principles as SOP K-map but applied to zeros
of the function
Rules of POS Grouping
80

 Groupings can contain only 0s; no 1s


 Diagonal groups are not allowed
 The number of 0s in a group must be a power of 2 –
even if it contains a single 0
 The groups must be made as large as possible
 Groups can overlap and wrap around the sides of the K-
map
4-Variable SOP K-Map
81
4-Variable POS K-Map
82
Conversion between SOP and POS
forms
83
84
Behind Logic Design
At transistor level
Electrical Terminology
85

 Voltage
 Quantifiable property of electricity
 Measure of potential force
 Unit of measure: volt
 Current
 Quantifiable property of electricity
 Measure of electron flow along a path
 Unit of measure: ampere (amp)
Electrical Analogy
86

 Voltageis analogous to water pressure


 Current is analogous to flowing water
 Can have
 High pressure with little flow
 Large flow with little pressure
Voltage
87

 Can only be measured as difference between 2


points
 To measure voltage
 Assume one point represents zero volts (known as
ground)
 Express voltage of 2nd point wrt. ground
In Practice
88

 Typical digital circuit operates on 5 volts


 2 wires connect each chip to power supply
 Ground (0 volts)
 Power (5 volts)

 Digital
logic diagrams do not usually show power
and ground connections
Transistor
89

 Basic building block of digital circuits


 Operates on electrical current
large current is proportional to small
 3 external connections
current
 Emitter
 Base (control)
 Collector
Transistors and Boolean Algebra
90

 Can implement Boolean functions with transistors


5 volts represent Boolean 1
0 volts represent Boolean 0
Not Gate at Transistor Level
 When input is 0 volts,
output is 5 volts

 When input is 5 volts,


output is 0 volts
2-Input NAND and NOR Gates
93
Exercices
Exercise
94

 Minimize the following Boolean function using


sum of products (SOP):
 • f(a,b,c,d) = ∑m(3,7,11,12,13,14,15)

abcd
3 0011 a`b`cd
7 0111 a`bcd

11 1011 ab`cd

12 1100 abc`d`

13 1101 abc`d

14 1110 abcd`

15 1111 abcd
Exercise
95

f(a,b,c,d) = ∑m(3,7,11,12,13,14,15)
=a`b`cd + a`bcd + ab`cd + abc`d`+ abc`d + abcd` + abcd
=cd(a`b` + a`b + ab`) + ab(c`d` + c`d + cd` + cd )
=cd(a`[b` + b] + ab`) + ab(c`[d` + d] + c[d` + d])
=cd(a`[1] + ab`) + ab(c`[1] + c[1])
=ab+ab`cd + a`cd
=ab+cd(ab` + a`)
=ab+ cd(a + a`)(a`+b`)
= ab + a`cd + b`cd
= ab +cd(a` + b`)
Exercise
96

 f(a,b,c,d) = ∏M(0,1,2,4,5,6,8,9,10)

=∑m(3,7,11,12,13,14,15)
=[(a+b+c+d)(a+b+c+d`)(a+b`+c`+d`)
(a`+b+c`+d`)(a`+b`+c+ d)(a`+b`+c+ d`)
(a`+b`+c`+d)(a`+b`+c`+d`)]
Simplify algebraically
97

 F(A,B,C) = B(A’+AC) + AB’C


= A’B + AC
 F(A,B,C,D) = ABC’ + A’C’D + AB’C’ + BC’D
+ A’D
= A’D + C’(A+BD)
Simplify using K-maps
98

 F(A,B,C,D) =∑m(0,1,2,3,8,9,10,11,13)
 F(A,B,C,D) = ∏M(1,3,4,5,8,9)

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