EE382V Fall 2006

VLSI Physical Design Automation

Detailed Routing (II)

Prof. David Pan

[email protected]
Office: ACES 5.434

10/18/08 1
Yoshimura and Kuh’s Method

Source:
“Efficient Algorithms for Channel Routing”
by T. Yoshimura and E. Kuh
IEEE Trans. On Computer-Aided Design of Integrated
Circuits and Systems.
Vol. CAD-1, pp25-35, Jan 1982

2
Characterizing Channel Routing Problem
0 1 4 5 1 6 7 0 4 9 10 10
4 10
1 7

5 6
9
2

3 8
2 3 5 3 5 2 6 8 9 8 7 9

1 4 10 1
2
3
5 9 7
5 4 6
6
3 8
2 8 7
10
Vertical constraint graph Gv 9
Horizontal constraint graph

3
 Zone Representation
0 1 4 5 1 6 7 0 4 9 10 10

2 3 5 3 5 2 6 8 9 8 7 9
2 1 1 1 1 2 4 4 4 7 7 9
2 2 2 2 4 6 7 7 8 9 10
3 3 3 4 6 7 8 8 9 10
4 4 5 9
5 5
Zone: 1 2 3 4 5
Remarks: A new zone appears when some
intervals begin after some intervals end. 4
 Zone Representation

2 1 1 1 1 2 4 4 4 7 7 9
2 2 2 2 4 6 7 7 8 9 10
3 3 3 4 6 7 8 8 9 10
4 4 5 9
5 5

1 7
2 8
3 9
4 10
5 6

Zone: 1 2 3 4 5
5
 Merging of Nets
1 4 10

5 9 7 1 7
2 8
3 9
3 8 6 4 10
5 6

2
4 10
1 7 1 7
2 8
5,6 9 3
4
9
10
5,6

2 8
3 6
 Scanning the Zones
1 7
2 8 Left = {1, 3, 5}
3 9
4 10 Right = {6}
5 6

1 7
2 8 Left = {1, 2, 3}
3 9
4 10 Right = {7}
5,6

1,7
2 8 Left = {2, 3, 5.6}
3 9
4 10 Right = {8, 9}
5,6 7
 Scanning of Zones

1,7
2 Left = {2, 3.8, 4}
3,8
4 10 Right = {10}
5,6,9

1,7
2
3,8
4,10
5,6,9

8
 Merging VCG
1 4 10 4 10
1 7
5 9 7
5,6 9
3 8 6
2 8
2 3 10
10
4,10
1,7 1,7 1,7 4
4

5,6,9 5,6 9
5,6,9

2 8
2 3,8 3
2 3,8 9
 Assigning Tracks

4,10 Track 1

1,7 Track 2

5,6,9 Track 3

Track 5 (or 4) 2 3,8 Track 4 (or 5)

10
 Merging of Nets

• Make sure that the VCG remains acyclic

• There are two approaches:
– First approach: Merge the pairs sequentially. Select pairs to
minimize the increase in the length of the longest path in the
VCG.
– Second approach: Merge all pairs simultaneously. Select
pairs to maximize the total no. of matches.
• We will focus on the second approach: “simultaneous
merging”.

11
 Shortcomings of the First Approach
Observation: Merging of two nodes may block
subsequent merging
1 2 3 4
a d h a d
f
b e b
c f e h
g k c
g k

1 2 3 4
a.d h a.d
f
b.e
c f b.e h
g k k
c g

Net f cannot be merged with either c or g. But, if we

merged a with d, c with e then f can be merged with net
b

12
 Processing Zone
Processing
Zone 1 a d h a d
b e f
b
c f e h
g k c
g k

Bipartite graph a d
Delay merging!!(Both d and e
LEFT={a,b,c} b
e do not terminate at zone 2
RIGHT={d,e} c
Cyclic conflict!!
Processing Zone 2
Merge a&d, b&f, delay merging c&e
a d Modify a d
matching LEFT={a.d, b.f,c,g}
b e b e
RIGHT={h,k,e}
c f c f
Merge two nets when both of them
g g terminate!

13
 Simultaneous Merging
Use the maximum cardinality matching in
bipartite graph:

1 7
2 8 Left = {1, 3, 5}
3 9
4 10 Right = {6}
5 6

1
Find the maximum matching
3 6 in this bipartite graph such that

5
the resultant VCG is still acyclic.
14
 Cyclic Conflicts
Simultaneous merging can produce cyclic conflicts:

Bipartite graph, G VCG

2 2 3 1 3
3
1 4
1 4 2 4

1,3
2 3
Cyclic!
1 4
2,4
15
 Cyclic Conflicts

Bipartite graph Algorithm AA

A set of edges E’
G(V,E)

Theorem: Any matching in G(V,E-E’) is feasible.

16
 An Example of Algorithm AA
N = set of nodes that
have in-degree 0
a g
b h g a d
c i
d b c i
Remove edges between
vertices in N h
a g
b h g a i
c i
d c h
isolated b
17
 An Example of Algorithm AA
N
a g g a i
b h
c i b c h
No isolated node. Then
a g select among N the node
b h with the smallest degree in
the bipartite graph. Remove
c i and put its edges to E’.
isolated
a g g c i
b h
c i b h 18
 An Example of Algorithm AA
N
g g c i
b h
c i b h

g N
isolated b c i
b h
c i h

b h
c i b c h
isolated
19
 An Example of Algorithm AA

h N
b
b c h
c
b h
c
At the end, all edges are removed, and
E’ = {(a,h)}
Since E’ ≠ φ, according to the corollary, any
matching in the bipartite graph G(V, E-E’) is
feasible. We will find a matching in G(V, E-E’)
Why does it work? 20
 Comments
① Avoid unnecessary introduction of dogleg, use a
process “merging of subnets”
subnet i and subnet j can be merged⇔ merging subnet i and subnet j
will not increase the longest path length passing through H

② Reduce CPU time by:

# of edges/nodes in the bipartite graph is limited by a parameter(e.g.
=3 in the program)

③ Need not start at zone 1

In general, can obtain better results by starting at the max density
zone

Max density zone

21
Routing Examples by Y-K’s Algorithm

number of tracks=18
maximum density =18

Example 3c

number of tracks=17
maximum density =17

Example 4b

22
Routing Examples by Y-K’s Algorithm
(Cont’d)

number of tracks=20
maximum density =20
Example 5

Deutsch’s Difficult example without dogleg

number of tracks=28
maximum density =19

23
 Deutsch’s Difficult Example
# columns =174, # nets=72
density=19

Deutsch’s difficult example with doglegs

number of tracks=20
maximum density=19

24
Summary of Yoshimura and Kuh’s Algorithm

❁ Split multi-terminal nets into 2-terminal subnets

❁ Merging subnets to share tracks
❁ Consider both HCG and VCG
❁ Global matching and delayed merging help
Shortcomings
❁ Cannot produce unrestricted doglegs
❁ VCG cannot have cycle

25
 Greedy Channel Router

R.L. Rivest and C.M. Fiduccia “ A Greedy Channel

Router”, 19th DAC, 1982 P418-424
❁ A simple linear time algorithm
❁ Guarantee the completion of all the nets (may extend
to right-hand side of the channel)
❁ Produce both restricted doglegs and unrestricted
doglegs

26
 Overview of Greedy Router
Left-to-right, Column-by-column scan
c:=0;
while (not done) do
begin
c:=c+1;
complete wiring at column c;
end;

1 3 1 2 1 5
In general, a net may be
1
(1) empty (net 5)
3
(2) unsplit (nets 1,4) 4
(3) split (net 3) 3
(4) completed (net2) 2 1 2 3 4 5 4 4

27
Operations at Each Column
At each column, the greedy router tries to maximize
the utility of the wiring produced:
A: Make minimal feasible top/bottom connections;
B: Collapse split nets;
C: Move split nets closer to one another;
D: Raise rising nets/lower falling nets;
E: Widen channel when necessary;
F: Extend to next column;
1 3 1 2 1 5

2 1 2 3 4 5 4 4

28
(A) Make Minimal Feasible Top/Bottom
Connections
1 1 1 1

2 2 2 2
3 3 3 3
4 4 1 1

4 4 0 0
A A* B B*
1 1 0 0

1 1
2 2
2 2
1 3
3 3
4 4
2 2 5 5
C C* D D*
2 2 5 5

3 3 1 1
2 2 2 2
1 1 3 3
4 4 4 4
3 3 5 5
E E* F F*

29
 ( B ) Collapse Split Nets
2 2 0 0

1 1
1 1 3 3
3 3 4 4
1 1
2 2 4 4

0 0 0 0
G G* H H*
1 1 0 0
1 1
2 2
1 1
2 2
3 3 2 2
4 4 1 1
3 3 2 2
0 0 0 0
I I* J J*

30
( C ) Move Split Nets Closer

0 0

1 1
2 2
1 1

2 2

0 0

k k*

31
 ( D ) Rising/Falling

1 1

falling

falling
3 rising 3 rising
4 falling 4 falling

0 0

L L*

32
( E ) Insert New Track

0
0
1
1 5
5 1
1
6 6

7 7

M M*

33
( F ) Extend to Next Column

1
5
1

7 7

34
Comments on Greedy Router
(Rivest&Fiduccia 1982)
❁Always succeed (even if cyclic conflict is present);
❁Allows unrestricted dogleg;
❁Allows a net to occupy more than 1 track at a given column;
❁May use a few columns off the edge;

1 3 1 2 1 5

Unrestricted
dogleg

2 1 3 3 4 5 4 4
Net 1 occupies two tracks at this A column
off the edge
column; it also “ wraps-around

35
Parameters to Greedy Router

❁ Initial-channel-width icw
❁ Minimum-jog-length mjl
❁ Steady-net-constant snc
❁ Usually start icw as d. the density
❁ Mjl controls the number of vias, use a large
mjl for fewer vias
❁ Snc also controls # of vias, typical value=10

36
 Experimental Results

❁ Runs very fast

❁ 20-track solution to the Deutsch’s Difficult
Example

37