Common Collector (CC) or Emitter Follower
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Common Collector (CC) or Emitter Follower
Figure 5.64(a) An equivalent circuit of the emitter follower obtained from the circuit in Fig. 5.63(c) by reflecting all
resistances in the emitter to the base side. (b)The circuit in (a) after application of Thévenin theorem to the input
circuit composed of vsig, Rsig, and RB.
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Common Collector (CC) or Emitter Follower
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The Voltage Follower
• An application of op amp non inverting configuration
• Provides infinite input resistance and zero output resistance – A buffer amplifier
• Used to connect a high impedance source to a low impedance load
• R2 = 0 and R1 = ∞, and thus voltage gain = 1 (Unity Gain Amplifier)
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Exercise 2.9
Use the superposition principle to find the output voltage of the circuit shown in below
Ans. v0 = 6v1 +4v2
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Amplifier Frequency Response Analysis
By the end of this topic, the students are expected to:
•realize MOSFET Internal Capacitances
•understand MOSFET High Frequency Model
•analyze the detailed Frequency Response of the CS Amplifier
• realize BJT Internal Capacitances
•understand BJT High Frequency Model
• analyze the Frequency Response of the CE Amplifier
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MOSFET Internal Capacitances
• MOSFET has different internal capacitances
– e.g. Gate-Channel Capacitance (Parallel Plate Capacitor)
• Their effects have not been discussed previously
• It was assumed that these capacitances are charged and discharged instantly
• However, in practice, there is some finite time associated with it
• The models (e.g. small signal models) thus derived do not include capacitances
• These models predict constant amplifier gains independent of frequency
• Practically, the gain of every MOSFET amplifier falls off at some high frequency
• Thus MOSFET models must be augmented by including internal capacitances
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MOSFET Internal Capacitances
MOS Internal Capacitances
The S-B and D-B Depletion Layer
The Gate Capacitive Effect
Capacitances
• The gate electrode forms a parallel- • Capacitances of the reverse biased pn
plate capacitor with the channel junctions formed by the n+ source and by
the n+ drain regions with the p-type
• Oxide layer serves as the capacitor substrate
dielectric
• Csb and Cdb
• Cox = gate capacitance per unit area
• Cgs, Cgd, Cgb
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The Gate Capacitive Effect
• The gate capacitive effect can be modeled by the three capacitances
1. Cgs
2. Cgd
3. Cgb
• The values of these capacitances have to be determined differently under
different operating modes or regions of MOSFET
– Triode Region
– Saturation Region
– Cut off Region
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The Gate Capacitive Effect-Summary
1
C gs C gd WLCox Triode Region
2
2
C gs WLCox
3 Saturation
Region
C gd 0
C gs C gd 0
Cut off
C gb WLCox
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The Gate Capacitive Effect-Overlap Capacitance
• There is an additional small capacitive component that should be added to Cgs
and Cgd in all the preceding formulas
• This is the capacitance that results from the fact that the source and drain
diffusions extend slightly under the gate oxide (as shown in next slide)
• If the overlap length is denoted Lov, we see that the overlap capacitance
component is
Cov WLovCox
• Typically, Lov = 0.05L to 0.1L
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The Gate Capacitive Effect-Summary with Cov
1
C gs C gd WLCox Cov Triode Region
2
2
C gs WLCox Cov
3 Saturation
Region
C gd 0 Cov
C gs C gd 0 Cov
Cut off
C gb WLCox
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MOSFET Internal Capacitances
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The S-B and D-B Depletion Layer Capacitance
• These are the capacitances of the reverse-biased pn junctions formed inside the
MOSFET physical structure
• pn junction 1: n+ source region (also called the source diffusion) and the p-type
substrate
• pn junction 2: n+ drain region (also called the drain diffusion) and the p-type
substrate
• Thus MOSFET models must be augmented by including these internal
capacitances as well
• The underlying concept behind these capacitances is discussed first before
proceeding to the formulae
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MOSFET under RB-Depletion (Junction) Capacitance
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MOSFET under RB-Depletion (Junction) Capacitance
• When the voltage VR is first applied, a reverse current flows in the external
circuit from p to n
• This current causes the increase in width and charge of the depletion layer
• Eventually the voltage across the depletion layer will increase by the
magnitude of the external voltage VR
• We observe the analogy between the depletion layer of a pn junction and a
capacitor
• As the voltage across the pn junction changes, the charge stored in the
depletion layer changes accordingly
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Frequency Response of the CS Amplifier
• The dependence of the gain of the MOSFET common-source amplifier on the
frequency of the input signal is to be discussed here
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High Frequency Response of the CS Amplifier
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Miller’s Theorem
• Consider the circuit shown below with two circuit nodes 1 and 2
• An impedance Z is connected between these two nodes
• Nodes 1 and 2 are also connected to other parts of the circuit, as signified by
the broken lines emanating from the two nodes
• Assuming it has been determined that the voltage at node 2 is related to that
at node 1 by
V2 kV1
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Miller’s Theorem
• Miller's theorem states that impedance Z can be replaced by two impedances:
Z1 connected between node 1 and ground and Z2 connected between node 2
and ground, where
Z Z2
Z
Z1 1
(1 K ) (1 )
K
• The equivalent circuit is shown below
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Miller’s Theorem Proof
• In the original circuit, current I flows through impedance Z b/w node 1 & 2
• This current from node 1 is kept unchanged in the equivalent circuit by
selecting the value of Z1 so that it draws an equal current
V1 V KV1 Z
I1 I ( 1 ) Z1
Z1 Z (1 K )
• Similarly, the current into node 2 is kept unchanged in the equivalent circuit
by selecting the value of Z2 so that it draws an equal current
0 V2 0 KV1 V KV1 Z
I2 I ( 1 ) Z2
Z2 Z2 Z 1
(1 )
K
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Single Time Constant (STC) Networks
•An STC network is one that is composed of, or can be reduced to:
o one reactive component (inductance or capacitance) &
o one resistance
•Most STC networks can be classified into two categories
o Low Pass (LP) {discussed in detail}
o High Pass(HP) {discussed in detail}
Low Pass Network High Pass Network
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High Frequency Model of CS Amplifier-Miller’s Theorem
STC Low Pass Networks
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High Frequency Model of CS Amplifier-Miller’s Theorem
STC Low Pass Networks
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High Frequency Response of CS Amplifier
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High Frequency Model of CS Amplifier-Miller’s Theorem
•The high-frequency response of will be that of a LP-STC network with a 3-
dB frequency fH determined by the time constant CinR'sig
Important Observations
•Effect of Rsig
•Effect of Cin
•Miller Effect and Miller Multiplier
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Low Frequency Response of CS Amplifier
• Here r0 is ignored as its effect on low frequency response is minor
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Low Frequency Response of CS Amplifier-Analysis
• By voltage divider,
• The factor in above function represent a HP-STC Network with a
corner/break frequency ωp1=ω0 given by
• Thus the effect of the CC1 is to introduce a high-pass STC response
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Low Frequency Response of CS Amplifier
• The drain current Id is give by dividing Vg by the total impedance in the
source circuit
• Cs introduces a frequency dependent factor, which is also of the STC high
pass type
• Thus the amplifier acquires another break frequency
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Low Frequency Response of CS Amplifier
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Finding the time constant & the break frequency
• Procedure of finding the time constant and hence the break frequency
associated with each of the three capacitors is given below.
1. Reduce Vsig to zero.
2. Consider each capacitor separately; that is, assume that the other two
capacitors are acting as perfect short circuits.
3. For each capacitor, find the total resistance seen between its terminals.
This is the resistance that determines the time constant associated with
this capacitor.
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Example 4.14: CS Amplifier Frequency Response
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CS Amplifier Frequency Response-CS Removal Effect
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BJT: Low Frequency Response of CE Amplifier
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BJT: Low Frequency Response of CE Amplifier
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Classification on the basis of Frequency Response
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Electronic Circuit Design
Active Loaded Amplifiers
Muhammad Owais
Department of Electronic Engineering
Hamdard Institute of Engineering & Technology
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CS Amplifier
• The basic IC MOS common source amplifier is shown below
• The current source I is acting as its load
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CS Amplifier-Small Signal Review
• With transistor Q1 in saturation, the small signal model and analysis is discussed
below
• A0 is the maximum voltage gain available from a common source amplifier,
namely the intrinsic gain of the MOSFET
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CS Amplifier with Active Loads
• The current source load can be implemented using a PMOS transistor and is
therefore called an active load
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CS Amplifier with Active Loads
• The transistor Q2 is acting as the load for Q1
• The i-v characteristic of the load device is shown below
• This is the iD-vSD characteristic curve of the p-channel transistor Q2 for a constatn
source-gate voltage VSG
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CS Amplifier with Active Loads
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CS Amplifier with Active Loads
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CS Amplifier with Active Loads-Final Comments
• The circuit is not affected by the body effect since the source terminals of both
Q1 and Q2 are at signal ground
• The circuit is usually part of a larger amplifier circuit and negative feedback is
utilized to ensure that the circuit in fact operates in region III of the amplifier
transfer characteristic.
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CE Amplifier with Active Loads
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CE Amplifier with Active Loads
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