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University of Energy and Natural Resources,

Sunyani
Institute of Distance Learning
Dept. of Comp. & Elect. Eng.
CENG 365 – Microprocessor

NANA K. DIAWUO
TWENEBOAH-KODUAH S.

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Chapter 2 – Data
Representation

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Numeric integers
Unsigned – Each bit corresponds to power of 2. Eg.
An n-bit number can be represent from 0 to 2n – 1
Signed – Sign and magnitude
◦ one bit, usually the leftmost bit, represents the sign of
the number (0 for +, 1 for -),
◦ the remaining bits specify the magnitude of the number.
◦ So n bits can represent values from -(2(n-1) -1) to +(2(n-1) -1)
◦ There are two representations for 0, +0 and -0.
◦ Numbers are negated by inverting the sign bit.

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Numeric integers
One’s complement
◦ n-bit numbers can represent values from -(2(n-1)-1) to +(2(n-1) -1) [n one's
represent -0 and n zeros represent +0].
◦ The negative of a number is obtained by inverting the each bit

Two’s complement
◦ n-bit numbers can represent values from -2n-1 to +(2n-1 -1)
◦ the most significant bit (MSB) is the sign bit, with value of 0 representing
positive integers and 1 representing negative integers.
◦ The remaining n-1 bits represents the magnitude of the integer, as
follows:
◦ for positive integers, the absolute value of the integer is equal to "the
magnitude of the (n-1)-bit binary pattern".
◦ for negative integers, the absolute value of the integer is equal to "the
magnitude of the complement of the (n-1)-bit binary pattern plus one"
(hence called 2's complement).
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One’s complement representation
A different approach, one’s complement, negates numbers
by complementing each bit of the number.
We keep the sign bits: 0 for positive numbers, and 1 for
negative. The sign bit is complemented along with the rest
of the bits.
Examples:
11012 = 1310 (a 4-bit unsigned number)
0 1101 = +1310 (a positive number in 5-bit one’s complement)
1 0010 = -1310 (a negative number in 5-bit one’s complement)

01002 = 410 (a 4-bit unsigned number)

0 0100 = +410 (a positive number in 5-bit one’s complement)
1 1011 = -410 (a negative number in 5-bit one’s complement)

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Why is it called “one’s complement?”
Complementing a single bit is equivalent to subtracting it from 1.
0’ = 1, and 1 - 0 = 1 1’ = 0, and 1 - 1 = 0

Similarly, complementing each bit of an n-bit number is equivalent

to subtracting that number from 2n-1.
For example, we can negate the 5-bit number 01101.
◦ Here n=5, and 2n-1 = 3110 = 111112.
◦ Subtracting 01101 from 11111 yields 10010:

1 1 1 1 1
- 01 1 01
1 00 1 0

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One’s complement addition
To add one’s complement numbers:
◦ First do unsigned addition on the numbers, including the sign bits.
◦ Then take the carry out and add it to the sum.
Two examples:
0111 (+7) 0011 (+3)
+ 1011 + (-4) + 0010 + (+2)
1 0010 0 0101

0010 0101
+ 1 + 0
0011 (+3) 0101 (+5)

This is simpler and more uniform than signed magnitude addition.

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Example – 1’s compl.
Take the 1’s complimentof 11100. is number
negative?
Solution
The number must be negative since MSB
 -3
 +3

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Two’s complement
Our final idea is two’s complement. To negate a number,
complement each bit (just as for ones’ complement) and
then add 1.
Examples:
11012 = 1310 (a 4-bit unsigned number)
0 1101 = +1310 (a positive number in 5-bit two’s complement)
1 0010 = -1310 (a negative number in 5-bit ones’ complement)
1 0011 = -1310 (a negative number in 5-bit two’s complement)

01002 = 410 (a 4-bit unsigned number)

0 0100 = +410 (a positive number in 5-bit two’s complement)
1 1011 = -410 (a negative number in 5-bit ones’ complement)
1 1100 = -410 (a negative number in 5-bit two’s complement)

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More about two’s complement
Two other equivalent ways to negate two’s complement numbers:
◦ You can subtract an n-bit two’s complement number from 2n.
1 00000 1 00000
- 0 1 1 0 1 (+1310) - 0 0 1 0 0 (+410)
1 0 0 1 1 (-1310) 1 1 1 0 0 (-410)

◦ You can complement all of the bits to the left of the rightmost 1.

01101 = +1310 (a positive number in two’s complement)

10011 = -1310 (a negative number in two’s complement)
00100 = +410 (a positive number in two’s complement)
11100 = -410 (a negative number in two’s complement)

Often, people talk about “taking the two’s complement” of a number. This is a
confusing phrase, but it usually means to negate some number that’s already in
two’s complement format.
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Two’s complement addition
Negating a two’s complement number takes a bit of work, but
addition is much easier than with the other two systems.
To find A + B, you just have to:
◦ Do unsigned addition on A and B, including their sign bits.
◦ Ignore any carry out.
For example, to find 0111 + 1100, or (+7) + (-4):
◦ First add 0111 + 1100 as unsigned numbers:
01 1 1
+ 1 1 00
1 001 1

◦ Discard the carry out (1).

◦ The answer is 0011 (+3).

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Another two’s complement example
To further convince you that this works, let’s try adding
two negative numbers—1101 + 1110, or (-3) + (-2) in
decimal.
Adding the numbers gives 11011:
1 1 01
+ 1110
1 1 01 1

Dropping the carry out (1) leaves us with the answer,

1011 (-5).

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Why does this work?
For n-bit numbers, the negation of B in two’s complement is 2n - B
(this is one of the alternative ways of negating a two’s-complement
number).
A-B = A + (-B)
= A + (2n - B)
= (A - B) + 2n

If A  B, then (A - B) is a positive number, and 2n

represents a carry out of 1. Discarding this carry out
is equivalent to subtracting 2n, which leaves us with
the desired result (A - B).
If A  B, then (A - B) is a negative number and we
have 2n - (A - B). This corresponds to the desired
result, -(A - B), in two’s complement form.
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Example – 2’s compl.
Suppose that n = 8 and it binary
representation is 1 000 0001B?
Solution
Sign nit is 0  positive
Magnitude, 100 0001B  65D
Hence
+65D

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Binary coded decimal (BCD)
BCD code is a system of representing the decimal digits 0
through 9 with a four-bit (or eight-bit) binary values
(code)
2 = 00102 and 5 = 01012
Advantagees
◦ Increase length of number after conversion
◦ Difficult arithmetics
Advantages
◦ Provide decimal readable number to user
◦ Arithmetic uses binary
◦ Input and output is BCD

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Fraction
For fractional values, the bits to the right of an
assumed binary point are interpreted as negative
powers of 2. Hence 0.1010 = (1/2) + (1/8) and
0.101 = (1*1/2) + (0*1/4) + (1*1/8)
If the binary point is not at the extreme left end of
the pattern, then the pattern has both an integer
and a fractional part. This is called a fixed point
number. For example, 000111.01 represents 7.25.

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Floating point
The effect of a sliding (i.e. floating) number point
can be obtained by including an exponent to
specify the logical position of the number point
within the bit pattern.
This representation would require 4 components,
the exponent, the sign of the exponent, the bits
that comprise the number, and the sign of the
number.

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Non-numeric
Character data require one byte space for storage e.g. ASCII
Boolean – data items that can only take two values (true or false or 0
or non-zero (1))
String data
◦ Collections of adjacent bytes can hold individual characters and
correspond to a character string.
◦ prefix byte or word holds a count indicating the length of the
string or the final byte could contain a null character to identify
the end of the string.
◦ Collections of adjacent bits within one or more words may be
used as bit strings.
◦ Auxiliary information must be used to specify the length of each
bit string

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ALU operation
Within the CPU, the arithmetic logic unit is responsible for
carrying out instructions that perform arithmetic computations
as well as logical functions such as AND, OR, XOR etc.
Negative values are represented in their two's complement
form and subtraction is performed by added the negative of the
subtrahend to the menuend.
The addition of two numbers that differ in sign requires
subtracting the smaller magnitude from the larger and using
the sign of the larger number as the sign of the sum.
Subtraction is performed by changing the sign of the
subtrahend and adding. This also makes for a more complicated
ALU

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ALU operation – integer overflow
Unsigned overflow
Overflow in unsigned binary number when there is not
enough its to represent the digit depending on the
number of bits allowed for representation
Overflow = roll-over
For 32-bit words, unsigned values from 0 to 4294967295
can be accommodated. Any result produced by some
arithmetic operation that lies outside this range
corresponds to an unsigned overflow condition.
◦ When adding two 32-bit unsigned numbers an overflow
corresponds to a carry bit being generated out of the MSB.

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ALU operation – unsigned binary addition
Add columns from LSB
Carry the extra bit to the next column
Start here The result of two k-bit
addition is also a k-bit
If the sum of two k-bit
UB numbers causes a
carry out of 1 into
column k (as it did in the
example above), there is
overflow
Discarded and use to detect overflow
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Negative Numbers and Subtraction
The adders we designed can add only non-negative numbers
◦ If we can represent negative numbers, then subtraction is “just” the
ability to add two numbers (one of which may be negative).
We’ll look at three different ways of representing signed numbers.
How can we decide representation is better?
◦ The best one should result in the simplest and fastest operations.
◦ This is just like choosing a data structure in programming.
We’re mostly concerned with two particular operations:
◦ Negating a signed number, or converting x into -x.
◦ Adding two signed numbers, or computing x + y.
◦ So, we will compare the representation on how fast (and how easily)
these operations can be done on them

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Unsigned numbers overflow
Carry-out can be used to detect overflow
The largest number that we can represent with 4-bits using unsigned
numbers is 15
Suppose that we are adding 4-bit numbers: 9 (1001) and 10 (1010).

1 001 (9)
+ 1 0 10 (10)
1 001 1 (19)

The value 19 cannot be represented with 4-bits

When operating with unsigned numbers, a carry-out of 1 can be used to
indicate overflow

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Summary– unsigned binary subtraction
Borrow – same as decimal
Subtract down the columns starting with LSB
Burrow from next column as needed
Example

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Signed magnitude representation
Humans use a signed-magnitude system: we add + or - in front of a
magnitude to indicate the sign.
We could do this in binary as well, by adding an extra sign bit to the
front of our numbers. By convention:
◦ A 0 sign bit represents a positive number.
◦ A 1 sign bit represents a negative number.

Examples:
11012 = 1310 (a 4-bit unsigned number)
0 1101 = +1310 (a positive number in 5-bit signed magnitude)
1 1101 = -1310 (a negative number in 5-bit signed magnitude)

01002 = 410 (a 4-bit unsigned number)

0 0100 = +410 (a positive number in 5-bit signed magnitude)
1 0100 = -410 (a negative number in 5-bit signed magnitude)

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Signed magnitude operations
Negating a signed-magnitude number is trivial: just change the
sign bit from 0 to 1, or vice versa.
Adding numbers is difficult, though. Signed magnitude is basically
what people use, so think about the grade-school approach to
addition. It’s based on comparing the signs of the augend and
addend:
◦ If they have the same sign, add the magnitudes and keep that sign.
◦ If they have different signs, then subtract the smaller magnitude from the
larger one. The sign of the number with the larger magnitude is the sign of
the result.

This method of subtraction would lead to a rather complex

circuit. 5 13 17
+3 7 9 6 4 7
+ -6 4 7 because - 3 7 9
-2 6 8 2 6 8

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Signed overflow
With two’s complement and a 4-bit adder, for example, the largest
representable decimal number is +7, and the smallest is -8.
What if you try to compute 4 + 5, or (-4) + (-5)?
01 00 (+4) 1 1 00 (-4)
+ 01 01 (+5) + 1 01 1 (-5)
01 001 (-7) 1 01 1 1 (+7)

We cannot just include the carry out to produce a five-digit result, as

for unsigned addition. If we did, (-4) + (-5) would result in +23!
Also, unlike the case with unsigned numbers, the carry out cannot be
used to detect overflow.
◦ In the example on the left, the carry out is 0 but there is overflow.
◦ Conversely, there are situations where the carry out is 1 but there is no
overflow.

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Converting signed numbers to decimal
Convert 110101 to decimal, assuming this is a number in:

(a) signed magnitude format

(b) ones’ complement

(c) two’s complement

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Example solution
Convert 110101 to decimal, assuming this is a number in:
Since the sign bit is 1, this is a negative number. The easiest way to find the magnitude is to
convert it to a positive number.
(a) signed magnitude format
Negating the original number, 110101, gives 010101, which is +21 in decimal. So
110101 must represent -21.
(b) ones’ complement
Negating 110101 in ones’ complement yields 001010 = +10 10, so the original number
must have been -1010.
(c) two’s complement
Negating 110101 in two’s complement gives 001011 = 11 10, which means 110101 = -1110.
The most important point here is that a binary number has different meanings depending
on which representation is assumed.

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Detecting signed overflow
The easiest way to detect signed overflow is to look at all the
sign bits.
01 00 (+4) 1 1 00 (-4)
+ 01 01 (+5) + 1 01 1 (-5)
01 001 (-7) 1 01 1 1 (+7)

Overflow occurs only in the two situations above:

◦ If you add two positive numbers and get a negative result.
◦ If you add two negative numbers and get a positive result.
Overflow cannot occur if you add a positive number to a
negative number. Do you see why?

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Sign extension
In everyday life, decimal numbers are assumed to have an
infinite number of 0s in front of them. This helps in “lining
up” numbers.
To subtract 231 and 3, for instance, you can imagine:
231
- 003
228
You need to be careful in extending signed binary numbers,
because the leftmost bit is the sign and not part of the
magnitude.

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Sign extension
If you just add 0s in front, you might accidentally
change a negative number into a positive one!
For example, going from 4-bit to 8-bit numbers:
◦ 0101 (+5) should become 0000 0101 (+5).
◦ But 1100 (-4) should become 1111 1100 (-4).

The proper way to extend a signed binary number

is to replicate the sign bit, so the sign is preserved.

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Signed Numbers are Sign-Extended to Infinity!
Memorize this idea.
It will save you every time when you are doing binary arithmetic by hand.
◦ 0111 in twos complement is actually …00000111
◦ 1011 in twos complement is actually …11111011

1011 + 1100 = 10111.

◦ This is overflow. But can you see it? Look again:

…11111011 + …11111100 = …11110111

◦ The sign of the result (1) is different than bit 3 (0).
◦ We cannot represent the result in 4 bits
◦ The sign of the result is extended to infinity
◦ Check this every time in your answers and you will always see the precision of
the result (number of significant bits) very clearly.
◦ Sign-extend inputs to infinity
◦ Do the math on an infinite number of bits (conceptually)
◦ Truncate the result to the desired output type
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Logical Operation
Logical operators manipulate operands that can
take on one of two possible values: either 1 or 0.
A B OR NOR XOR AND NAND
0 0 0 1 0 0 1
0 1 1 0 1 0 1
1 0 1 0 1 0 1
1 1 1 0 0 1 0

A NOT
0 1
1 0
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PIC18 Logic instructions set
Instruction Description
ANDLW k Logic AND between the contents of W and
the literal value k. The results is stored
back to W.
ANDWF f , d Logic AND between the content of W
register with the content of a file register
'f'. If d is 0 the result is stored in the W
register, if d is 1 the result is stored back to
the file register 'f'.
IORLW k Logic OR between the contents of W and
the literal value k. The results is stored
back to W.

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PIC18 Logic instructions set
cont’d
Instruction Description
IORWF f , d Logic OR between the content of W register from
the content of a file register 'f'. If d is 0 the result
is stored in the W register, if d is 1 the result is
stored back to the file register 'f'.
XORLW k Logic EXCLUSIVE OR between the contents of W
and the literal value k. The results is stored back
to W.
XORWF f , d Logic EXCLUSIVE OR between the content of W
register from the content of a file register 'f'. If d
is 0 the result is stored in the W register, if d is 1
the result is stored back to the file register 'f'.

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PIC18 rotate instructions
ALU is capable of performing shift operation e.g.
logical and arithmetic shifts
Logical the sign of the operand is ignored.
When the operand is shifted right, zeros are shifted
into the left end.
To take the sign into account  an arithmetic shift
is required.
◦ The shift operation moves all bits within the source
operand one or more bit positions to the left or right.

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PIC18 rotate instructions
Mnemonic, Description 16-bit Status
operator instruction affected
word
RLCF f, d, a Rotate left f 0011 01da C, Z, N
through carry ffff ffff
RLNCF f, d, a Rotate left f (no 0100 11da Z, N
carry) ffff ffff
RRCF f, d, a Rotate right f 0011 00da C, Z, N
through carry ffff ffff
RRNCF f, d, a Rotate right f 0100 00da Z, N
(no carry) ffff ffff

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PIC18 rotate instructions operations
The result of this instruction may be placed in the WREG
register (d = 0) or the specified f register (d = 1).
Operation by rlcf f, d, a instruction

The operation performed by the rlncf f,d,a instruction.

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PIC18 rotate instructions operations
The result of this instruction may be placed in the WREG
register (d = 0) or the specified f register (d = 1).
The operation performed by the rrcf f,d,a instruction

The operation performed by the rrncf f,d,a instruction

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PIC18 rotate instructions operations
Example 1
Compute the new values of the data register 0x10 and the
C flag after the execution of the rlcf 0x10,F,A instruction.
Assume that the original value in data memory at 0x10 is
0xA9 and that the C flag is 0.
Solution

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PIC18 rotate instructions operations
Example 2
Compute the new values of the data register 0x10 and the
C flag after the execution of the rrcf 0xl0,F,A instruction.
Assume that the original value in data memory at 0x10 is
0xC7 and that the C flag is 1
Solution

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Multiplication algorithm
The PIC18 MCU does not provide any shifting
instructions; shift operation must be implemented
by using one of the rotate-through-carry
instructions. The carry flag must be cleared before
the rotate instruction is executed
Mnemonic, Description 16-bit instruction word Status affected
operator
BCF f, b, a Bit clear f 1001 bbb1 ffff ffff none
BSF, f, b, a Bit set f 1000 bbba ffff ffff none
BTG f, b, a Bit togle 0111 bbba ffff ffff none

The b field specifies the bit position to be operated on.

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Multiplication algorithm
Example
Write an instruction sequence to multiply the
three-byte number located at 0x00 to 0x02 by 8.

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Multiplication algorithm
Solution
Multiplying by 8 can be implemented by shifting to
the left three places. The left- shifting operation
should be performed from the least significant byte
toward the most significant byte. The following
instruction sequence will achieve the goal:

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 Multiplication algorithm
Solution cont’d
Instruction sequence Comments
movlw 0x03 ;set loop coiunt to 3
bcf STATUS, C, A ;clear the C flag
rlcf 0x00, F, A ;shift left one place
rlcf 0x01, F, A ;shift left one place
loop
rlcf 0x02, F, A ;shift left one place
decfsz WREG, W, A ;have we shifted
three places yet?
goto loop not yet, continue

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Division algorithm
Division is based on the relation:

At each stage in the division process, the divisor is

subtracted from the dividend to produce a partial
(or intermediate ) remainder which becomes the
new dividend.

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Division algorithm – techniques
Three most common techniques for division is as follows
1. Compare the divisor with the high part of the
dividend to determine whether to subtract before
shifting the dividend left.
2. Subtract the divisor and if the result is negative, add
it back before shifting the dividend left. This is called
the restoring division technique.
3. Subtract the divisor and if the result is negative, shift
the dividend left before adding the divisor in the next
step  non-restoring division technique
The divisor and the dividend values must be unsigned numbers
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Floating Point numbers
Obtaining the floating point representation of a number requires
generating each of the components, the sign bit, the characteristic
and the mantissa
The sign bit is 1 for a negative value and 0 for a positive value as
before
The mantissa is obtained by converting the decimal number into a
binary fraction using repeatedly multiply decimal fraction or
component by 2
Each multiplication will generate an integer part that is 0 or 1, and a
fractional part.
The integer part becomes the next digit in the binary fraction.
The process is then repeated on the decimal fraction produced by the
previous multiplication. This repetition continues until a zero
fractional part is generated by the multiplication or until the desired
number of binary digits is obtained 50
Example
0.510 = ?2
0.510 x 2 => 1.0. Thus 0.510 = 0.12
0.12510 = ?2
0.125 x 2 => 0.250 => 0 next binary digit
0.250 x 2 => 0.5 => 0
0.5 x 2 => 1.0 => 1. Thus 0.12510 = 0.0012
Note that the number of multiplications can be reduced
by multiplying by 16 at each stage rather than by 2

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Example – hexadecimal equivalent
Multiplying by 16 produces equivalent hexadecimal
number.
The binary fraction is then obtained by replacing each hex
digit by its 4-bit binary equivalent.
Example
0.12510 = ?16 0.125 x 16 => 2.0. Thus 0.125 10 = 0.216 =>
0.00102
Once the binary fraction is obtained, the significand is
generated by shifting the radix point the proper position.
The number of places that the radix point is shifted
determines the exponent.
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Example – hexadecimal equivalent
The excess or biased form of the exponent gives
the characteristic
Example: 0.125 => 0 for sign bit, 1.0 is the
significand, -3+127=124 is the characteristic

S Characteristic Mantissa
0 01111100 00000000000000000000000

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Floating point arithmetic
To add or subtract two floating point numbers,
their number points must be aligned.
This is the same as making their exponents equal.
For each bit position that a mantissa is shifted to
the right, the exponent of the number is increased
by 1.
Thus, to align the number points, the value with
the smaller exponent is shifted right until its
exponent matches that of the other value.

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Shift to the left
A one-bit left logical shift has the same effect as
removing the MSB and appending a 0 bit on the
right
The bit that is shifted to the left is then lost in the
process

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Shift to right

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