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Lecture 7 - Pin Diagram

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0% found this document useful (0 votes)
22 views10 pages

Lecture 7 - Pin Diagram

Uploaded by

GOURAV SAINI
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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● SUBJECT : MICROPROCESSOR & INTERFACE

● BRANCH : CSE

● SUBJECT CODE: 4CS3-04

● CREDITS : 3

● IA: 30 MARKS

● ETE : 120 MARKS

● UNIT : 1

● LECTURE : 6

● TOPIC : ARCHITECTURE (CONT.) & PIN DIAGRAM


OF 8085

● FACULTY NAME : DEEPAK SHARMA


UNIT 1-
LECTURE 7

PIN DIAGRAM : Pin Diagram helps in connection of 8085 Microprocessor with Memory, Input Output Interfacing Chip,
Interrupts etc.
The architecture of 8085 put in to a single VLSI Chip called 8085 IC .To access this architecture Pins are available. Each Pin
have special function.

The 8085 is an 8-bit general purpose microprocessor that can address 64K Byte of memory.

It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz.
The pins on the chip can be grouped into 6 groups:
• Address Bus.
• Data Bus.
• Control and Status Signals.
• Power supply and frequency.
• Externally Initiated Signals.
• Serial I/O ports.
UNIT 1-
UNIT 1-

1. Address Bus and Data Bus:


The address bus is a group of sixteen lines i.e A0-A15. The address bus is unidirectional, i.e., bits flow in one
direction from the microprocessor unit to the peripheral devices and uses the high order address bus.

A. Higher Order Address pins- A15 – A8


The address bus has 8 signal lines A8 – A15 which are unidirectional.

B. Lower Order Address/ Data Pins- AD7-AD0


These are time multiplexed pins and are de-multiplexed using the pin ALE
So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time.

During the execution of the instruction, these lines carry the address bits during the early part, then during the
late parts of the execution, they carry the 8 data bits.
In order to separate the address from the data, we can use a latch to save the value before the function of the
bits changes.
UNIT 1-
2. Control Pins – RD, WR
These are active low Read & Write pins.
A. RD’ – It is a signal to control READ operation. When it is low the selected memory or input-output device is
read.
B. WR’ – It is a signal to control WRITE operation. When it goes low the data on the data bus is written into the
selected memory or I/O location.

3. Status Pins – ALE, IO/M (active low), S1, S0

• ALE (Address Latch Enable)-Used to de-multiplex AD7-AD0


• IO/M – Used to select I/O or Memory operation
• S1,S0 – Denote the status of data on data bus

ALE – It is an Address Latch Enable signal. It goes high during first T state of a machine cycle and enables the
lower 8-bits of the address, if its value is 1 otherwise data bus is activated.
UNIT 1-

IO/M’ – It is a status signal which determines whether the address is for input-output or memory. When it is
high(1) the address on the address bus is for input-output devices. When it is low(0) the address on the address
bus is for the memory.

SO, S1 – These are status signals. They distinguish the various types of operations such as halt, reading,
instruction fetching or writing.
IO/M’ S1 S0 DATA BUS STATUS

0 1 1 Opcode fetch

0 1 0 Memory read

0 0 1 Memory write

1 1 0 I/O read

1 0 1 I/O write

1 1 1 Interrupt acknowledge

0 0 0 Halt
UNIT 1-
4. Interrupt Pins – TRAP, RST7.5, RST 6.5, RST 5.5, INTR, INTA
These are hardware interrupts used to initiate an interrupt service routine stored at predefined locations of the
system memory.
The 8085 has five interrupt signals that can be used to interrupt a program execution.
(i) INTR
(ii) RST 7.5
(iii) RST 6.5
(iv) RST 5.5
(v) TRAP

The microprocessor acknowledges Interrupt Request by INTA’ signal. In addition to Interrupts, there are three
externally initiated signals namely RESET, HOLD and READY. To respond to HOLD request, it has one signal
called HLDA.
UNIT 1-

• INTR – It is an interrupt request signal.


• INTA’ – It is an interrupt acknowledgment sent by the microprocessor after INTR is received.
• READY – It senses whether a peripheral is ready to transfer data or not. If READY is high(1) the peripheral is
ready. If it is low(0) the microprocessor waits till it goes high. It is useful for interfacing low speed devices.

5. Reset Signals:
• RESET IN’ – When the signal on this pin is low(0), the program-counter is set to zero, the buses are tristated
and the microprocessor unit is reset.
• RESET OUT – This signal indicates that the MPU is being reset. The signal can be used to reset other
devices.

7. DMA (Direct Memory Access) pins – HOLD, HLDA


These pins are used when data transfer is to be performed directly between an external device and the main
memory of the system.
UNIT 1-

DMA Signals:
• HOLD – It indicates that another device is requesting the use of the address and data bus. Having received
HOLD request the microprocessor relinquishes the use of the buses as soon as the current machine cycle is
completed. Internal processing may continue. After the removal of the HOLD signal the processor regains the
bus.
• HLDA – It is a signal which indicates that the hold request has been received after the removal of a HOLD
request, the HLDA goes low.

7. Serial I/O Ports:

• These pins are used to interface 8085 with a serial device.


Serial transmission in 8085 is implemented by the two signals,
• SID and SOD – SID is a data line for serial input where as SOD is a data line for serial output.
UNIT 1-

Power Supply and Clock Frequency:


Vcc – +5v power supply
Vss – Ground Reference
XI, X2 – A crystal is connected at these two pins. The frequency is internally divided by two, therefore, to operate
a system at 3MHZ the crystal should have frequency of 6MHZ.
X1, X2– These are clock input pins. A crystal is connected between these pins such that fcrystal= 2f8085 where
fcrystal= crystal frequency & f8085 = operating frequency of 8085
CLK (OUT) – This signal can be used as the system clock for other devices.

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