Chapter Five

8086/ 8088
INSTRUCTION
SET
 INSTRUCTION SET
» Listing all the instructions that the microprocessor
can execute.
» 8086 has approximately 117 different instructions
with about 300 opcodes.
» Except for string instructions, 8086 instructions
do not permit memory-memory operations.
» Some instruction set contains instructions with
» No Operand,
» Single Operand
» Two Operands
Each statement in a program consists of 4 parts
or fields
1.Label
»The leftmost field .
»Used to store a symbolic name for the memory
location that it represents.
»Must begin with a letter or one of the special
character like @,$,-.?.
»May of any length from 1 to 35 character
2. Opcode field.

3. Operand/s field.

4. Comment field
» Contains a comment about an
instruction or a group of instructions.

»A comment always begins with a

semicolon(;)
Examples:
label opcode operand/s comment
DATA: DB 23H ; define DATA as a byte of 23H
START: MOV AL,BL ; copy BL into AL
MOV CX,200 ; copy 200 decimal into CX.
 The 8086 instructions
are categorized into the
following main
types……..
† Data copy/transfer instructions
† I/O instructions
† Address object transfer instructions
† Arithmetic instructions
BCD arithmetic instructions
ASCII arithmetic instructions
† Basic Logic instructions
† Program control instructions
† Interrupt instructions
 This type of instructions are used to transfer data from
source operand to destination operand.

 All the instructions used for the operations like store,

move, load, exchange, input and output belong to this
category.
The MOV instruction
 This data transfer instruction transfers data from one
register/memory location to another register/memory location.
 The source may be any one of the segment registers,
general/special purpose registers, or a memory location and….
 The destination may be another registers, or memory locations.
 In the case of immediate addressing mode, a segment
register can’t be a destination register.

 In other words, direct loading of the segment registers

with immediate data is not permitted.

 To load the segment registers with immediate data, one

will have to load any general purpose register with the
data and then it will be have to be moved to that
particular segment register as follows…
Example: Load DS with 5000H
MOV DS, 5000H ; is not permitted (invalid)
The correct procedure is
MOV AX, 5000H
MOV DS, AX
The other MOV instruction examples are given
below with the corresponding addressing modes.
 MOV AX, 5000H ; immediate
 MOV AX, BX ; Register
 MOV AX, [BX] ; Register Indirect
 MOV AX, [SI] ; Register Indirect
 MOV AX, [2000H] ; Direct
 MOV AX, START ; Direct
 MOV AX, 50H [BX] ; Based
 MOV AX, ALPHA [BX] ; Based
 MOV AX, ALPHA [SI] ; Indexed
 MOV AX, 05H [SI] ; Indexed
 MOV AX, ALPHA [SI] [BX] ; Based indexed
 MOV AX, 05H [DI] [BX] ; Based indexed
MOV CX,DX Moves the 16 bit content of DX into CX.
(Register to Register) No flags are affected.
Moves the 16 bit data 3476H into a memory location specified by
MOV [DI],3476H DS+DI.
(Immediate to Memory) (Uses DS as the segment register).
No flags are affected.
MOV SI,0F12H Moves the 16 bit data into the register SI.
(Immediate to Register) No flags are affected.
Moves the contents of memory location which is offset by START
MOV AX,START (Memory
from the current DS value into register AX. Uses DS as the
to Register)
segment register. No flags are affected.
Moves the 16 bit contents of AX to the memory location which is
MOV BEGIN,AX
offset by BEGIN plus DS value. Uses DS as the segment register.
(Register to memory)
No flags are affected.
MOV DS,CX (Register to Used for initializing DS .
Segment register) No flags are affected.
MOV CX,DS (Segment
Moves the contents of segment Register No flags are affected.
Register to Register)
Moves the 16 bit word in AX with the contents of two consecutive
MOV START[BX],AX memory locations starting at 20 bit physical address computed
(Register to memory) from START, BX and DS.
AL is moved with the content of 1st location.
AH is moved with the content of next location.
 Some Invalid MOV statements
MOV DL, CX ; Different operand sizes
MOV DS, 1075H ; Immediate value cannot be moved to a
segment register
MOV CS, DX ; Destination register cannot be CS
MOV ES, DS ; Both registers can’t be segment registers
MOV 75H, AX ; Immediate value cannot be a destination
operand
MOV BEGIN, START ; Both operands cannot be located in
memory
 The XCHG instruction
 This instruction exchanges the contents of the specified source and destination operands, which may
be registers or one of them may be a memory location.

 However, data exchange between two memory locations is not permitted.

E.g
 XCHG [5000H], AX ; will exchange data between AX and a memory location [5000H] specified by the DS.
 XCHG AX, BX ; will exchange data between registers AX & BX
 The XCHG instruction is convenient because we don’t
need a third register to hold a temporary value in order
to swap two values.

 For ex: we need three MOV instructions

MOV CX, AX

MOV AX, DX

MOV DX, CX

to perform XCHG AX, DX

 This instruction is especially useful in sorting applications.

 This instructions are used for reading/writing an input/output
port.
 The address of the input/output port may be specified in the
instruction directly or indirectly.
 AL and AX are the allowed destinations for 8 and 16-bit input
operations.
 For the output operations, the contents of AX and AL are
transferred to a directly / indirectly addressed port.
 DX is the only register (implicit) which is allowed to carry the
port addresses.
For Example:
IN AX; This instruction reads data from a 16-bit port whose
address is in DX (implicit) and stores it in AX.
OUT AX; This sends data available in AX to a port whose
address is specified implicitly in DX.
IN AL,38H Immediate (Port) to
Inputs 8-bit data from port 38H into AL.
Register.
Inputs 16-bit data from port 38H and 39H into
IN AX,38H
AX.
IN AL,DX Register Indirect
Inputs 8-bit data from the port addressed by DX.
(Port) to Register (8bit).

IN AX,DX Register Indirect Inputs 16-bit data from the port addressed by
(Port) to Register (16 Bit). consecutive locations DX and DX+1.

OUT 3845H,AL Register(8-bit)

Outputs 8-bit contents of AL to port 3845H.
to Immediate (Port)
OUT 3845H,AX Register(16-bit)
Outputs 16-bit contents of AX to port 3845H.
to Immediate (Port)

OUT DX,AL Register(8-bit) to Outputs 8-bit data from AL into ports addressed
Register Indirect (Port) by DX.

OUT DX,AX Register(16-bit) To Outputs 16-bit data from AX into ports addressed
Register Indirect (Port) by DX and DX+1.
 LEA (Load Effective Address)
 LEA instruction loads the offset value /address of the source
operand into registers (Normally SI, DI and BX registers are
used for this purpose) which are used for accessing memory.

• No flags are effected

E.g.: LEA SI,ADDR

Loads the offset address of the label ADDR directly into the
specified register (SI), not the content of memory location
ADDR.
 The directive OFFSET performs the same function as an
LEA instruction if the operand is a displacement.

 For eg: MOV SI, OFFSET ADDR performs the same

function as LEA SI, ADDR

 The directive OFFSET only functions with simple

operands.

 It may not be used for the operands such as [DI], ADDR

[SI] and so .. on
 LDS, LES, LSS
 The LDS, LES instructions load any 16-bit register with
an offset address and the DS, ES segment registers with
a segment address respectively.
 These instructions transfers 32-bit section of the memory
(16-bit offset address and 16-bit segment address)
 For ex: LDS BX, [DI]

the above instruction transfers a 32-bit number (the

offset address appears first, followed by the segment
address),addressed by DI in the data segment, into BX
and DS registers.
With DI=1000 and DS=1000
 After the execution of the instruction LDS BX, [DI]
 These instructions usually perform the arithmetic
operations, like addition, subtraction, multiplication and
division.

 The increment and decrement operations also belong to

this type of instructions.

 The operands are either the registers or the memory

locations or immediate data, depending upon the
addressing mode.

 Arithmetic instructions may affect the flags.

 The ADD instruction
 After the ADD instruction, the result will be in the
destination operand.

 However, both the source and destination operands cannot

be memory operands. That means memory to memory
addition is not possible.

 Also, the contents of the segment registers cannot be added

using this instruction.
ADD AL,BL AL = AL+ BL
ADD CX,DI CX = CX+ DI
ADD CL,44H CL = CL+ 44H (Immediate Addition)
ADD 0100H AX = AX + 0100H (Destination register is AX -
implicit)
ADD BX,245FH BX = BX + 245FH
ADD [BX],AL AL adds to the contents of the data segment (DS)
memory location (addressed by BX) and the sum is
stored in the same memory location.
ADD CL,[BP] The byte(8 bit) contents of the stack segment (SS)
memory location (addressed by BP) will add to CL and
the sum will be stored in CL.
ADD BX,[SI] The word (16 bit) contents of the data segment (DS)
memory location (addressed by SI) add to BX and the
sum will be stored in BX.
ADD The word contents of the data segment (DS) memory
BX,TEMP[DI] location (addressed by TEMP+DI) add to BX, and result
is stored in BX.
Any ADD instruction may modify the contents of the sign,
zero , carry, auxiliary carry, parity and overflow flags.

For eg: MOV DL,12H (DL will be loaded with a 12H by

using an immediate MOV instructions.)

ADD DL, 33H (33H is added to the 12H in DL by using

an immediate ADD instruction) After the addition the
sum(45H)moves into register DL and the flags will change
as follows.

Z =0 (Result Not Zero) C =0 (No Carry)

A =0 (No Half-carry) S =0 (Result Positive)

 Increment Addition (INC)
•INC adds a 1 to the contents of the specified register or a
memory location (except segment registers).

•Immediate data cannot be an operand for this instruction

•All the condition flags may or may not be affected

INC BL  BL=BL+1

INC SP  SP=SP+1

INC 55H (is an illegal instruction)

Decrement Subtraction(DEC)
•Subtracts a 1 from the contents of the specified register
or a memory location.

•Immediate data cannot be operand of the instruction.

DEC BH  BH=BH-1

DEC CX CX =CX-1

 Addition with Carry(ADC)
 This instruction performs the same operation as ADD
instruction, but adds the carry flag bit (C), [which may
be set as a result of the previous calculation] to the
result.
 All the condition code flags are affected by this
instruction.
ADC AL,AH AL = AL + AH + carry
ADC CX,BX CX = CX + BX + carry
The byte(8 bit)contents of the DS memory
ADC DH,[BX] location [addressed by BX] add to DH with
carry. The sum will be stored in DH.
The word contents of the SS memory location
ADC BX,[BP] [addressed by BP] add to BX with carry. The
sum will be stored in BX.
Suppose that a program is written for 8086 to
add the 32 bit number in BX _ AX to the 32 bit
number in DX_CX.
This addition cannot be easily performed without
adding the carry flag bit because the 8086 only
adds 8/16 bit numbers.
Procedure
ADD AX,CX
ADC BX,DX
 Subtraction
• The subtract instruction subtracts the source operand from
the destination operand and the result is stored in the
destination operand.

• The types of subtraction not allowed are Memory-to-

Memory & between Segment Registers

• Destination operand cannot be an immediate data.

• All the condition code flags are affected by this

instruction.
SUB CL,BL CL = CL – BL

SUB BX,CX BX = BX – CX

SUB DH,6FH DH = DH – 6FH

Subtracts the contents of CH from the content of

SUB [DI],CH
the DS memory location (addressed by DI)

Subtracts the byte(8 bit) contents of the SS

SUB CH,[BP]
memory location (addressed by BP) from CH
Subtracts the byte contents of the DS memory
SUB AH,TEMP
location (addressed by TEMP) from AH

SUB Subtracts the word contents of the DS memory

DI,TEMP[SI] location (addressed by TEMP+SI) from DI
 Immediate Subtraction
E.g. MOV CH,22H (load 22H into CH using an
immediate MOV instruction.)
SUB CH, 44H (subtracts 44H from 22H,
using an immediate SUB
instruction)
After the subtraction, the difference moves into register CH.
Z=0 (Result Not Zero)
C=1(Borrow)
A=1( Half-borrow)
S =1(Result Negative)
P =1(Even Parity)
O=0(No Overflow)
 Subtraction With Borrow(SBB)
•SBB instruction functions as a regular subtraction
except that the borrow from the carry flag (which
holds the borrow) also subtracts from the
difference.

• The result is stored in the destination operand.

•E.g. When a 32 bit number held in BX_AX is

subtracted from the 32 bit number hold in SI_DI
(the carry flag propagates the borrow )
SBB AH,AL AH = AH – AL – carry

SBB AX,BX AX = AX – BX – carry

SBB CL,2 CL = CL – 2 – carry

SBB BYTE PTR[DI],3 A 3 and a carry is subtracted from
(immediate SBB the byte contents of the DS memory
instruction) location (addressed by DI).
Both AL and a carry is subtracted
SBB [DI],AL from DS memory location(addressed
by DI)
Both carry and the word contents of
the stack segment (SS) memory
SBB DI,[BP]
location (addressed by BP)
subtracted from DI.
SUB AX, DI (Subtract DI from AX)
SBB BX, SI (Subtract SI and borrow from BX)
 When numbers are entered from the keyboard or
displayed/printed, they should be in ASCII form.

 The binary representation is used internally for

operations.

 Decimal numbers can be represented in one of two

forms. BCD or ASCII
 BCD representation
 There are two types of BCD representation,
unpacked BCD and packed BCD.
 In unpacked BCD representation, each digit is
stored in a byte, while two digits are packed
into a byte in the packed BCD representation.
 E.g.12H is stored in unpacked BCD representation
as 0000 0001 0000 0010
 In packed BCD representation, each digit is
stored using only 4-bits.(thus, two digits can be
packed into a byte)
 E.g. 12H is stored in packed BCD representation
as 0001 0010
 There are only two instructions that
support addition and subtraction of packed
BCD numbers.
 DAA (Decimal Adjust after Addition)

 DAS (Decimal Adjust after Subtraction)

 DAS (Decimal Adjust After Addition)
• Normally, the DAA instruction is followed after
the ADD or ADC instruction, to adjust the result
into a BCD result

• Similarly, the DAS instruction converts the result

of a subtraction to a valid BCD number.

• DAA & DAS instructions function only with AL

register

• Both DAS and DAA instructions correct the

result of the addition/subtraction so that it is a
E.g. Suppose that DX and BX each contain 4-digit
packed BCD numbers. The program below shows the
addition of BCD numbers in DX and BX and the result in
CX.
MOV DX,1234H ;load 1234
MOV BX,3099H ;load 3099
MOV AL,BL ;Sum BL with DL
ADD AL,DL
DAA ;adjust the answer
MOV CL,AL ;answer to CL
MOV AL,BH ;Sum BH,DH and carry
ADC AL,DH
DAA ;adjust
MOV CH,AL ;answer to CH
 After adding the BL and DL registers the result is
adjusted with a DAA instruction before being
stored in CL.

 Next add BH,DH registers and carry;

 The result is then adjusted with DAA before being

stored in CH.

 In the example 1234 is added to 3099 to

generate a sum of 4333 that moves into CX after
the addition.
 DAS (Decimal Adjust After Subtraction)

 Same as DAA instruction except that it follows a

subtraction instead of an addition.
 The DAS instruction restores the result in AL to
the packed BCD representation
 The ASCII codes for numbers 0 to 9 are 30H through 39H.
i.e. the number 12H is represented as 31 32 H.
 The arithmetic operations on numbers represented in
ASCII, requires special care.
 There are 4 instructions used with ASCII arithmetic
operations.
 These instructions will use AX as the source and as the
destination.
 AAA(ASCII Adjust after Addition)

 AAS(ASCII Adjust after Subtraction)

 AAM(ASCII Adjust after Multiplication)

 AAD(ASCII Adjust before Division)

 AAA(ASCII Adjust after Addition)

Suppose that ASCII codes 32 H (the number 2) and 35H

(the number 5) are entered for addition and the result
can be adjusted to provide the correct unpacked BCD
using AAA instruction as follows:
ADD CL,DL ;[CL]=32H (ASCII for 2)
;[DL]=35H(ASCII for 5)
;Result [CL]=67H
MOV AL,CL ;Move result to AL.
;Since AAA adjust only [AL] register.
AAA ;[AL]=07, unpacked BCD for 7 .

- In order to send the unpacked BCD result 07 back to the terminal, AL

can be ORed with 30H to provide 37H, the ASCII code for 7
 AAS(ASCII Adjust after Subtraction)
Consider the following e.g. of 35H – 37H.
Assume [AL] =35H (ASCII for 5)
[DL]=37H (ASCII for 7)
The following sequence provides the correct subtraction result:
SUB AL,DL ;AL=AL-DL
;[AL]=FE(1111 1110)
(subtraction result in 2’s complement)
;C=1 means borrow is used in BCD subtraction
AAS ;[AL]=08(in BCD)

BCD data in AL can be ORed with 30H to produce the correct

ASCII code to produce the output to the terminal.
 Multiplication
 Only the modern µps contain multiplication and division
instructions.

 Multiplication is performed on bytes, words etc..

 The product after multiplication is always a double –width

product (E.g. If two 8-bit numbers are multiplied, they
generate a 16-bit product).

 Flag bits are effected when multiplication executes, but the

results are un-predictable and therefore are cared with less
importance.
 8-Bit Multiplication
•With 8-bit multiplication, the multiplicand is always
in the AL register; and the multiplier can be any 8-
bit register or any memory location.

•The multiplication instruction contains one operand,

because it always multiplies the operand with the
contents of register AL.

•MUL BL, Multiplies the contents of AL by the contents

of BL. After the multiplication, the product is placed in
AX. (Since a double width product).
E.g. Suppose BL=5 and CL = 10 contains two 8-bit unsigned
numbers and these numbers are to be multiplied and the
product should be in DX.

MOV BL,5 ;load data

MOV CL,10 ;load data

MOV AL,BL ;position data

MUL CL ;multiply

MOV DX,AX ;position product

 16 –Bit Multiplication
• Similar to 8 bit multiplication, but AX contains the
multiplicand instead of AL and the product appear in
DX_AX, instead of AX.

• DX contains the most significant 16-bits of the product.

• And AX contains the least significant 16-bits of the

product

• Example,

MUL CX
AX is multiplied by CX
; the product is in DX_AX
 AAM(ASCII Adjust after Multiplication)
 Adjust the product of two unpacked BCD digits in AX.

 8086 does not allow multiplication of two ASCII codes.

 So, before multiplying two ASCII bytes, one must mask the upper
4-bits of each of these bytes and then multiply them as two
unpacked BCD digits and then use AAM for adjustment.

 In order to convert the unpacked BCD product back to ASCII, the

product must be ORed with 3030H.
E.g. Suppose AL=03H and BL=09H
MOV AL,3 ;load multiplicand
MOV CL,9 ;load multiplier
MUL CL ; AX will be 001B H
AAM ;adjust, i.e. AX=0207H
 Division(DIV)
• As with multiplication, division occurs 8/16 bits numbers in 8086
to 80286 microprocessors and on 32-bit numbers in the 80386 to
(P-4).
• The dividend is always a double-width that is divided by the
operand (divisor).
• This means, an 8-bit division  divides a 16-bit number by an 8
bit number;
• A 16 bit division divides a 32 bit number by a 16 bit number
etc…
• None of the flag bits change predictably for a division.
A division can result in two different types of errors (in the case of
8086).
1) Attempt to division by zero
2) Divide overflow
(A divide overflow occurs when a small number is divided
into a large number)
 8 Bit Division
• An 8 bit division use the AX register to store the dividend
that is divided by the contents of any 8 bit register or
memory location.
• The quotient moves into AL after division with AH
containing a whole number remainder.
DIV CL
 AX is divided by CL;
 (The quotient is in AL & the remainder is in AH.)
 With 8-bit division , the dividend must be converted to a
16-bit number in AX.
 For this, the most-significant 8-bits must be cleared to
zero (zero extended).
E.g.
MOV AL,06H
MOV AH,00H ;zero extended.
MOV CL , 02H
DIV CL ;AX divide CL.
MOV BL , AL ;Save quotient to BL.
MOV BH , AH ;Save remainder to BH.
 16-Bit Division
• 16 bit division is similar to 8-bit division, except that
instead of dividing into AX, the 16-bit number is
divided into DX_AX, a 32 bit dividend.
• The quotient appears in AX and remainder in DX after
division.
DIV CX
;DX_AX is divided by CX
; The quotient will be in AX and the remainder will
be in DX.
If a 16 bit unsigned number is placed in AX, then DX must
be cleared to zero.eg divide 43A67H by 2B14H
Mov DX,04
Mov AX,3A67
E.g.
MOV AX,2025H
MOV DX,0000H ;zero extended.
MOV CX, 0005H
DIV CX ;AX_DX divide CX
MOV BX , AX;save quotient
MOV CX , DX;save remainder.
 AAD(ASCII Adjust before Division)
 AAD instruction adjusts the numerator in AX before
division. The numerator has to be a single byte unpacked
BCD number (not ASCII).
 AAD must be used before dividing two unpacked BCD
digits.
 The AAD instruction multiplies AH by 10 and adds it to
AL and sets AH to zero.
E.g. suppose AX =0207H.
After executing AAD, the AX will changes to 001BH.
• The AAD instruction converts the unpacked BCD number
into its equivalent binary form.
Consider dividing 27 by 5
Code:
MOV BL,5 ;divisor in unpacked BCD form.
MOV AX,0207H ;dividend in unpacked BCD form.
AAD ; AX = 001BH
DIV BL ;AX÷BL
The DIV instruction leaves the quotient in AL (05H)and
the remainder in AH(02H)
 There are a total of 5 logical instructions available with
8086 instruction set:

AND, OR, NOT, XOR and TEST

 Except for NOT, all of the logical operators are binary

operators (i.e, they require two operands).

 All of these instructions affect the status flags.

The zero flag, sign flag and the parity flag are mostly
recording the useful information about the result.
 AND

 AND operation clears bits of a binary number.

The task of clearing a bit in a binary number is
called masking.

 The operation of the AND function showing how

bits of a number are masked (or cleared to zero).

XXXX XXXX unknown number

*0000 1111 mask
------------------------------------------
0000 XXXX RESULT
Some Instructions:

AND AL,BL AL=AL AND BL

AND AX,CX AX=AX AND CX

AND CL,33H CL=CL AND 33H

AND DI,4FFFH DI=DI AND 4FFFH

AND AX,[DI] AX is ANDed with the word contents of the

DS memory location addressed by DI.
A short program that converts the ASCII contents of
BX into BCD.
MOV BX,3135H ;loads ASCII
AND BX,0F0FH ;mask BX.

the process will be,

0011 0001 0011 0101
0000 1111 0000 1111
0000 0001 0000 0101 = 01 05H in unpacked BCD
 OR
The operation of the OR function showing how bits
of a number are set to one. The OR operation
sets any bit ; the AND operation clears any bit.
XXXX XXXX unknown number
+ 0000 1111 mask
------------------------------------------
XXXX 1111 RESULT
Some instructions:
OR AH,BL AH=AH OR BL
OR SI,DX SI=SI OR DX
OR DH,0AH DH OR 0AH
OR DX,[BX] DX is ORed with the word content
of the DS memory location
(addressed by BX)
 For Ex:
MOV AX, 0303H
OR AX, 3030H
Then the result in AX will be
0000 0011 0000 0011
0011 0000 0011 0000
0011 0011 0011 0011 = 3333H
 NOT
 NOT instruction inverts all bits of a byte, word, or
double word.
NOT CH  CH is one’s complemented

NOT TEMP  the contents of the DS memory

location addressed by TEMP is one’s complemented.
Ex:
MOV AX, 200FH
NOT AX
will change the result in AX as
0010 0000 0000 1111
1101 1111 1111 0000 = DFF0H
 Exclusive –OR (XOR)

 A common use for the XOR instruction is to

clear a register to zero.

 E.g.: XOR CH,CH

 clears CH register to 00H. (requires 2 bytes of
memory).

 Like wise MOV CH,00H

 clears CH to 00H. (requires 3 bytes of memory.)
 TEST Instruction
 Test instruction is a logical compare instruction which performs a bit
by bit logical AND operation on the two operands.

 The difference between TEST and AND is that, the AND instruction
changes the destination operand, while the TEST instruction does not.

 TEST only affects the condition of the flag register, which indicates
the result of the test.

 Normally, a conditional Jump instruction follows a TEST.

 TEST instruction functions in the same manner as CMP instruction.

 The difference is that the TEST instruction normally tests a single bit.
(occasionally multiple bit)while CMP instruction tests the entire byte
or word.
 If the bit under test is a zero  zero flag (Z) =1
(indicating a zero result)
 If the bit under test is a non zero  Z=0
(indicating a non-zero result.)
 Usually the TEST instruction is followed by either the JZ
(Jump if zero) or JNZ (jump if not zero) instruction.
 TEST DL,DH DL is ANDed with DH.
 TEST CX, BX CX is ANDed with BX.
 The destination operand is normally tested against
immediate data.
 The value of immediate data is 1 to test the rightmost bit
position, 2 to test the next bit, 4 for the next and so
on…..
TEST AH,4 ; AH is ANDed with 4 or the third bit of
AH is tested
 A short program that tests the rightmost and leftmost
bit operations of the AL register.(Here 1 selects the
rightmost bit and 128 selects the leftmost bit.)
TEST AL,1 ;test right most bit or LSB.
JNZ RIGHT ;jump to the location RIGHT (if the
LSB is non zero)
TEST AL,128 ;test left most bit.
JNZ LEFT ; jump to the location LEFT (if the
MSB is non zero).
 The JNZ instruction follows each TEST to jump to
different memory locations, depending on the outcome
of the tests.
 The JNZ instruction jumps to the operand address.
(RIGHT or LEFT) if the bit under test is not zero.
 Comparison (CMP)
 This instruction compares the source operand, which may be a
register or an immediate data or a memory location, with a
destination operand that may be a register or a memory location.

 For comparison, it subtracts the source operand from the

destination operand but does not store the result anywhere. But,
the flags are affected depending upon the result of the subtraction.

 If both of the operands are equal, zero flag will be set

 If the source operand is greater than the destination operand,

carry flag will be set, else , carry flag will be reset.

 Normally a CMP instruction follows a conditional JUMP (which

tests the condition of the flag bits).
CMP CL,BL  CL – BL
CMP AX,200H AX - 200H
CMP [DI],CH  CH subtracts from the
contents of the
DS memory location(addressed by
DI)

CMP CL,[BP] the byte contents of the SS

memory
location(addressed
by BP) subtracted
from CL.

CMP DI,TEMP[BX] the word contents of

the DS memory location (addressed by
 E.g. CMP AL ,10H
JAE SUBER ; if 10H or above.
 The above example shows a comparison instruction
followed by a conditional JUMP instruction.

 Conditional jump instructions that often follow the

comparison are

 JA (Jump Above) or JB (Jump Below) ,

 JAE (Jump Above or Equal) or JBE (Jump Below

or Equal)
In the above example,
 If the JA follows the comparison , the jump occurs if the
value in AL is above 10H.
 If JB follows the comparison, the jump occurs if the value
in AL is below 10H.
 In the above example, the JAE(Jump Above or Equal)
instruction follows comparison.
 This instruction causes the program to continue at memory
location SUBER, if the value in AL is 10H or above.
 The JBE instruction could follow the comparison to jump
if the outcome is below or equal to 10H.
 The program control instructions direct the flow
of a program and allow the flow to change.

 Ex: JMP, LOOP etc..

 A change in flow often occurs after a decision,

made with the CMP or TEST instruction, is
followed by a conditional jump instruction.
 JMP (Jump)
 JMP allows the programmer to skip sections of a program
and branch to any part of the memory for the nex
instruction.

 A conditional jump instruction allows the programmer to

make decisions based upon numerical tests.

 The result of numerical tests are held in the flag bit

which are then tested by conditional jump instructions.

 The conditional jump instructions test the following flag

bits sign(S), carry(C), parity(P), overflow(O)
Some conditional jump instructions are:
Opcode Operation Condition tested
JA Jump if above Z=0 & C=0
JAE Jump if above or equal C=0
JB Jump if below C=1
JBE Jump if below or equal Z=1 or C=1
JC Jump if carry set C=1
JE or JZ Jump if equal or jump if zero Z=1
JNCJump if no carry C=0
E.g. shows how jump instructions pass control from one
part of the program to another. It also illustrates the
use of a label (a symbolic name for a memory) with the
jump instruction.
XOR BX,BX
START: MOV AX,1
ADD AX,BX
JMP NEXT
NEXT: MOV BX,AX
JMP START
 Loop
 The loop instructions is a combination of a decrement CX
and the JNZ conditional jump.

 If CX ≠ 0, it jumps to the address indicated by the label.

 when CX (the count register) becomes 0, the next

sequential instruction executes.
 E.g. MOV CX, 0005
XOR BX,BX
L1: MOV AX,01
ADD AX,BX
MOV BX,AX
LOOP L1
3 interrupt instructions available to
the programmer are
 INT
 IRET
 INTO
 INT
 There are 256 different interrupt instructions(INTs).

 Each INT instruction has a numeric operand whose range is 0 to

255.

 Each INT instruction is 2 bytes long. The first byte contains the
opcode and the 2nd byte contains the vector type number.(only
the exception to this is INT 3. It is a one –byte special interrupt
instruction used for break points.)

 It is common to insert an INT-3 instruction in a program to

interrupt or break the flow of the program.
 IRET
 Interrupt returns instruction is used only with software or hardware
interrupt service procedures.

 When an interrupt service is to be called, before transferring control to

it, the IP, CS, and flag register are stored on to the stack to indicate
the location from where the execution is to be continued.

 When IRET is executed, the values of IP, CS and flags are retrieved
from the stack to continue the execution of the main program. That
means, the IRET instruction will
- Pop stack data back into IP.
- Pop stack data back to CS.
- Pop stack data back into flag register.
 INTO
 Interrupt on Overflow(INTO) is a conditional interrupt
instructions that test the Overflow flag (0F)

 If OF=0, the INTO instruction performs no operation.

 If OF=1, the INTO instruction executes an interrupt

occurs through vector type number 4.

 The INTO instruction appears in program that adds or

subtracts signed binary numbers.
 D
EN