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Introduction To Routing in Physical Design

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0% found this document useful (0 votes)
115 views

Introduction To Routing in Physical Design

Uploaded by

mahfuzking555
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Title

Introduction To Routing In
Physical Design
Routing in Physical Design

Goals of Routing

Steps of routing
TABLE OF
CONTENT Channel Routing

S The Left-Edge Algorithm

An Example of Channel
Routing
Channel Routing Problem
ROUTING IN PHYSICAL DESIGN
• Routing is the process of path selection in any network.
• Routing is the process of creating physical connections
between or among the signal pins.
•A computer network is made of many mechanism, called
nodes, and paths or links that connect those node.
• Communication between two nodes is an interconnected
network can take place through many different paths.
GOALS OF ROUTING
• Minimize the total interconnect or wire length and
vias.
• Complete the routing within the area of the design.
• Establishing the physical connectivity of the design
with minimum routing resources.
• No DRC (Design rule check) violations.
• Reduce the layout errors.
STEPS OF ROUTING
Each metal layer of grid based routing system has its
tracks and preferred routing direction, which are described
in unified cell in the standard cell library. Routing activities
are divided into four steps:
Global Route
Track Assignment
Detailed Routing
Search and Repair
Global routes
• Global routes assign nets to particular metal layers
and global routing cells. The global route aims to
avoid crowded global cells while making as few
diversions as possible. Global routes also avoid pre-
routed P/G, placement, and routing bottlenecks.
Track Assignment (TA):
• It allocates each net to a certain track and lays down
actual metal traces. To reduce the number of vias, it
attempts to create long, straight lines. At this stage,
physical DRC is not considered.
Detail Routing:
• Detail Routing seeks to repair any DRC violations following
track assignment using a set size small region (SBox). The
detailed routing goes through the whole design box by box
until the routing pass is finished. It also performs timing-
driven routing.

Search and Repair


• The search-and-repair stage is performed during detailed
routing after the first iteration. In search-and-repair, shorts
and spacing violations are located and rerouting of affected
areas to fix all possible violation is executed.
CHANNEL ROUTING (IN VLSI PHYSICAL
DESIGN)

Different colors represent different layers.


We have to minimize the number of tracks means minimizing the routing area.

8
THE LEFT-EDGE ALGORITHM
• The left-edge algorithm is based on the VCG. One starts with the VCG, and
makes a list of the vertices that have no incoming edges.
• The Left Edge Algorithm is a well-known Computer-Aided Design algorithm
for wiring together terminals at the top and bottom of a rectangular
region known as a channel. Terminals are placed at the top and bottom of
columns in the channel. Connections are made using two layers of wiring.
• Proposed by Hashimoto and Stevens in 1971 Regarded as the first channel
routing algorithm
• Can be used in solving Channel Routing Problems and it can be used in
PCB design
• Can be applied on VLSI physical design
• Requires building the Vertical Constraint Graph (VCG) for a channel
routing problem
THE LEFT-EDGE ALGORITHM
Step 2
Step 1 Place horizontal
Build the Vertical segments choose nets
Constraint Graph (1) that do not have
(VCG) for the input ancestors in the VCG
channel routing and (2) whose
problem horizontal segments
do not overlap) and
update the VCG
Step 3
Repeat Step 2 until all
the horizontal segments
have been placed
DESCRIPTION OF A CHANNEL
ROUTING PROBLEM
# Description of a Channel
Routing
# Problem

Columns: 1 2 3 4 5 6 7

Nets: A B C D E F

Top_Row: C NULL F E B NULL A

Bottom_Row: A NULL NULL B


NULL B C

Left_Nets: A D F

Right_Nets: D E
Input of channel router
Vertical Constraint Graph

At column 1, the horizontal segment of net C must


be placed above the horizontal segment of net A.
Vertical Constraint Graph
C

At column 1, the horizontal segment of net C must be placed


above the horizontal segment of net A.
Vertical Constraint Graph

C B

A E

At column 4, the horizontal segment of net E must be placed above


the horizontal segment of net B.
Vertical Constraint Graph
C

C B

A E
At column 7, the horizontal segment of net D must be placed
above the horizontal segment of net C.
An Example N1
N1 N4
0

N5 N9 N7

N3 N8 N6

Channel N2

Routing
N1
N1 N4
0

N5 N9 N7

N3 N8 N6

Consider horizontal segments of N1, N4, and N10 N2


(the nets that do not have ancestors)
N1
N1 N4
0

N5 N9 N7

N3 N8 N6

N1 has the smallest x coordinate


N1 and N4 cannot be placed on the same track N2
N1 and N10 can be placed on the same track
Place N1 and N10 on the highest track
N1
N1 N4
0

N5 N9 N7

N3 N8 N6

N2
N1 has the smallest x coordinate
N1 and N4 cannot be placed on the same track
N1 and N10 can be placed on the same track
Place N1 and N10 on the highest track
N1
N1 N4
0

N5 N9 N7

N3 N8 N6

Update the VCG


(remove N1 and N10 from the VCG) N2
N4

N5 N9 N7

N3 N8 N6

Update the VCG


(remove N1 and N10 from the VCG) N2
N4

N5 N9 N7

N3 N8 N6

Consider horizontal segments of N4 and N7


(the nets that do not have ancestors) N2
N4

N5 N9 N7

N3 N8 N6

Consider horizontal segments of N4 and N7 N2


(the nets that do not have ancestors)
N4

N5 N9 N7

N3 N8 N6
Consider horizontal segments of N4 and N7
(the nets that do not have ancestors)
N4 has the smallest x coordinate
N4 and N7 cannot be placed on the same track N2
Place N4 on the second highest track
N4

N5 N9 N7

N3 N8 N6
Consider horizontal segments of N4 and N7
(the nets that do not have ancestors)
N4 has the smallest x coordinate N2
N4 and N7 cannot be placed on the same track
Place N4 on the second highest track
N4

N5 N9 N7

N3 N8 N6

Update the VCG (remove N4 from the VCG)


N2
N5 N9 N7

N3 N8 N6

N2
Update the VCG (remove N4 from the VCG)
Repeat the placement iterations …
The Left-Edge Algorithm
Result of the Example
The Left-Edge Algorithm
Result of the Example

N1 = 5
N2 = 1
N3 = 2
N4 = 4
N5 = 3
N6 = 2
N7 = 3
N8 = 1
N9 = 2
N10 = 5
THE CHANNEL ROUTING PROBLEM
The channel routing problem in a multi-layer channel is very
important in automatic layout design of VLSI circuits and printed
circuit boards. A channel consists of two parallel, horizontal rows
of points which are called terminals. The terminals are placed at
regular intervals and identify the columns of the channel. A net
consists of a set of terminals that must be interconnected
through some routing paths. Some nets may have a connection
point at one or both ends (top and/or bottom) of the channel. The
channel routing problem is not only to route the given nets or
interconnections between the terminals on the multi-layer
channel, but also to minimize the channel area.
A CHANNEL ROUTING PROBLEM (DOGLEG
CHANNEL ROUTING)

The Left-Edge Algorithm cannot deal with a channel routing


problem whose VCG contains loops.
Thank You

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