Sign-off Methodology
STA can be run for many different scenarios. The three main variables that
determine a scenario are:
• Parasitics corners
• Operating mode
• PVT corner
Parasitics Interconnect Corners:
Parasitics can be extracted at many corners. These are mostly governed by
the variations in the metal width and metal etch in the manufacturing
process. Some of these are:
• Typical: This refers to the nominal values for interconnect resistance and
capacitance.
• Max C: This refers to the interconnect corner which results in maximum
capacitance. The interconnect resistance is smaller than at typical corner. This corner
results in largest delay for paths with short nets and can be used for max path
analysis.
• Min C: This refers to the interconnect corner which results in minimum capacitance.
The interconnect resistance is larger than at typical corner. This corner results in
smallest delay for paths with short nets and can be used for min path analysis.
• Max RC: This refers to the interconnect corner which maximizes the interconnect RC
product. This typically corresponds to larger etch which reduces the trace width. This
results in largest resistance but corresponds to smaller than typical capacitance. Over
all, this corner has the largest delay for paths with long interconnects and can be used
for max path analysis.
• Min RC: This refers to the interconnect corner which minimizes the interconnect RC
product. This typically corresponds to smaller etch which increases the trace width.
This results in smallest resistance but corresponds to larger than typical capacitance.
Overall, this corner has the smallest path delay for paths with long interconnects and
can be used for min path analysis.
Operating Modes
The operating mode dictates the operation of the design. Various
operating modes for a design can be:
• Functional mode 1 (for e.g. high-speed clocks)
• Functional mode 2 (for e.g. slow clocks)
• Functional mode 3 (for e.g. sleep mode)
• Functional mode 4 (for e.g. debug mode)
• Testmode1(for e.g. scan capture mode)
• Testmode2(for e.g. scan shift mode)
• Testmode3(for e.g. bist mode)
• Testmode4(for e.g. jtag mode)
PVT Corners
The PVT corners dictate at what conditions the STA analysis takes place.
The most common PVT corners are:
• WCS(slow process, low power supply, high temperature)
• BCF(fast process, high power supply, low temperature)
• Typical (typical process, nominal power supply, nominal temperature)
• WCL(worst-case slow at cold- slow process, low power supply, low
temperature)
Multi-mode Multi-Corner Analysis
• Multi-mode multi-corner (MMMC) analysis
refers to performing STA across multiple
operating modes, PVT corners and parasitic
interconnect corners at the same time.
• For example, consider a DUA that has four
operating modes (Normal, Sleep, Scan shift,
Jtag), and is being analyzed at three PVT
corners (WCS, BCF, WCL) and three parasitic
interconnect corners (Typical, Min C, Min
RC).
• There are a total of thirty six possible scenarios at which all timing
checks, such as setup, hold, slew, and clock gating checks can be
performed.
• Running STA for all thirty six scenarios at the same time can be
prohibitive in terms of runtime depending upon the size of the
design.
• It is possible that a scenario may not be necessary as it may be
included within another scenario, or a scenario may not be required.
• Also, it may not be necessary to run all modes in one corner, such as
Scan shift or Jtag modes may not be needed in scenario 5.
Advantages of MMMC
• The advantage of running multi-mode multi-corner STA is of savings in
runtime and complexity in setting up the analysis scripts.
• Additional savings in an MMMC scenario is that the design and
parasitics need to be loaded only once or twice as opposed to loading
these individually multiple times for each mode or corner.
• Multi-mode multi-corner has a bigger advantage in an optimization flow
where the optimization is done across all scenarios such that fixing
timing violations in one scenario does not introduce timing violations in
another scenario.
