UNIT-1

Dr. S. K. Verma
Introduction
 Computer Organization vs Computer
Architecture
 System And Computer System
 Computer Types
◦ Embedded computers
 used for a specific purpose
◦ Personal computers
 Desktop computers
 Workstation computers
 Portable and Notebook computers
◦ Servers and Enterprise systems
◦ Supercomputers and Grid computers
 cloud computing
Eight Great Ideas in Computer
Architecture
 Design for Moore’s Law
 Use Abstraction to Simplify Design

◦ abstractions to represent the design at different

levels of representation;
 Make the Common Case Fast
 Performance via Parallelism
 Performance via Pipelining
 Performance via Prediction
 Hierarchy of Memories
 Dependability via Redundancy
Functional Units
Contd.
 Instructions, or machine instructions, are
explicit commands
◦ transfer of information within a computer or
between the computer and its I/O devices
◦ arithmetic and logic operations to be performed
 program is a list of instructions which
performs a task.
 Data are numbers and characters used as
operands by the instructions.
 Each instruction, number, or character is
encoded as a string of binary digits called bits
Input Units
 Computers accept coded information
through input units
 Keyboard touchpad, mouse, joystick, and

trackball.
 Microphones
 Cameras
 Digital communication facilities
Memory Unit
 There are two classes of storage:
 Primary Memory
◦ main memory
◦ a fast memory that operates at electronic speeds
◦ memory consists of a large number of semiconductor storage cells
◦ cells are rarely read or written individually
◦ handled in groups of fixed size called words
◦ one word can be stored or retrieved in one basic operation
◦ word length of the computer
◦ distinct address is associated with each word location
◦ A memory in which any location can be accessed in a short and
fixed amount of time after specifying its address is called a
random-access memory (RAM).
◦ memory access time
Contd.
 Cache Memory
◦ adjunct to the main memory, a smaller, faster RAM unit,
called a cache.
◦ Used to hold sections of a program that are currently
being executed.
◦ cache is tightly coupled with the processor and is usually
contained on the same integrated-circuit chip.
 Secondary Storage
◦ additional, less expensive, permanent secondary storage is
used.
◦ Access times for secondary storage are longer than for
primary memory
◦ magnetic disks, optical disks (DVD and CD), and flash
memory devices.
Arithmetic and Logic Unit
 operations are executed in the arithmetic
and logic unit (ALU)
 When operands are brought into the

processor they are stored in high-speed

storage elements called registers.
 register can store one word of data
 Access times to registers are even shorter

than access times to the cache unit

Output Unit
 output unit is the counterpart of the input
unit.
 function is to send processed results to the

outside world.
Control Unit
 Coordination among different units done by CU.
 Control circuits are responsible for generating the
timing signals.
 large set of control lines (wires) carries the signals
used for timing and synchronization of events in all
units.
 The operation of a computer can be summarized as
follows:
◦ The computer accepts information in the form of programs
and data through an input unit and stores it in the memory.
◦ Information stored in the memory is fetched under
program control into an arithmetic and logic unit, where it
is processed.
◦ Processed information leaves the computer through an
output unit.
◦ All activities in the computer are directed by the control unit.
Basic Operational
Concepts
 Load R2, LOC
 Add R4, R2, R3
 Store R4, LOC
Contd.
Contd.
Contd.
Contd.
 the processor contains a number of
registers used for several different
purposes.
 instruction register (IR) holds the instruction

that is currently being executed.

 program counter (PC) is another specialized

register
 PC points to the next instruction that is to

be fetched from the memory.

 general-purpose registers R0 through Rn−1,

often called processor registers

Contd.
 typical operating steps:
◦ A program must be in the main memory in order for it
to be executed.
◦ Execution of the program begins when the PC is set to
point to the first instruction of the program.
◦ contents of the PC are transferred to the memory
along with a Read control signal.
◦ the addressed word has been fetched from the
memory and loaded into register IR.
◦ the contents of the PC are incremented so that the PC
points to the next instruction to be executed
◦ Normal execution of a program may be preempted if
some device requires urgent service.
Contd.

 processing required for a single instruction is called an

instruction cycle.
 fetched instruction is loaded into a register in the processor
known as the instruction register (IR).
 instruction contains bits that specify the action the processor is
to take.
 Actions category:
◦ Processor-memory
◦ Processor-I/O
◦ Data processing
◦ Control
Contd.
Instruction Set Architecture
Memory Locations and
Addresses
 a group of n bits can be
stored or retrieved in a
single, basic operation.
 n bits is called the word

length
Contd.
 Byte Addressability
◦ byte-addressable memory is used
◦ if the word length of the machine is 32 bits,
successive words are located at addresses 0,
4, 8, . . . , with each word consisting of four
bytes.
 Big-Endian and Little-Endian
Assignments
Contd.
Representing Instructions in
the Computer
 layout of the instruction is called the
instruction format
 the numeric version of instructions machine
language and a sequence of such instructions
machine code.

 op: Basic operation of the instruction, traditionally called the opcode.

 rs: The first register source operand.
 rt: The second register source operand
 rd: The register destination operand. It gets the result of the operation.
 shamt: Shift amount.
 funct: Function. This field, often called the function code, selects the specific
variant of the operation in the op field.
MIPS (Microprocessor without Interlocked Pipelined Stages)
Instructions and Instruction
Sequencing
 computer must have instructions capable of
performing four types of operations:
◦ Data transfers between the memory and the
processor registers
◦ Arithmetic and logic operations on data
◦ Program sequencing and control
◦ I/O transfers
Contd.
 Register Transfer Notation
◦ the contents of any location are denoted by
placing square brackets around its name
 R2 ← [LOC]
 R4 ← [R2] + [R3]
◦ the right hand side of an RTN expression always
denotes a value
◦ left-hand side is the name of a location.
Contd.
 Assembly-Language Notation
◦ the transfer from memory location LOC to
processor register R2, is specified by
 Load R2, LOC
 Add R4, R2, R3
 RISC and CISC Instruction Sets
Contd.
Addressing Modes
 Immediate
 Direct
 Indirect
 Register
 Register

indirect
 Displacement
 Stack A = contents of an address field in the instruction
R = contents of an address field in the instruction that
refers to a register
EA = actual (effective) address of the location
containing the referenced operand
(X) = contents of memory location X or register X
Contd.
 Virtually all computer architectures provide more
than one of addressing modes. (mode field)
 the effective address will be either a main
memory address or a register.
 Immediate Addressing
◦ the operand value is present in the instruction
 Operand = A
◦ advantage of immediate addressing is that no
memory reference other than the instruction fetch is
required to obtain the operand
◦ disadvantage is that the size of the number is
restricted to the size of the address field
Contd.
 Direct Addressing
◦ the address field contains the effective address of the
operand:
 EA = A
◦ It requires only one memory reference and no special
calculation.
◦ limitation is that it provides only a limited address space.
 Indirect Addressing
◦ the address field refer to the address of a word in memory
 EA = (A)
◦ advantage of approach is that for a word length of N, an
address space of 2N is now available.
◦ disadvantage is that three or more memory references
could be required to fetch an operand.
Contd.
 Register Addressing
◦ It is similar to direct addressing
◦ address field refers to a register rather than a main memory
address:
 EA = R
◦ if the contents of a register address field in an instruction is
5, then register R5 is the intended address, and the operand
value is contained in R5.
◦ advantages of register addressing are
 a small address field is needed in the instruction
 no time- consuming memory references are required
◦ modern processors employ multiple general-purpose
registers, placing a burden for efficient execution on the
assembly- language programmer
Contd.
 Register Indirect Addressing
◦ register indirect addressing is analogous to indirect
addressing.
 EA = (R)
◦ advantages and limitations of register indirect
addressing are the same as for indirect addressing.
◦ register indirect addressing uses one less memory
reference than indirect addressing.
 Displacement Addressing
◦ combines the capabilities of direct addressing and
register indirect addressing
 EA = A + (R)
Contd.
 Relative addressing
 Base-register addressing
 Indexing
 relative addressing

◦ also called PC-relative addressing

◦ implicitly referenced register is the program counter
(PC)
◦ Relative addressing exploits the concept of locality
◦ If most memory references are relatively near to
the instruction being executed, then the use of
relative addressing saves address bits in the
instruction.
Contd.
 base-register addressing
◦ The referenced register contains a main memory
address, and the address field contains a displacement
 Indexing
◦ The address field references a main memory address, and
the referenced register contains a positive displacement
from that address
◦ use of indexing is to provide an efficient mechanism for
performing iterative operations.
◦ A, A + 1, A + 2, . . . ,
◦ The value A is stored in the instruction’s address field,
and the chosen register, called an index register, is
initialized to 0. After each operation, the index register is
incremented by 1.
Contd.
 Stack Addressing
◦ a stack is a linear array of locations
◦ Also known as pushdown list or last-in-first-out
queue
Number Representation and
Arithmetic Operations
 Integers
◦ B = bn−1 . . . B1b0
 where b = 0 or 1 for 0 ≤ i ≤ n − 1. This vector can
i

represent an unsigned integer value V(B) in the

range 0 to 2 − 1.
n

 V(B) = bn−1 × 2n−1 + ・ ・ ・ +b1 × 21 + b0 × 20

 Three systems are used for representing
numbers:
◦ Sign-and-magnitude
◦ 1’s-complement
◦ 2’s-complement
Contd.
 The rules for addition and subtraction of n-bit
signed numbers using the 2’scomplement
representation
◦ To add two numbers, add their n-bit representations,
ignoring the carry-out bit from the most significant bit
(MSB) position. The sum will be the algebraically
correct value in 2’s-complement representation if the
actual result is in the range−2 n−1 through+2n−1 − 1.
◦ To subtract two numbers X and Y , that is, to
perform X − Y , form the 2’s-complement of Y , then
add it to X using the add rule. Again, the result will
be the algebraically correct value in 2’s-
complement representation if the actual result is in
the range −2n−1 through+2n−1 − 1
Contd.
 Sign Extension
 Overflow in Integer Arithmetic

◦ When the actual result of an arithmetic operation

is outside the representable range, an arithmetic
overflow has occurred.
◦ an overflow has occurred when the sign of the
sum is not the same as the signs of the
summands.
Contd.
 Floating-Point Numbers
◦ binary floating-point number can be represented by:
 a sign for the number
 some significant bits
 a signed scale factor exponent for an implied base of 2
◦ IEEE (Institute of Electrical and Electronics
Engineers) standard for 32-bit floating-point
number representation uses
◦ a sign bit
◦ 23 significant bits
◦ 8 bits for a signed exponent of the scale factor
Contd.
 Character Representation
 characters is ASCII (American Standard

Code for Information Interchange).

Adders
 Half Adder
Contd
 Full Adder
Contd.
 Four Bit Adder
Contd.
 Carry Look Ahead Adder
Contd.
 Binary Adder and Subtractor
Hardware for Addition and
Subtraction
Multiplication
 unsigned integers
◦ Multiplication involves the generation of partial
products, one for each digit in the multiplier. These
partial products are then summed to produce the final
product.
◦ When the multiplier bit is 0, the partial product is 0.
When the multiplier is 1, the partial product is the
multiplicand.
◦ each successive partial product is shifted one position
to the left relative to the preceding partial product.
◦ The multiplication of two n-bit binary integers results
in a product of up to 2n bits in length
Contd.
Flowchart for unsigned Binary
Multiplication
Contd.
 twos complement
multiplication
◦ multiplication of a binary
number by 2n is
accomplished by shifting
that number to the left n
bits.
◦ the partial products should
be viewed as 2n-bit
numbers generated from
the n-bit multiplicand.
Contd.
 Booth’s algorithm
Contd.
Division

Contd.
Contd.
 D=Q*V+R

 Carry Save Multiplier

Floating-Point
Representation


Floating-Point Arithmetic
 A floating-point operation may produce one of
these conditions:
◦ Exponent overflow: A positive exponent exceeds
the maximum possible exponent value.
◦ Exponent underflow: A negative exponent is less
than the minimum possible exponent value (e.g., -
200 is less than -127).
◦ Significand underflow: In the process of aligning
significands, digits may flow off the right end of the
significand.
◦ Significand overflow: The addition of two
significands of the same sign may result in a carry
out of the most significant bit.
Addition and Subtraction
 There are four basic phases of the algorithm
for addition and subtraction:
◦ Check for zeros.
◦ Align the significands.
◦ Add or subtract the significands.
◦ Normalize the result.
Multiplication and Division
Contd.
Thank You (End Unit 1)