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CA Lecture 2

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0% found this document useful (0 votes)
11 views17 pages

CA Lecture 2

Uploaded by

mainul684islam
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CSE - 313

Computer Architecture
Faculty: Shoib Ahmed Shourav
United International University
Preview of the last class
Microprocessor
without
Interlocked
Pipeline
Stages (MIPS)
• Assembler
• A program that translates a symbolic version of instructions into the binary
version.
• Assembly Language
• A symbolic representation of machine instructions.
• Five classic components
• Input
• output
• Memory
• Data-path
• Control
• Processor
Memory

• Primary Memory (RAM)


• Faster
• Volatile
• Expensive
• Secondary Memory (Storage)
• Slower
• Non-volatile
• Less expensive
Primary Memory

• RAM (Random Access Memory)


• DRAM (Dynamic) –DDR4 RAM
• SRAM (Static) –Cache memory

• SRAM is static while DRAM is dynamic


• SRAM is faster compared to DRAM
• SRAM consumes less power than DRAM
• SRAM uses more transistors per bit of memory compared to DRAM
• SRAM is more expensive than DRAM
• Cheaper DRAM is used in main memory while SRAM is commonly used in cache
memory
Secondary Memory

• ROM (Read Only Memory)


• EPROM (erasable programmable read only memory)
• CD-ROM
• CD-R/W
• Flash Memory (pen drive)
• Floppy disk
• Magnetic Tape
• Hard disk
Instruction set
• Instruction set (IS):
• The vocabulary of commands understood by a given architecture.
• The set of instructions / primitive operations that a CPU may execute is a
major component of ISA (IS Architecture)
• Assembly language is a textual version of these instructions.
Instruction set
• We will study the MIPS architecture in some detail in this class
• MIPS –semiconductor company that built one of the first commercial RISC
(Reduced IS Computer) architectures
• Why MIPS?
• MIPS is simple, elegant and similar to other architectures developed since the
1980's
• MIPS widely used in embedded apps
• Almost 100 million MIPS processors manufactured in 2002
• Used by NEC, Nintendo, Cisco, Silicon Graphics, Sony, …
MIPS Assembly Language

• All instructions have 3 operands


• One destination, two source operands
• Operand order is fixed (destination first)
• Example: C code: a=b+c
MIPS code: add a, b, c

• C code: a = b + c + d;
• MIPS code: add a, b, c
add a, a, d
• Design principle: Hardware implementation is simplified via regularity
• Operands must be registers in MIPS
• Register set of a machine is a limited number of special locations built directly into the hardware.
MIPS Assembly Language

• 32 registers in MIPS
• Registers are numbered from 0 to 31
• Each register can be referred to by number or name
• Number references: $0, $1, … $30, $31
• By convention, each register also has a name to make it easier to code
• $t0 -$t7 for temporary variables ($8-$15)
• $ra for return address
• Each MIPS register is 32 bits wide
• Groups of 32 bits called a word in MIPS
MIPS Assembly Language

• C code:
• f = (g + h) –(i + j);
MIPS Assembly Language
MIPS Assembly Language

• Arithmetic:
• add, addi, sub
• Why not subi?[Hints 2’s complement]
• Logical:
• and, or, nor, andi, ori, sll, srl
• Why not “not” instruction?
• Why not “nori” instruction?
Any Question?

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