UNIT-5 MICRO
UNIT-5 MICRO
• MICROPROCESSORS
Figure : General form of a microprocessor system and its buses. All the components share the
same data bus and address bus. This arrangement is known as the von Neumann architecture.
Intel 1st 4004 Microprocessor
Buses
Address bus : The address bus carries signals which indicate where
data is to be found and so the selection of certain memory locations or
input or output ports. Each storage location within a memory device
has a unique identification, termed its address, so that the system is
able to select a particular instruction or data item in the memory. Each
input/output interface also has an address. When a particular address
is selected by its address being placed on the address bus, only that
location is open to the communications from the CPU. The CPU is
thus able to communicate with just one location at a time.
• Control bus : The signals relating to control actions are
carried by the control bus. For example, it is necessary for the
microprocessor to inform memory devices whether they are to
read data from an input device or write data to an output
device. The term READ is used for receiving a signal and
WRITE for sending a signal. The control bus is also used to
carry the system clock signals, these are to synchronise all the
actions of the microprocessor system. The clock is a crystal-
controlled oscillator and produces pulses at regular intervals.
The Microprocessors
• The microprocessor is generally referred to as the central
processing unit (CPU). It is that part of the processor system
which processes the data fetching instructions from memory,
decoding them and executing them.
Accumulator register
Status register
Program counter register (PC) or Instruction pointer (IP)
Memory address register (MAR)
Instruction register (IR)
General purpose register
Stack point register (SP)
Memory
• The memory unit in a microprocessor system stores
binary data and takes the form of one or more integrated
circuits. The data may be program instruction codes or
numbers being operated on.
• The size of the memory is determined by the number of
wires in the address bus.
• The memory elements in a unit consist essentially of
large numbers of storage cells with each cell capable of
storing either a 0 or a 1 bit.
• The storage cells are grouped in locations with each
location capable of storing one word. In order to access
the stored word, each location is identified by a unique
address.
• Thus with a 4-bit address bus we can have 16
different addresses with each, perhaps, capable
of storing 1 byte, i.e. a group of 8 bits.