Chap-2
Chap-2
D0
A0 D1
D2
D3
3 Inputs D4
A1 3*8 line Decoder
D5
8 outputs
D6
A2 D7
E
Enable Input
Truth Table for 3 to 8 line
decoder:
3 to 8 line decoder:
D0
A0
D1
2 Inputs
2*4 line Decoder D2
4 outputs
A1 D3
E
Enable Input
NAND Gate Decoder
Decoder Expansion:
Encoder
An Encoder is a digital circuit that
performs the reverse operation of
decoder.
An Encoder has 2^N input lines
and N output lines.
The output lines generate the
binary codes corresponding to
the input value.
The encoders are implemented
with OR gates.
.
. 2^n : n line Encoder
2^N Inputs . N outputs
.
.
.
8 : 3 line Encoder(Octal to Binary
encoder)
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = D4 + D5 + D6 + D7
Multiplexers
A multiplexer is a combinational circuit that
receives binary information from one of 2^n
input data lines and directs it to single output
line.
The selection of particular input data line for
the output is determined by a set of selection
inputs.
A 2^n to 1 MUX has 2^n input data lines and n
input selection lines whose bit combinations
determine which input data are selected for
the output.
A MUX is also called as Data Selector since it
selects one of many data inputs and directs the
binary information to the output.
Block Diagram of MUX
4 : 1 line Multiplexer