ARM7 TDMI –S
LPC 2148
History of arm
ARM started life as part of Acorn computer, and now
designs chips for Apple's iPad.
1978 - Acorn Computers is established in Cambridge,
and produces computers which are particularly
successful in the UK. Acorn's BBC Micro computer was
the most widely-used computer in school in the 1980s.
1985 - Acorn Computer Group develops the world's first
commercial RISC processor - enabling a computer system
which uses simpler commands in order to operate faster, an
advance on the early computer systems which were created
using machine code and tried to pack as many actions into
each command as possible.
1987 - Acorn's ARM processor is the first RISC processor
available in a low-cost PC.
1990 - ARM is founded as a spin-off from Acorn and Apple,
after the two companies started collaborating on the ARM
processor as part of the development of Apple's new Newton
computer system.
2007 - About 98pc of the more than 1bn mobile phones sold
each year use at least one ARM processor.
2008 - The 10 billionth processor chip based on ARM's designs
is shipped.
ARM
ARM stands for Advanced RISC Machines
An ARM processor is basically any 16/32bit microprocessor designed and
licensed by ARM Ltd, a microprocessor design company headquartered in
England, founded in 1990 by Herman Hauser
A characteristic feature of ARM processors is their low electric power
consumption, which makes them particularly suitable for use in portable
devices.
It is one of the most used processors currently on the market
ARM Powered Products
ARM Partnership Model
Why ARM?
The ARM is a 32-bit reduced instruction set
computer (RISC).
It was known as the Advanced RISC Machine, and
before that as the Acorn RISC Machine
ARM processors made them suitable for low power
applications.
This has made them dominant in the mobile and
embedded electronics market as relatively low cost.
ARM 7 TDMI –S
• The ARM7TDMI (ARM7 +Thumb +Debug+ Multiplier+ICE) processor is a 32-
bit RISC CPU designed by ARM.
• The most widely used ARM7 designs, implement the ARMv4T architecture, but
some implement ARMv3
• All these designs use a Von Neumann architecture
• The processor supports both 32-bit and 16-bit instructions via the ARM and Thumb
instruction sets.
• This generation introduced the Thumb 16-bit instruction set providing improved
code density
ARM7TDMI –S stands for:
ARM - Advanced RISC Machines
7 - Version number of the architecture
T - THUMB: 32-bit wide instruction words 16-bit wide memory
D - Debug: 2 break points to stop the CPU (both hardware and software)
M - Multiplier: enhanced (relative to earlier ARM cores) 32x8 Multiplier.
I: Interface: Embedded ICE macro cell. JTAG- Joint Test Action Group.
-S: synthesizable (ie., distributed as RTL rather than a hardened layout)
10
APPLICATIONS
• iPod from Apple
• D-Link DSL-604+ Wireless ADSL Router.
• Many automobiles embed ARM7 cores.
• Sirius Satellite Radio receivers
• Most of Nokia's mobile phone range.
FEATURES OF
LPC2148
• PACKAGE:
▫ 16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
• MEMORY:
▫ 40 kB of on-chip static RAM
▫ 512 kB of on-chip flash program memory.
• SPEED:
▫ 128 bit wide interface/accelerator enables high speed 60-80 MHz operation.
• ADC:
▫ Two 10-bit A/D converters(AD0 and AD1) provide a total of 14 analog
inputs
▫ Conversion times as low as 2.44μs per channel.
• DAC:
▫ Single 10-bit D/A converter provides variable analog output.
• In-System / In-Application Programming (ISP/IAP) via on-chip
boot-loader software.
• Single flash sector or full chip erase in 400 ms and
programming of 256 bytes in 1ms.
• USB 2.0 Full Speed compliant Device Controller with 2kB of
endpoint RAM.
• In addition, the LPC2146/8 provides 8kB of on-chip RAM
accessible to USB by DMA.
• TIMERS:
▫ Two 32-bit timers/external event counters
▫ Each timer with four capture and four compare channels
▫ PWM unit (six outputs) & Watchdog timer
• RTC:
▫ Low power real-time clock with independent power and dedicated 32 kHz clock input.
• SERIAL INTERFACES:
▫ I2C-bus: Two Fast I2C-bus with 400 kbit/s
▫ Serial communication: Two UARTs (16C550)
▫ SPI (Serial Peripheral Interface) and SSP(Synchronous Serial Port) with buffering and
variable data length capabilities
• FAST GPIO: Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny
LQFP64
• INTERRUPTS:
▫ Vectored interrupt controller with 16 configurable priorities and vector addresses.
▫ 9 edge or level sensitive external interrupt pins available.
• OSCILLATOR:
▫ On-chip integrated oscillator operates with an external crystal in range from 1 MHz to 30 MHz and
with an external oscillator up to 50 MHz
• POWER SAVING MODES:
▫ Idle mode
▫ Power-down mode
• CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads.
• 60- MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 μs.
~ PLL CCLK = 10 Mhz to 60 Mhz
Oscillatore : 12Mhz PCLK
We Can Use Upto VPB Divider
10Mhz to 25 Mz Mul %P
5 *2 *01
Applications
• Industrial control
• Medical systems
• Access control
• Point-of-sale
• Communication gateway
• Embedded soft modem
• General purpose applications
LPC2148 ARCHITECTURE
• The ARM is a 32-bit reduced instruction set computer (RISC) instruction set
architecture (ISA) developed by ARM Holdings
• LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S
CPU with real-time emulation and embedded trace support, that combine
microcontroller with embedded high speed flash memory ranging from 32 kB to 512
kB.
Features of LPC2148
• ROM • 512 KB
• RAM • 32 KB
• IO PORTS • 2(P0,P1)
• Timers • 2(32 bit)
• Serial comm • 2 UART, 2 I2C, 1 SSP ,1 SPI
• USB RAM • 2 KB
• PWM modules • 6
• ADC • 2(14 channels)
• Interrupts • 16
• Package • 64 PIN(LQFP)
• DAC • 1
BLOCK
DIAGRAM
Types of buses
• AHB Bus
• LOCAL Bus
• VPB Bus
SYSTEM CONTROL BLOCK
FUNCTIONS
The System Control Block includes several system features and control registers for a
number of functions that are not related to specific peripheral devices. These include:
• Crystal Oscillator
• External Interrupt Inputs
• Miscellaneous System Controls and Status
• Memory Mapping Control
• PLL
• Power Control
• Reset
• VPB Divider
• Wakeup Timer
Each type of function has its own register(s) if any are required and unneeded bits are
defined as reserved in order to allow future expansion.
Crystal oscillator
• While an input signal of 50-50 duty cycle within a frequency range from 1
MHz to 50 MHz can be used by the LPC2141/2/4/6/8 if supplied to its input
XTAL1 pin.
• This microcontroller’s onboard oscillator circuit supports external crystals in
the range of 1 MHz to 30 MHz only.
If the on-chip PLL system or the boot-loader is used, the input clock
frequency is limited to an exclusive range of 10 MHz to 25 MHz.
Crystal oscillator
• The oscillator output frequency is called FOSC
• and the ARM processor clock frequency is referred
to as CCLK for purposes of rate equations, etc..
• FOSC and CCLK are the same value unless the PLL
is running and connected.
Phase Locked Loop (PLL)
• There are two PLL modules in the LPC2141/2/4/6/8 microcontroller.
• The PLL0 is used to generate the CCLK clock (system clock) while the
PLL1 has to supply the clock for the USB at the fixed rate of 48 MHz.
• Structurally these two PLLs are identical with exception of the PLL
interrupt capabilities reserved only for the PLL0.
PIN
CONFIGURATION
Lpc 2144/6//8 consists 45 GPIO functionality in
is 2 port which as
1. Port0 (P0.0 to P0.31)- 24,26,27 are invisible
pins, remaining 29 are visible i/o pins.
2. Port1 (P1.16 to P0.31)- 16 pins are visible and
16 pins are invisible(P1.0-P1.15)
It consist of 19 different peripherals such as
FUNCTION PIN TYPE & DESCRIPTION
• D+ 10 INPUT/OUTPUT(USB bidirectional D+ line)
• D- 11 INPUT/OUTPUT(USB bidirectional D- line)
• XTAL1 62
• XTAL2 61
• RTXC1 3 INPUT(Input to the RTC oscillator circuit)
• RTXC2 5 OUTPUT(output to the RTC oscillator circuit)
• VSS 6, 18 ,25,42,50
• VSSA 52 INPUT(Analog Ground: 0 V reference)
• VDD 23, 43, 51 (power supply)
• VDDA 7 INPUT(analog power supply)
• VREF 63 INPUT(A/D Converter Reference)
• VBAT 49 INPUT(RTC power supply)
Functionality of pins
FUNCTIONALITY OF PINS
• Pin selection register are used to select the different functionalities of LPC2148 i/o
pins.
• PINSEL0 Pin function select
▫ Read/Write 0x0000 0000 (P0.0-P0.15)
• PINSEL1 Pin function select
▫ Read/Write 0x0000 0000 (P0.16-P0.31)
• PINSEL2 Pin function select
▫ Read/Write 0x0000 0000 (P1.16-P1.31)
PIN FUNCTION SELECT REGISTER 0
(Pin of
Select Port Pin sélection Function
Résister) line
1:0 P0.0 00 GPIO Port 0.0
01 TXD (UART0)
10 PWM1
11 Reserved
3:2 P0.1 00 GPIO Port 0.1
01 RxD (UART0)
10 PWM3
11 EINT0
• 5:4 P0.2 00 GPIO Port 0.2
01 SCL0 (I2C0)
10 Capture 0.0 (Timer 0)
11 Reserved
• 7:6 P0.3 00 GPIO Port 0.3
01 SDA0 (I2C0)
10 Match 0.0 (Timer 0)
11 EINT1
• 9:8 P0.4 00 GPIO Port 0.4 0
01 SCK0 (SPI0)
10 Capture 0.1 (Timer 0)
11 AD0.6
• 11:10 P0.5 00 GPIO Port 0.5 0
01 MISO0 (SPI0)
10 Match 0.1 (Timer 0)
11 AD0.7
13:12 P0.6 00 GPIO Port 0.6 0
01 MOSI0 (SPI0)
10 Capture 0.2 (Timer
11 Reserved[1][2]
or AD1.0[3]
15:14 P0.7 00 GPIO Port 0.7
01 SSEL0 (SPI0)
10 PWM2
11 EINT2
• 17:16 P0.8 00 GPIO Port 0.8
01 TXD UART1
10 PWM4
11 Reserved[1][2]
or AD1.1[3]
• 19:18 P0.9 00 GPIO Port 0.9
01 RxD (UART1)
10 PWM6
11 EINT3
21:20 P0.10 00 GPIO Port 0.10
01 Reserved[1][2] or RTS
(UART1)[3]
10 Capture 1.0 (Timer 1)
11 Reserved[1][2]
orAD1.2[3]
23:22 P0.11 00 GPIO Port 0.11
01 Reserved[1][2] or CTS
(UART1)[3]
10 Capture 1.1 (Timer 1)
11 SCL1 (I2C1)
25:24 P0.12 00 GPIO Port 0.12 0
01 Reserved[1][2] or DSR
(UART1)[3]
10 Match 1.0 (Timer 1)
11 Reserved[1][2]
or AD1.3[3]
27:26 P0.13 00 GPIO Port 0.13 0
01 Reserved[1][2] or DTR
(UART1)[3]
10 Match 1.1 (Timer 1)
11 Reserved[1][2]
orAD1.4[3]
29:28 P0.14 00 GPIO Port 0.14 0
01 Reserved[1][2] or DCD
(UART1)[3]
10 EINT1
11 SDA1 (I2C1)
31:30 P0.15 00 GPIO Port 0.15 0
01 Reserved[1][2] or RI
(UART1)[3]
10 EINT2
11 Reserved[1][2]
orAD1.5[3]
29:28 P0.14 00 GPIO Port 0.14 0
01 Reserved[1][2] or DCD
(UART1)[3]
10 EINT1
11 SDA1 (I2C1)
31:30 P0.15 00 GPIO Port 0.15 0
01 Reserved[1][2] or RI
(UART1)[3]
10 EINT2
11 Reserved[1][2]
orAD1.5[3]
PIN FUNCTION SELECT REGISTER 1
1:0 P0.16 00 GPIO Port 0.16 0
01 EINT0
10 Match 0.2 (Timer 0)
11 Capture 0.2 (Timer 0)
3:2 P0.17 00 GPIO Port 0.15 0
01 Capture 1.2 (Timer 1)
10 SCK1 (SSP)
11 Match 1.2 (Timer 1)
• 5:4 P0.18 00 GPIO Port 0.18 0
01 Capture 1.3 (Timer 1)
10 Match 0.2 (Timer 0)
11 MISO1 (SSP)
• 7:6 P0.19 00 GPIO Port 0.19
0
01 Match 1.2 (Timer 1)
10 MOSI1 (SSP)
11 Capture 1.2 (Timer 1)
9:8 P0.20 00 GPIO Port 0.20 0
01 Match 1.3 (Timer 1)
10 SSEL1 (SSP)
11 EINT3
11:10 P0.21 00 GPIO Port 0.21 0
01 PWM5
10 Reserved[1][2] or
AD1.6[3]
11 Capture 1.3 (Timer 1)
13:12 P0.22 00 GPIO Port 0.22 0
01 Reserved[1][2] or
AD1.7[3]
10 Capture 0.0 (Timer 0)
11 Match 0.0 (Timer 0)
15:14 P0.23 00 GPIO Port 0.23 0
01 VBUS
10 Reserved
11 Reserved
17:16 P0.24 00 Reserved
01 Reserved
10 Reserved
11 Reserved
19:18 P0.25 00 GPIO Port 0.25 0
01 AD0.4
10 Reserved[1] or
Aout(DAC)[2][3]
11 Reserved
• 21:20 P0.26 00 Reserved
01 Reserved
10 Reserved
11 Reserved
• 23:22 P0.27 00 Reserved
01 Reserved
10 Reserved
11 Reserved
• 25:24 P0.28 00 GPIO Port 0.28
01 AD0.1
10 Capture 0.2 (Timer 0)
11 Match 0.2 (Timer 0)
• 27:26 P0.29 00 GPIO Port 0.29
01 AD0.2
10 Capture 0.3 (Timer 0)
11 Match 0.3 (Timer 0)
• 29:28 P0.30 00 GPIO Port 0.30
01 AD0.3
10 EINT3
11 Capture 0.0 (Timer 0)
• 31:30 P0.31 00 GPO Port only
01 UP_LED
10 CONNECT
11 Reserved
Applications
• General purpose I/O
• Driving LEDs, or other indicators
• Controlling off-chip devices
• Sensing digital inputs
GPIO port Direction register
(IODIR)
• IODIR Register is used to configure the i/o pins,
either input and output pins
• IODIR is a 32-pin register.
• IODIRx=0x00000000-i/p config.
• IODIRx=0xffffffff-o/p config.
GPIO port Pin value register
(IOPIN)
• This register provides the value of port pins that are
configured to perform only digital functions.
• IOPIN register is used to read the current state of every
GPIO pin
GPIO port Set register (IOSET)
• This register is used to produce a HIGH level output at
the port pins configured as GPIO in an OUTPUT
mode.
• Writing 1 produces a HIGH level at the corresponding
port pins.
• Writing 0 has no effect.
GPIO port Clear register (IOCLR)
• This register is used to produce a LOW level output
at port pins configured as GPIO in an OUTPUT
mode.
• Writing 1 produces a LOW level at the
corresponding port pin and clears the corresponding
bit in the IOSET register.
• Writing 0 has no effect.
GPIO programming
#include<LPC214X.h>
void delay(unsigned int);
int main()
{
IODIR0=0X00000005;
Program to blink single led
while(1)
{
IOSET0=0X00000001;
delay(20);
IOCLR0=0X00000001;
delay(20);
}
}
void delay(unsigned int i)
{
int j,k;
for(j=0;j<i;j++)
for(k=0;k<1275;k++);
}
#include<LPC214X.h>
void delay(unsigned int);
int main()
{
IODIR0=0X000000ff;
while(1)
{
IOSET0=0X000000ff;
delay(20); Program to blink 8 led’s
IOCLR0=0X0000000ff;
delay(20);
}
}
void delay(unsigned int i)
{
int j,k;
for(j=0;j<i;j++)
for(k=0;k<1275;k++);
}
#include<LPC214X.h>
void delay(unsigned int);
int main()
{
IODIR0=0X000000ff;
while(1)
{
IOSET0=0X000000aa;
IOCLR0=0X00000055;
delay(20);
Program to blink
IOSET0=0X00000055;
IOCLR0=0X000000AA;
alternate led’s
delay(20);
}
}
void delay(unsigned int i)
{
int j,k;
for(j=0;j<i;j++)
for(k=0;k<1275;k++);
LPC2148
Modules :
Timers / ADC / DAC / UART
ADC in LPC2148
• In LPC 2148 have 2 - ADC’s (ADC0 & ADC1)
• ADC0 – 6 Channels Totally 14 Analog Channel
• ADC1 – 8 Channels 10 Bit Resulation
• Measurement Range 0v to VREF(3.3V)
• 10 Bit Conversion time >= 2.44uS
ADC PINOUT
IN ADC0 –
ADC0.0 & 0.5 Not Available
• ADC0.1
ADC 0
To
ADC0.7
And
• ADC1.0
ADC 1
To
ADC1.7
ADC – SFR’s
• ADC Control Register - ADCR
• ADC Data Register - ADDR
• ADCR - AD0CR & AD1CR
• ADDR – AD0DR & AD1DR
• Special Global Data Register: AD0GDR & AD1GDR
• It Will have All Channel Data’s it Self.
ADC Control Register – ADCR – 32 Bit
• SEL: Select Channel
• CLKDIV : Conversion Speed Control Register
• BURST : 1 For Continuely Conversion
• CLKS : System Clk for Resolution Set (000 to Max)
• PDN : To Turn ON ADC
• START : Start of Conversion (Ex:001)
SEL – 0 to 7 Bits
• Channel -7 Register:
• This set of 8 bits Corresponds to the 8 Different
Channels Available on ADC Converter
• Ex: Which Channel you wish to use by setting it’s’ 1’
Ch7 Ch6 Ch4 Ch3 Ch2 Ch1
0 0 1 0 0 1
CLKDIV – 8 to 15
• ADC Converters on the lpc 2148 are able to run at a
maximum speed of 4.5MHz
• The conversion speed is selectable by the user
• In order to avoid a “divide by 0” Error, thought the
ADC Control Register Will add one to Whatever Value
You Suppy
• Ex:
• PCLK = 60 MHz, Div = 60/4.5 = 14 (i.e) 14-1 = 13
0 0 0 0 1 1 0 1 =13
CLKS 19 18 17 10 Bit Resolution Selection
• 000 = 10 Bit Resolution (0..1023)
3.3V / 1024
= 3.22mV • 001 = 9 Bit Resolution (0..511)
Step Res • 010 = 8 Bit Resolution (0..255)
• 011 = 7 Bit Resolution (0..127)
• 100 = 6 Bit Resolution (0..63)
• 101 = 5 Bit Resolution (0..31)
• 110 = 4 Bit Resolution (0..15)
• 111 = 3 Bit Resolution (0..7)
PDN– 21
• 1 – Turn ON ADC
START – 24 to 26
• Bits[24:26] = 001 – For Start of Conversions
ADC1CR = 0x00210D80;
AD1GDR – ADC1 Global Data Register
Check End Of Convertion
• Bit 31 = Done Bit
• While (AD1GDR & 0x01<<31) ==0);
• If it Reach 32bit Value End theConvertion,.
Program
PINSEL = Needed Pin (AD1.7)
IODIR = Needed Pin (P0.22)
Void getADCdata(int ch)
{
Int mydata;
AD1CR = 0x00000000;
AD1CR | = (0x01 << Channel number); // Channel Select
AD1CR | = 13 << 8 ; // CLKDIV
AD1CR | = 0x01 << 16; // Burst ON
AD1CR | = 0x01 <<21; // PDN=1
AD1CR | = 0x01 << 24; // Start Convesion
While (AD1GDR & 0x01<<31) ==0);
mydata = AD1GDR;
mydata = (mydata >> 6) & 0x000003ff; // Get 10 Value : AD1GDR RESULT Bit to
LSB
Return mydata;
}
DAC in LPC2148
• Single Channel
• 10 Bit Digital to Analog Converter (1024-1 -> 3.3V)
• Resistor String Architecture
• Buffered Output
• Power – Down mode
• Selectable Speed Vs Power
Ex Whar is Analog Voltage of Digital input of 650 = 1023 / 3.3 *650 = X Value
DAC PINOUT
ADC0.4
Pin9
P0.25
DAC – SFRs
• DAC Control Register - DACR
Need to << 6 For Result
Program
Void AnalogWrite ( int DACdata) // Data 0 to 1023
{
PINSEL – P0.25
DACR = DACdata << 6;
}
Ex : Generate Sawtooth Wave Using lpc2148 at 50hz using 100 Samples:
T=1/f 1/50Hz = 20ms
100 Samples =
1 Sample = 20000uS / 100
= 200uS
So 1 Sawtooth Wave will be Divided of 200us
(Each Sample = 200uS * 100)
Program
Void analogwrite(int DACdata);
Void main ()
{
PINSEL – P0.25
While(1){
For(i=0;i<100;i++) //0 to 1023 we put 100 sample
{
analogwite(i);
Delayus(200); set by timer 200uSec
}}
}
Void AnalogWrite ( int DACdata) // Data 0 to 1023
{
DACR = DACdata << 6;
}
UART in LPC 2148
• Two Identical UARTs – UART0 & UART1 ( Both
Full Duplex)
• We are Using now is UART0:
• PLL :
~ PLL CCLK = 10 Mhz to 60 Mhz
Oscillatore : 12Mhz PCLK
We Can Use Upto VPB Divider
10Mhz to 25 Mz
Mul %P
5 *2 *01
VPBDIV = 0x01;
UART 0 - SFR’s
• P0 pin Select Register – PINSEL0
// Ex :SCON Reg
• UART0 Line Control Register – U0LCR
// Status Bit
• UART0 Line Status Register – U0LSR
// Baud Rate Select
• UART0 Divisor Latch MSB – U0DLM
// Bard Rate Select
• UART0 Divisor Latch LSB – U0DLL
// Tx -> Date
• UART0 Transmit Holding Register – U0THR
// Rx <- Date
• UART0 Receiver Buffer Register – U0RBR
Pin Select SFR’s
• PINSEL 0 : for GPIO Pins 0.0 to 0.15
• PINSEL1 : for GPIO Pins 0.16 to 0.131
• PINSEL 2 : for GPIO Pins 1.16 to 0.31
31 . . . . 0
00 : Defaulf GPOI
PINSEL0 = 0x00000005; 01 : 1st
10 : 2nd
UART 0 Pin’s 11 : 3rd
• P0.0 [ Pin 19 ] – TxD0
• P0.1 [ Pin 21] – RxD0
UART0 : Line Control Register –
U0LCR
U0LCR=0x00000083;
• Word Length Select : Transmission Bit
• 1 1 : for 8 Bit Data Transmission with 1 Start &
1Stop Bit
• Divisor Latch Access Bit (DLAB) = 1
• 16bit Divider is Avail to Access that Divisor We Can
Enable it for Set the Baud Rate
U0LSR
• Bit -0 = Receive Data
Ready(RDR)
• Bit-5 = Transmit
Holding Register
Empty(THRE)
Divisor Latch SFR
• UART0 Divisor Latch MSB – U0DLM
• UART0 Divisor Latch LSB – U0DLL
• Holds the Value Used to Divide the Clock Supplied
by the Prescaler in order to produce the baud rate
clock
• The Divisor Latch Acces Bit(DLAB) in U0LCR
must be 1 in Order to access to UART0 Divisor
Latches
Baud Rate Clock
PCLK BAUD*16
60Mz Divisor Ex : 9600*16
Divisor Latch MSB Divisor Latch LSB
U0DLM U0DLL
D = 60Mhz / 9600*16
= 60*10^6 / 9600* 16
= 391 Dec
= 0x187
U0DLL = 0x87;
U0DLM = 0x01;
TX -
Code RX - Code
#include<LPC214X.H> #include<LPC214X.H>
void sercon(void); void sercon(void);
int main() int main()
{ {
unsigned char X;
sercon(); sercon();
while(1) while(1)
{ {
U0THR='A'; while(!(U0LSR&0X01));
X=U0RBR;
while(!(U0LSR&0X40)); U0THR=X;
} while(!(U0LSR&0X40));
} }
}
void sercon(void)
{
PINSEL0=0X00000005;
U0LCR=0X83;
U0DLL=0X087;
U0DLM=0x01;
U0LCR=0X03;
}
I2C ( Inter-Integrated Circuit )
• It is typically used for attaching lower speed peripheral IC’s to
Processors & Microcontroller is Short-Distance, Intra-Board
Communication.
• Invented by Philips
• Synchronous Protocol
• The 2 Bi-directional open drain lines named SDA(Serial Data/Address)
& SCL (Serial Clock) with pull up resistor are used for data transfer
between devices.
• I2C works in two modes namely,
• Master Mode
Master is responsible for generating clock and initiating
communication
• Slave Mode
Slave receives the clock and responds when addressed by the
Master
LPC2148 I2C - Modes
• LPC2148 has two I2C interfaces. i.e. I2C0 & I2C1
• It has Programmable clock to support adjustable I2C
transfer rates
• LPC2148 I2C is byte oriented and has four operating
modes:
Master Transmitter mode
Master Receiver mode
Slave Transmitter mode
Slave Receiver mode
I2C Always need Pull-up
ARM LPC2148 I2C Pins
SCL0: - Serial Clock pin of I2C0.
SDA0: - Serial Data pin of I2C0.
SCL1: - Serial Clock pin of I2C1.
SDA1: - Serial Data pin of I2C1.
I2C Registers
• I2C0CONSET (I2C0 Configuration Set Register)
• I2C0CONCLR (I2C0 Configuration Clear Register)
• I2C0ADR (I2C0 Slave Address Register)
I2C Registers
• I2C0STAT (I2C0 Status Register)
• I2C0DAT (I2C0 Data Register)
• I2C0SCLL (I2C0 SCL Low Duty Cycle Register)
• I2C0SCLH (I2C0 SCL High Duty Cycle Register)
I2C0ADR (I2C0 Slave Address
Register)
