1

Microprocessor Based
CPU
System
External RAM, ROM, I/O
(No internal RAM, ROM, I/O ports in the
CPU)

2
 Microcontroll
er
▶ A smaller computer on a CHIP
▶ On-chip RAM, ROM, I/O Ports, Timer, Serial
Controller…
▶ Example: Motorola’s 6811, Intel’s 8051, Atmel 32

3
Microprocessor vs.
Microcontroller

Microprocessor Microcontroller
▶ CPU is stand-alone, RAM, ▶ CPU, RAM, ROM, I/O and
ROM, I/O, timer are timer are all on a single
separate chip

▶ Designer can decide on ▶ Fixed amount of on-chip

the amount of ROM, RAM ROM, RAM, I/O ports df
and I/O ports. dfdfdfdfdfdfdf
▶ Not
▶ Expansive Expansive
▶ Single-
▶ Versatility purpose
▶ Special
▶ General-purpose Purpose.

4
C based Embedded
Systems
▶ Special purpose computer system usually
completely inside the device it controls
▶ Has specific requirements and performs pre-
defined
tasks
▶ Cost reduction compared to general purpose
processor
▶ Different design criteria
▶ Performance
▶ Reliability
▶ Availability
▶ Safety

5
8051 CPU
Operation
1. Features
2. Pin Diagram
3. Block
Diagram

6
 8051
Microcontroller
▶ Intel introduced 8051, referred as MCS-
51, in 1981.

▶ The 8051 is an 8-bit processor

▶ The CPU can work on only 8 bits of data at a
time
▶ The 8051 became popular afte
widely allowing other to r
manufactures market any make an
flavor of the 8051. 7
d
Features of
8051
 8 bit Processor
 4KB Internal ROM
 128 Bytes Internal RAM
 Four 8 BIT I/O PORTS (32 I/O LINES)
 Two 16 Bit Timers/Counters
 On Chip Full Duplex UART for Serial Communication
 5 Vector Interrupts ( 2 External, 3 Internal - Timer0,Timer1,Serial)
 On Chip Clock Oscillator
 16 bit Address bus
 64k External Code Memory
 64k External Data Memory
 16-bit program counter to access external Code Memory and
 16 bit Data Pointer to access external Data Memory
 128 user defined flags
 32 General Purpose Registers each of 8 bits

8
 8051
▶
Family
The 8051 is a subset of the 8052
▶ The 8031 is a ROM-less 8051
▶ Add external ROM to it
▶ You lose two ports, and leave only 2 ports for I/O
operations

9
Pin
Diagram

10
Block Diagram of 8051

11
Pin Description of the
8051

▶ 8051 family members (e.g., 8751, 89C51,

89C52,
DS89C4x0)
▶ Have 40 pins dedicated for various functions
such as I/O,
RD, WR, address, data, and interrupts.

▶ Come in different packages, such as

▶ DIP(dual in-line package),
▶ QFP(quad flat package), and
▶ LLC(leadless chip carrier)

▶ Some companies provide a 20-pin version of the

8051 with a reduced number of I/O ports for less
demanding applications 12
 XTAL1 and
XTAL2
▶ The 8051 has an on-chip oscillator but requires an external crystal
to run it
▶ A quartz crystal oscillator is connected to inputs XTAL1 (pin19) and
XTAL2 (pin18)
▶ The quartz crystal oscillator also needs two capacitors of 30 pF
value
▶ The original 8051 operates at 12 MHZ

13
 XTAL1 and XTAL2
▶
…..
If you use a frequency source other than a crystal oscillator, such
as a TTL oscillator:
▶ It will be connected to XTAL1
▶ XTAL2 is left unconnected

14
 RS
▶
T
RESET pin is an input and is active high (normally low)
▶ Upon applying a high pulse to this pin, the
microcontroller will
reset and terminate all activities
▶ This is often referred to as a power-on reset
▶ Activating a power-on reset will cause all values in the
registers to be lost

15
EA’
▶ EA’, “external access’’, is an input pin and must be connected
to Vcc or GND

▶ The 8051 family members all come with on-chip ROM to store
programs and
also have an external code and data memory.

▶ Normally EA pin is connected to Vcc (Internal Access)

▶ EA pin must be connected to GND to indicate that the code or

data is
stored externally.

16
 PSEN’ and ALE
▶ PSEN, “program store enable’’, is an
output pin
▶ This pin is connected to the OE pin of the external
memory.

▶ For External Code Memory, PSEN’ = 0

▶ For External Data Memory, PSEN’ = 1

▶ ALE pin is used for demultiplexing the address and

data.

17
I/O Port
Pins ▶ The four 8-bit I/O ports
P0, P1, P2 and P3
each uses 8 pins.
▶ All the ports upon RESET
are configured as output,
ready to be used as
input ports by the
external device.

18
Port
0 ▶ Port 0 is also designated as AD0-AD7.

▶ When connecting an 8051 to an

external memory, port 0
provides both address and data.

▶ The 8051 multiplexes address and data through port 0

to save
pins.

▶ ALE indicates if P0 has address

or data.
▶ When ALE=0, it provides data D0-D7
▶ When ALE=1, it has address A0-
A7

19
Port 1 and Port
2 ▶ In 8051-
based
systems with no external
memory
connection:
▶ Both P1 and P2 are used as simple I/O.
▶ In 8051-based systems with external memory
connections:
▶ Port 2 must be used along
with P0 to provide the 16-bit
address for the external memory.
▶ P0 provides the lower 8 bits via A0 – A7.
▶ P2 is used for the upper 8 bits of the 16-bit
address,
designated as A8 – A15, and it cannot be used for I/O.

20
Port
3 ▶ Port 3 can be used as
input or output.

▶ Port 3 has the additional

function of providing
some extremely important
signals

21
Pin Description
PIN TYPE NAME AND FUNCTION
Summary
Vss I Ground: 0 V reference.
Vcc I Power Supply: This is the power supply voltage for normal,
idle, and power-down operation.
P0.0 - P0.7 I/O Port 0: Port 0 is an open-drain, bi-directional I/O port. Port
0 is also the multiplexed low-order address and data bus
during accesses to external program and data memory.
P1.0 - P1.7 I/O Port 1: Port I is an 8-bit bi-directional I/O port.

P2.0 - P2.7 I/O Port 2: Port 2 is an 8-bit bidirectional I/O. Port 2 emits the
high order address byte during fetches from external
program memory and during accesses to external data
memory that use 16 bit addresses.

P3.0 - P3.7 I/O Port 3: Port 3 is an 8 bit bidirectional I/O port. Port 3 also
serves special features as explained.
2
2
 Pin Description
PIN TYPE NAME AND FUNCTION
Summary
RST I Reset: A high on this pin for two machine cycles while the
oscillator is running, resets the device.
ALE O Address Latch Enable: Output pulse for latching the low byte
of the address during an access to external memory.
PSEN* O Program Store Enable: The read strobe to external program
memory. When executing code from the external program
memory, PSEN* is activated twice each machine cycle,
except that two PSEN* activations are skipped during
each access to external data memory.

EA*/VPP I External Access Enable/Programming Supply Voltage: EA*

must be externally held low to enable the device to fetch
code from external program memory locations. If EA* Is
held high, the device executes from internal program
memory. This pin also receives the programming supply
voltage Vpp during Flash programming. (applies for 89c5x
MCU's) 2
3
General Block Diagram of 8051

Interru 4K 128 Timer 0

pt RO B Timer 1
Contro
l
M RA
M

CP
U
Bus Serial
OS 4 I/O
Contr Port
C ol Ports
2
4
TX RX
P P P P D D
Detailed Block Diagram

25
8051
Memory 26
 8051 Memory Structure
Extern

Extern
60
K
al

64 64
K K

al
SF
R
EX IN 4
K 12
T T
8
EA = 0 EA = Interna
1 l 27

Data
Program
Internal RAM
Structure

Direct
Addressing
Only
SFR [ Special Function
Direct & Registers]
Indirect
Addressing
128 Byte Internal RAM

28
29
 Program Status
Word [PSW]

C AC F0 RS1 RS0 OV F1 P
Carry Parity
Auxiliary Carry User Flag 1

User Flag 0 Register Bank Select Overflow

30
8051 instructions that
affects flag

31
 128 Byte
▶ There are 128 bytes of RAM in the 8051.
▶RAM Assigned addresses 00 to 7FH
General Purpose
▶ The 128 bytesare divided into 3
Area
different groups as
follows:
1. A total of 32 bytes from locations 00 to 1F hex are BIT Addressable
set aside for register banks and the stack. Area
2. A total of 16 bytes from locations 20H to 2FH are 128 BYTE
set aside for bit-addressable read/write memory. INTERNAL RAM
Reg Bank 3
3. A total of 80 bytes from locations 30H to 7FH are
used for read and write storage, called scratch pad.
Reg Bank 2
Register Banks
Reg Bank 1

Reg Bank 0
32
8051 RAM with addresses

33
8051 Register Bank
Structure

Bank 3 R0 R1 R2 R3 R4 R5 R6 R7
Bank 2 R0 R1 R2 R3 R4 R5 R6 R7
Bank 1 R0 R1 R2 R3 R4 R5 R6 R7
Bank 0 R0 R1 R2 R3 R4 R5 R6 R7

34
8051 Register Banks with
address

35
Register Set of
8051

36
8051 Stack

▶ The stack is a section of RAM used by the CPU

to store
information temporarily.
▶ This information could be data or an address

▶ The register used to access the stack is called

the SP
(stack pointer) register
▶ The stack pointer in the 8051 is only 8 bit
wide, which
means that it can take value of 00 to FFH
▶ When the 8051 is powered up, the SP
register contains
value 07
37
▶ RAM location 08 is the first location begin used
for the stack by the 8051
8051 Stack

▶ The storing of a CPU register in the stack is

called a
PUSH
▶ SP is pointing to the last used location of the
stack
▶ As we push data onto the stack, the SP is
incremented by one
▶ This is different from many microprocessors

▶ Loadingthe contents of the

stack back into a CPU register is
called a POP
▶ With every pop, the top byte of the stack is copied
to the register specified by the instruction and the
38
stack pointer is decremented once
Bit Addressable &
Byte Addressable

39
Single bit Instructions

40
▶
Bit Addressable
Example: Find out to which by each of the following bits belongs.
Programming
Give the address of the RAM byte in hex
(a) SETB 42H, (b) CLR 67H, (c) CLR 0FH (d) SETB
28H, (e) CLR 12,
(f) SETB 05

41
8051 Software
Overview
1. Addressing Modes
2. Instruction Set
3. Interrupts
42
Addressing
Modes

43
Addressing Modes
⚫ Addressing modes specifies where the data
(operand) is. They specify the source or
destination of data (operand) in several
different ways, depending upon the
situation.

⚫ Addressing modes are used to know

where the operand located is.
Addressing Modes
⚫ There are 5 types of addressing
modes:

1. Register addressing.
2. Direct addressing.
3. Register indirect addressing.
4. Immediate addressing.
5. Index addressing.
Register Addressing Mode
⚫ In register addressing mode; the
source and/or destination is a
register.

⚫ In this case; data is placed in any of the 8

registers(R0- R7); in instructions it is
specified with letter Rn (where N indicates 0
to 7).
Register Addressing Mode
⚫ For example;

1. ADD A, Rn (This is general instruction).

2. ADD A, R5 (This instruction will add the

contents of register R5 with the
accumulator contents).
Direct Addressing Mode
⚫ In direct addressing mode; the address of
memory location containing data to be
read is specified in instruction.

⚫ In this case; address of the data is

given with the instruction itself.
Direct Addressing Mode
⚫ For example;

1. MOV A, 25H (This instruction will

read/move the data from internal RAM
address 25H and store it in the
accumulator.
Register Indirect Addressing Mode
⚫ In register indirect addressing mode; the
contents of the designated register are
used as a pointer to memory.

⚫ In this case; data is placed in memory, but

address of memory location is not given
directly with instruction.
Register Indirect Addressing Mode
⚫ For
example;

1. MOV A,@R0 This instruction moves the

data from the register whose address is in
the R0 register into the accumulator.
Immediate Addressing Mode
⚫ In immediate addressing mode, the data is
given with the instruction itself.

⚫ In this case; the data to be stored in

memory immediately follows the
opcode.
Immediate Addressing Mode
⚫ For
example;

1. MOV A, #25H (This instruction will move

the data 25H to accumulator.
Index Addressing Mode
⚫ Offset (from accumulator) is added to the
base index register( DPTR OR
Program Counter) to form the effective
address of the memory location.

⚫ In this case; this mode is made for reading

tables in the program memory.
Index Addressing Mode
⚫ For example;

1. MOVC A, @ A + DPTR ( This instruction

moves the data from the memory to
accumulator; whose address is computed
by adding the contents of accumulator and
DPTR)
Instruction Set of 8051
Microcontroller
805
1
Interrupts 8
4
8051
9
7
 TMOD
Register

GATE:
When set, timer/counter x is enabled, if INTx pin
is high
and TRx is set.
When cleared, timer/counter x is enabled, if TRx
bit set.

C/T*:
clock)
When set, counter operation (input from Tx input
9
8

.pin).
TMOD
Register

The TMOD byte is not bit

addressable.

99
TCON
Register

100
8051
Seria 10
1
 Basics of Serial
Communication
▶ Computers transfer data in two ways:
▶ Parallel: Often 8 or more lines (wire conductors) are used to
transfer data to a
device that is only a few feet away.

▶ Serial: To transfer to a device located many meters away, the serial

method is used.
The data is sent one bit at a time.

102
 Basics of Serial
Communication
▶ Serial data communication uses two methods
▶ Synchronous method transfers a block of
data at a time

▶ Asynchronous method transfers a single

byte at a time

▶ There are special IC’s made by many manufacturers for serial

communications.
▶ UART (universal asynchronous Receiver transmitter)

▶ USART (universal synchronous-asynchronous Receiver-transmitter)

103
Asynchronous – Start &
Stop Bit
▶ Asynchronous serial data communication is widely
used
for character-oriented transmissions
▶ Each character is placed in between start and
stop bits,
this is called framing.
▶ Block-oriented data transfers use the
synchronous
method.

▶ The start bit is always one bit, but the stop

bit can be
one or two bits

104
▶ The start bit is always a 0 (low) and the stop
bit(s) is 1
Asynchronous – Start &
Stop Bit

105
 Data Transfer
▶ The rate of data transfer in serial data communication is stated in bps
Rate
(bits per second).

▶ Another widely used terminology for bps is baud rate.

▶ It is modem terminology and is defined as the number of signal
changes per second
▶ In modems, there are occasions when a single change of signal
transfers several bits
of data

▶ As far as the conductor wire is concerned, the baud rate and bps
are the
same.

106
 8051 Serial
▶
Port
Synchronous and Asynchronous
▶ SCON Register is used to Control
▶ Data Transfer through TXd & RXd
pins
▶ Some time - Clock through TXd
Pin
▶ Four Modes of Operation:

Mode 0 :Synchronous Serial

Communication Mode 1 :8-Bit UART with
Timer Data Rate Mode 2 :9-Bit UART with Set
Data Rate Mode 3 :9-Bit UART with Timer
Data Rate 107
Registers related to
Serial Communication

1. SBUF
Register
2. SCON
Register

3. PCON
Register 108
SBUF Register

▶ SBUF is an 8-bit register used solely for

serial communication.
▶ For a byte data to be transferred via the TxD
line, it must be placed in the SBUF register.
▶ The moment a byte is written into SBUF, it is
framed with the start and stop bits and
transferred serially via the TxD line.
▶ SBUF holds the byte of data when it is received
by 8051
RxD line.
▶ When the bits are received serially via RxD, the
8051 deframes it by eliminating the stop
and start bits, making a byte out of the data
received, and then placing it in SBUF. 109
 SBUF
Register
▶ Sample
Program:

110
SCON
Register
SM SM SM2 REN TB8 RB8 TI RI
0 1

Set when a Cha-

ractor received
Set to
Enable
Serial Data Set when Stop bit Txed
reception

Enable Multiprocessor 9th Data Bit 9th Data Bit

Communication Mode Sent in Mode 2,3 Received in Mode 2,3

111
 8051 Serial Port – Mode 0
The Serial Port in Mode-0 has the following features:

1. Serial data enters and exits through

RXD

2. TXD outputs the clock

3. 8 bits are transmitted / received

4. The baud rate is fixed at (1/12) of the

oscillator
frequency

112
 8051 Serial Port –
Mode 1
The Serial Port in Mode-1 has the following
1. Serial data enters through RXD
features:
2. Serial data exits through TXD
3. On receive, the stop bit goes into RB8 in SCON
4. 10 bits are transmitted / received
1. Start bit (0)
2. Data bits (8)
3. Stop Bit (1)
5. Baud rate is determined by the Timer 1 over flow
rate.
113
8051 Serial Port – Mode 2
The Serial Port in Mode-2 has the following features:

1. Serial data enters through RXD

2. Serial data exits through TXD
3. 9th data bit (TB8) can be assign value 0 or 1
4. On receive, the 9th data bit goes into RB8 in
SCON
5. 11 bits are transmitted / received
1.Startbit (0)
2.Data bits (9)

3.Stop Bit (1)

6. Baud rate is programmable

114
8051 Serial Port – Mode 3
The Serial Port in Mode-3 has the following features:

1. Serial data enters through RXD

2. Serial data exits through TXD
3. 9th data bit (TB8) can be assign value 0 or 1
4. On receive, the 9th data bit goes into RB8 in
SCON
5. 11 bits are transmitted / received
1.Startbit (0)
2.Data bits (9)

3.Stop Bit (1)

6. Baud rate is determined by Timer 1 overflow

rate. 115