3rd Review Presentation of Project
Implementation of Voltage Level-Up Shifters
for SOC applications
by
Honors Batch-HN8
A. Kamal Phaneendra (20761A0468)
A. V. N. Durga Prasad (20761A0466)
K. Aravind (20761A04F7)
Under the Guidance of
Dr. M. Venkata Sudhakar
Professor
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING (A)
ABSTRA
CT
A level shifter is a circuit that transforms a signal from one voltage level to another. It is also known as a
logic level shifter, voltage level translator, or simply translator. In addition to implementing bidirectional
communication between devices with various voltage levels, level shifters can also be used to interface
between digital circuits with various voltage requirements, bridge voltage domains in integrated circuits
(ICs), and more. Level shifters are used in a variety of electronic systems and circuits when it is necessary to
interface data or signals between parts that operate at varying voltage levels.
A Level Shifter is proposed using Multi-threshold Complementary Metal Oxide Semiconductor (MTCMOS)
technology. Techniques like multi-threshold, multi-VDD, Stacking, Pull Down network usage are proposed
for giving better outcomes to change Speed (delay constraints), Energy Consumptions (power constraints)
and Area constraints. The proposed work is been done on Cadence Virtuoso Tool using 45nm technology.
CONTENTS
⮚ Introduction
⮚ Literature Survey
⮚ Proposed Circuit
⮚ Schematic
⮚ Symbol
⮚ Input – Output Waveforms
⮚ Analysis
⮚ Vddh vs Delay
⮚ Vddl vs Delay
⮚ Vddh vs Power
⮚ Vddl vs Power
⮚ Temp. vs Power
⮚ Temp. vs Delay
References
INTRODUCTIO
N
Voltage level shifters, also known as voltage translators or logic level shifters, are the
essential link between circuits and devices that operate at different voltage levels. They are
essential for transferring data or signals between digital components that have different
voltage needs and for bridging the gap between them. Moreover, these adaptable circuit
components also affect integrated circuits (ICs), guaranteeing the peaceful coexistence of
several voltage domains inside the same system-on-chip (SoC).
Common scenarios where voltage level
shifters are used include interfacing between
microcontrollers or digital ICs that have
different voltage supply levels, connecting a
3.3V device to a 5V device, or translating
between logic levels (e.g., from TTL to CMOS
or vice versa).
LITERATURE
SURVEY
Ref. Title Design Approach Results Drawbacks
Level shifter
capable of
An efficient converting low ⮚ Leakage current-
levels of input 70pw
Area is
high speed voltages to high ⮚ Area-
increased.
[1] and low output voltages 99.875um^2
Leakage current
power while maintaining ⮚ Delay-10ns
is high.
voltage-level high speed and low ⮚ Energy/Trasition-
shifter, 2021 delay and superior 26fJ
static power
dissipation
Ultra-low
An ultra-low
leakage power and
leakage and ⮚ Leakage current-
an extremely
small-area 21.62pw
compact area using
level shifter ⮚ Area-5.614um^2 Delay is
[2] a super-cut-off pull-
based on ⮚ Delay-24.06ns increased.
down network and
super-cut-off ⮚ Energy/Trasition-
Ref. Title Design Approach Results Drawbacks
An Energy
Efficient Energy-efficient
⮚ Leakage current-
Voltage level voltage level shifter
130pw
shifter based using CMOS process
⮚ Area-66um^2
[3] on controlling based on controlling Area is increased.
⮚ Delay-7.7ns
pull-up pull-up network
⮚ Energy/Trasition-
network strength.
30fJ
Strength,
2022.
A fast and High - speed and
low- power ultra- low power ⮚ Leakage current-
level shifter level shifter Using 62.4pw
Energy/Transition
for multi- multi- ⮚ Area-16.35um^2
[4] is high.
supply threshold(MTCMOS) ⮚ Delay-18.07ns
Area is increased.
voltage and sub ⮚ Energy/Transition-
designs, threshold device 87.35fJ
2020. sizing technique.
Ref. Title Design Approach Results Drawbacks
Ultra-Low- Leakage current-
Power and Fast
Voltage Level
Ultra low power and 47.7pw
fast voltage level Delay-2.4ns Energy/Transition is
[5] Shifter Using Energy/Transition-
shifter using Muller C- high.
Muller C-Cell
Cell model 127fJ
for VLSI
Systems, 2022
A Power-delay
and Area
efficient
Voltage Level
Shifter Based Area-efficient and
on a high speed voltage ⮚ Area-35.25 um^2
[6] -
Reflected- level shifter ⮚ Delay-6.1ns
Output usingWCMLS ⮚ Power-76.36 nW
Wilson
Current
Mirror Level
DESIGN FLOW
Previous Work
Proposed
Circuit
Schematic of Proposed Circuit
in Cadence
Symbol of Proposed Circuit in
Cadence
Input-Output Waveforms
Analysis
⮚ Vddh vs Delay
⮚ Vddl vs Delay
⮚ Vddh vs Power
⮚ Vddl vs Power
⮚ Temp. vs Power
⮚ Temp. vs Delay
⮚ PVT Analysis
⮚ Load Tests
Applications
Mixed-Signal ICs (SOCs)
Communication Interfaces
Memory Interfaces
I/O Ports and Peripherals
Power Management ICs
Display Interfaces
High-Speed Serial Links
Automotive Electronics
Battery-Powered Devices
IoT Devices
References
[1] Neda Rezaei, Mitra Mirhassani, An efficient high speed and low power voltage-level shifter, AEU -
International Journal of Electronics and Communications, Volume 138, 2021, 153857, ISSN 1434-8411,
https://doi.org/10.1016/j.aeue.2021.153857.
[2] Wang, Peng & Wang, Xiaoqin & You, Heng & Yin, Jialu & Zhan, Yi & Qiao, Shushan & Zhou, Yumei.
(2022). An Ultra- Low Leakage and Small-Area Level Shifter Based on Super-Cut-Off Mechanism. AEU -
International Journal of Electronics and Communications. 146. 154085. 10.1016/j.aeue.2021.154085.
[3] Ghasemzadeh, Zahra & Saberi, Mehdi. (2022). An Energy-Efficient Voltage-Level Shifter Based on
Controlling Pull- Up Network Strength. Circuits, Systems, and Signal Processing. 41. 1-11.
10.1007/s00034-021-01918-z.
[4] Lanuzza, Marco & Corsonello, Pasquale & Perri, Stefania. (2012). Low-Power Level Shifter for Multi-
Supply Voltage Designs. Circuits and Systems II: Express Briefs, IEEE Transactions on. 59. 922-926.
10.1109/TCSII.2012.2231037.
[5] Rajendran, Selvakumar & Chakrapani, Arvind. (2022). Ultra-Low-Power and Fast Voltage Level
Shifter Using Muller C-Cell for VLSI Systems. Circuits, Systems, and Signal Processing. 41.
10.1007/s00034-022-02098-0.
[6] Kabirpour, Saeideh & Jalali, Mohsen. (2019). A Power-Delay and Area Efficient Voltage Level Shifter
Based on a Reflected-Output Wilson Current Mirror Level Shifter. IEEE Transactions on Circuits and
Systems II: Express Briefs. PP. 1-1. 10.1109/TCSII.2019.2914036.
THANK YOU
