Chapter 4

Data Movement Instructions

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CHAPTER OBJECTIVES
• Upon completion of this chapter, you will be able to:
1. Explain the operation of each data movement instruction with applicable addressing modes.
2. Explain the purposes of the assembly language pseudo-operations and key words such as
ALIGN, ASSUME, DB, DD, DW, END, ENDS, ENDP, EQU, .MODEL, OFFSET, ORG,
PROC, PTR, SEGMENT, USEI6, USE32, and USES.
3. Select the appropriate assembly language instruction to accomplish a specific data
movement task.
4. Determine the symbolic opcode, source, destination, and addressing mode for a
hexadecimal machine language instruction.
5. Use the assembler to set up a data segment, stack segment, and code segment.
6. Show how to set up a procedure using PROC and ENDP.
7. Explain the difference between memory models and full-segment definitions for the
MASM assembler.
8. Use the Visual online assembler to perform data movement tasks

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 Instruction Encoding
• Assembler translates assembly code into machine language
• Machine language[ML] is the native binary code μP understands
• Instructions for the 8086 through the 80286 are 16-bit mode
instructions that take the form found in Figure
• Machine language instructions for the 16-bit mode instructions
vary in length from 1 to as many as 6 bytes.

• The detailed fields of the of the above instruction:

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 Machine language fields
• The ML instruction format has one or more number of fields. These fields are:
1. First byte of instruction: opcode
• The opcode selects the operation (addition, subtraction, move, and so on) that is
performed by the microprocessor.
• The opcode is either 1 or 2 bytes long for most machine language instructions.
• The Figure below illustrates the general form of the first opcode byte of many, but
not all, machine language instructions.
• the first 6 bits of the first byte are the binary opcode.
• The remaining 2 bits indicate the direction (D), and the data width bit (W)
• If the direction bit (D)=1, data flow to the register REG field from the R/M field
located in the second byte of an instruction.
• If (D)=0 in the opcode, data flow to the R/M field
from the REG field.
• If the bit (W)=1 the , the data size is a word;
• if (W)= 0 , the data size is always a byte.
• The W-bit appears in most instructions, while the D-bit appears mainly with
the MOV and some other instructions.

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• Second byte of instruction: MOD-REG-R/M

• MOD specifies addressing mode for instruction and

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Table 2.2 combines the above two tables

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Data Copy/ Transfer Instructions:

• The following instructions come under data copy / transfer instructions:

• MOV: MOVE.
• This data transfer instruction transfers data from one register / memory location to another
register / memory location.
• The source may be any one of the segment register or other general purpose or special purpose
registers or a memory location and another register or memory location may act as destination.
• Both Source and destination cannot be memory locations(except for string
instructions).Example: MOV [SI], [BX]  is not valid
• If source and destination are registers, then they have to be the same size.
• CS, and IP register cannot be destinations
• An immediate number cant be moved directly to segment register. It should first be moved to
any general purpose register than moved to the segment register. Example:
• Mov DS, 5000h; not permitted. To solve this one can write the following:
Mov ax,5000h
Mov DS, ax
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• Other MOV instructions examples are given below with the
corresponding addressing modes:
1)MOV AX, 5000H; Immediate
2) MOV AX, BX; Register
3) MOV AX, [SI]; Indirect
4) MOV AX, [2000H]; Direct
5) MOV AX, 50H[BX]; Based relative, 50H displacement

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XCHG Instruction : Exchange
• this instruction exchanges the contents of the specified source and
destination operands, which may be registers or one of them may be
a memory location.
• However, exchange of data contents of two memory locations is not
permitted.
• Syntax: XCHG reg/mem, reg/mem
• Examples:
1. XCHG AL, CL
2. XCHG DX, [BX]
3. XCHG [DI], [BX]  not allowd
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 LEA Instruction
• LEA=Load Effective Address
• loads a 16-bit register with the offset address of the data
• Examples:
1. LEA BX, [DI]  load the offset address specified by [DI]
= MOV BX, DI
2. LEA BX, LIST  load the offset of list into register BX. This instruction is
equivalent to the instruction:
MOV BX, OFFSET LIST
3. LEA SI, ADR[BX]  the offset of label ADR will be added to Bx and the result
will be stored into register SI
Note: MOV BX, [DI] load the data stored at [DI]
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LDS/LES Instructions
• These instructions load the DS /Es register and the specified
destination register in instruction with the content of memory
location specified as source in the instruction.
• Example: LDS BX, 5000h

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To call this procedure use
the CALL instruction as
follow:
CALL ADDS

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Model memory organization

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 Full-Segment Definitions
• When Full-segment definitions are The program appears longer the model method,
but it is more structured
• The first segment defined is the STACK_SEG, which is clearly delineated with the
SEGMENT and ENDS directives. Within these directives, a DW 100 DUP (?) sets aside
100H words for
the stack segment. Because the word STACK appears next to SEGMENT, the assembler
and linker
automatically load both the stack segment register (SS) and stack pointer (SP).

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