Computer Organization

& Architecture
Chapter 6
The Control Unit
Outline
• Introduction
• Control unit micro operations
• Control unit hardwired implementation
• Micro programmed control
• Micro instruction format
• Applications of microprogramming
Introduction
• Generally, a digital system is separated into two parts : Data processing unit
and control unit.
• The data processing unit is a collection of functional units capable of
performing certain operations on data, where as control unit issues control
signals to the data processing part to perform operations on data.
• These control signals select the functions to be performed at specific times
and route the data through the appropriate functional units.
• In other words, the control unit decides the sequence in which certain sets of
micro-operations to be performed to carry out particular operation on data.
• Hence, we can say that, the data processing unit is logically reconfigured by
the control unit and it is intimately involved in the sequencing and timing of
the data processing unit.
Design of Control Unit
• Control unit generates timing and control signals for the operations of the
computer.
• The control unit communicates with ALU and main memory.
• It also controls the transmission between processor, memory and the
various peripherals.
• It also instructs the ALU which operation has to be performed on data.

• The Control Unit is classified into two major categories:

Hardwired Control
Microprogrammed Control
 Hardwired Control Unit
• The Hardwired Control organization involves the control logic to be
implemented with gates, flip-flops, decoders, and other digital
circuits.
• The following image shows the block diagram of a Hardwired Control
organization.
The control hardware can be viewed as a state machine that changes
from one state to another in every clock cycle, depending on the
contents of the instruction register, the condition codes, and the
external inputs.
• The outputs of the state machine are the control signals. The
sequence of the operation carried out by this machine is determined by
the wiring of the logic elements and hence named “hardwired”.
• Fixed logic circuits that correspond directly to the Boolean expressions
are used to generate the control signals.
• Hardwired control is faster than micro-programmed control.
• A controller that uses this approach can operate at high speed.
• RISC architecture is based on the hardwired control unit
Hardwired configuration
The block diagram of the computer is shown in Figure 4.4. It consists of
1.Two memory units:
 Main memory -for storing instructions and data, and
 Control memory -for storing the microprogram.
2.Six Registers:
• Processor unit register:
 AC(accumulator),
 PC(Program Counter),
 AR(Address Register),
 DR(Data Register)
 Control unit register: CAR (Control Address Register),
 SBR(Subroutine Register)
3.Multiplexers:
• The transfer of information among the registers in the processor is done
through multiplexers rather than a common bus.
4.ALU: The arithmetic, logic, and shift unit performs micro operations with data
from AC and DR and places the result in AC. UNIT -III Unit 4 –Microprogrammed
Control DR can receive information from AC, PC, or memory.
5. AR can receive information from PC or DR.
PC can receive information only from AR.
6. Input data written to memory come from DR, and data read from memory can
go only to DR.
 Hardwired Control Unit

• A Hard wired Control consists of two decoders, a sequence

counter, and a number of logic gates
• An instruction fetched from the memory unit is placed in the
instruction register (IR)
• The component of an instruction register includes I bit, the
operation code, and bits 0 through 11
• The operation code in bits 12 through 14 are coded with a 3 x
8 decoder
• The outputs of the decoder are designated by the symbols D 0
through D 7
• The operation code at bit 15 is transferred to a flip flop
designated by the symbol I
• The operation codes from Bits 0 through 11 are applied to the
control logic gates
• The Sequence counter (SC) can count in binary from 0 through
15
Control Unit Micro-Operation
• In computer central processing units, micro-operations (also known as micro-ops) are
the functional or atomic, operations of a processor.
• These are low level instructions used in some designs to implement complex machine
instructions, also known as macro instruction.
• They generally perform operations on data stored in one or more registers.
• They transfer data between registers or between external buses of the CPU, also
performs arithmetic and logical operations on registers.
• In executing a program, operation of a computer consists of a sequence of instruction
cycles, with one machine instruction per cycle.
• Each instruction cycle is made up of a number of smaller units – Fetch, Indirect,
Execute and Interrupt cycles.
• Each of these cycles involves series of steps, each of which involves the processor
registers.
• These steps are referred as micro-operations. the prefix micro refers to the fact that
each of the step is very simple and accomplishes very little.
Micro-programmed Control
• The Micro-programmed Control organization is implemented by using
the programming approach
• In Micro-programmed Control, the micro-operations are performed
by executing a program consisting of micro-instructions.
• The following figure shows the block diagram of a Micro-programmed
Control organization.
 Micro-programmed Control
• The control memory address register specifies the address of the
microinstruction, and the control data register holds the microinstruction
read from memory.
• The microinstruction contains a control word that specifies one or more
micro-operations for the data processor.
• Once these operations are executed, the control must determine the next
address.
• The location of the next microinstruction may be the one next in
sequence, or it may be located somewhere else in the control memory.
• While the micro-operations are being executed, the next address is
computed in the next address generator circuit and then transferred into
the control address register to read the next microinstruction.
• Thus a microinstruction contains bits for initiating micro-operations in the
data processor part and bits that determine the address sequence for the
control memory.
• The next address generator is sometimes called a micro-program
sequencer, as it determines the address sequence that is read from
control memory
Micro-programmed Control
• Typical functions of a micro-program sequencer are
 incrementing the control address register by one,
 loading into the control address register an address from control memory,
 transferring an external address, or loading an initial address to start the control operations.
• The control data register holds the present microinstruction while the next address is computed and
read from memory.
• The data register is sometimes called a pipeline register.
• It allows the execution of the micro-operations specified by the control word simultaneously with
the generation of the next microinstruction.
• This configuration requires a two-phase clock, with one clock applied to the address register and the
other to the data register.
• The main advantage of the micro programmed control is the fact that once the hardware
configuration is established; there should be no need for further hardware or wiring changes.
• If we want to establish a different control sequence for the system, all we need to do is specify a
different set of microinstructions for control memory
 Micro-programmed Control
• The Control memory address register specifies the address of the micro-instruction.
• The Control memory is assumed to be a ROM, within which all control information
is permanently stored.
• The control register holds the microinstruction fetched from the memory.
• The micro-instruction contains a control word that specifies one or more micro-
operations for the data processor.
• While the micro-operations are being executed, the next address is computed in
the next address generator circuit and then transferred into the control address
register to read the next microinstruction.
• The next address generator is often referred to as a micro-program sequencer, as it
determines the address sequence that is read from control memory.
 Micro instruction format and applications of
microprogramming
• The microinstruction format for the control memory is
shown in figure 4.5. The 20 bits of the microinstruction
are divided into four functional parts as follows:
1. The three fields F1, F2, and F3 specify micro-operations
for the computer. The micro-operations are subdivided into
three fields of three bits each. The three bits in each field
are encoded to specify seven distinct micro operations. This
gives a total of 21 micro-operations.
2. The CD field selects status bit conditions.
3. The BR field specifies the type of branch to be used.
4. The AD field contains a branch address.
The address field is seven bits wide, since the control
memory has 128 = 27 words
 Selection of address for control
memory
• The address sequencing capabilities
required in a control memory are:
1. Incrementing of the control address
register.
2. Unconditional branch or conditional
branch, depending on status bit
conditions.
3. A mapping process from the bits of the
instruction to an address for control
memory.
4. A facility for subroutine call and return.
Selection of address for control
memory
• Above figure 4.2 shows a block diagram of a control memory
and the associated hardware needed for selecting the next
microinstruction address.
• The microinstruction in control memory contains a set of bits to
initiate microoperations in computer registers and other bits to
specify the method by which the next address is obtained.
• The diagram shows four different paths from which the control
address register (CAR) receives the address.
 The incrementer increments the content of the control address
register by one, to select the next microinstruction in sequence.
 Branching is achieved by specifying the branch address in one of
the fields of the microinstruction.
 Conditional branching is obtained by using part of the
microinstruction to select a specific status bit in order to
determine its condition.
 An external address is transferred into control memory via a
mapping logic circuit.
Selection of address for control
memory
• The return address for a subroutine is stored in a special register whose value is then
used when the micro-program wishes to return from the subroutine.
• The branch logic of figure 4.2 provides decision-making capabilities in the control
unit.
• The status conditions are special bits in the system that provide parameter
information such as the carry-out of an adder, the sign bit of a number, the mode
bits of an instruction, and input or output status conditions.
• The status bits, together with the field in the microinstruction that specifies a branch
address, control the conditional branch decisions generated in the branch logic.
• A 1 output in the multiplexer generates a control signal to transfer the branch
address from the microinstruction into the control address register.
• A 0 output in the multiplexer causes the address register to be incremented
Control Unit Micro-Operation
Cont..
• Figure below depicts the concept being discussed here.
Control Unit Micro-Operation
Cont..
• Summary: Execution of a program consists of sequential execution of
instructions. Each instruction is executed during an instruction cycle
made up of shorter sub-cycles(example – fetch, indirect, execute,
interrupt). The performance of each sub-cycle involves one or more
shorter operations, that is, micro-operations.
What are the different types of
micro-operations?
• The micro-operations in computers are classified into the following
categories:
• Register transfer micro-operations: These type of micro operations are used
to transfer from one register to another binary information.
• Arithmetic micro-operations : These micro-operations are used to perform on
numeric data stored in the registers some arithmetic operations.
• Logic micro-operations: These micro operations are used to perform bit style
operations / manipulations on non numeric data.
• Shift micro operations: As their name suggests they are used to perform shift
operations in data store in registers.
Micro-Operation Cont..
• Computer hardware = registers + ALU + datapath(bus) + control unit.
• The computer goes through instruction cycles:
i) Fetch an instruction from memory;
ii) Decode the instruction to a sequence of control signals;
iii) Execute the decoded sequence of micro operations.
• Control unit : Instruction →a time sequence of control signals to
trigger micro operations.
• Input-output is implemented using an interrupt cycle.
Block Diagram of A Typical Computer
Machine Instructions
• Every computer system has a central processing unit.
• The operation of the central processing unit and the computer system is determined by
the instructions executed by central processing unit.
• These instructions are known as machine instructions or computer instructions.
• Machine instructions are in the form of binary codes.
• A particular sequence of these binary codes used to perform particular task is known
as machine language program.
• To write a program in machine language, programmer has to memorize all the machine
instructions code for that processor.
• This task is difficult and error prone.
• So to make programming easier, usually programmers write programs in assembly
language.
• They then translate the assembly language program to machine language so that it can
be loaded into memory and executed.
Machine Instructions Cont..
• Another way of writing a program for a microcomputer is with a high-
level language, such as Basic, Pascal, C, or C++.
• The program statements used in such languages are even more
English-like than those of assembly language.
• Each program statement in high-level language represents one or
more than one machine code instructions.
• The program statements in the high-level language are converted into
machines codes with the help of interpreter or compiler,
Elements of Machine Instruction
• Each instruction of the CPU contain specific information fields, which
are required to execute it.
• These information fields of instructions are called elements of
instruction.
• These are .
• Operation code:
• The operation code field in the instruction specifies the operation to be performed.
• The operation is specified by binary code, hence the name operation code or simply
opcode for 8085 processor operation code for Add B instruction is 80H.
Elements of Machine Instruction
Cont.
• Source / Destination operand :
• The source/destination operand field directly specifies the source/destination
operand for the instruction.
• In 8085, the instruction MOV A, B has B register as a source operand and A
register as a destination operand, because this instruction copies the contents
of register B to register A.
• Source operand address:
• We know that the operation specified by the instruction may require one or
more operands.
• The source operand may be in the CPU register or in the memory.
• Many times the instruction specifies the address of the Source operand so that
operand(s) can be accessed and operated by the CPU according to the
instruction.
• In 8085, the source operand address for instruction Add M is given by HL
register pair.
Elements of Machine Instruction
Cont.
• Destination operand address :
• The operation executed by the CPU may produce result.
• Most of the times the result is stored in one of the operand.
• Such operand is known as destination operand.
• The instruction which produce result specifies the destination operand
address.
• In 8085, the destination operand address for instruction INR M is given by HL
register pair.
• Because INR M instruction increments the contents of memory location
specified by HL register pair and stores the result in the same memory
location.
Elements of Machine Instruction
Cont.
• Next instruction address:
• The next instruction address tells the CPU from where to fetch the next
instruction after completion of execution of current instruction.
• For JUMP and BRANCH instructions the address of the next instruction is
specified within the instruction.
• However, for other instructions, the next instruction to be fetched
immediately follows the current instruction.
• For example, in 8085, instruction after INR B follows its.
• The instruction JMP 2000H specifies the next instruction address as 2000H.
Types of Operands
• We have seen that each instruction in a program specifies operation
to be performed and data to be processed.
• For this reason, an instruction is divided into two parts :
• its operation code (opcode) and its operands.
• The operand is an another name for data.
• It may appear in different forms
• Addresses
• Numbers
• Characters
• Logical Data
Types of Operands Cont..
• Addresses : The addresses are in fact a form of data. In many
situations, some calculation must be performed on the operand
reference in an instruction to determine physical address.
• Numbers : All computer supports numeric data types. The common
numeric data types are :
• Integer or Fixed Point
• Point
• Decimal
Types of Operands Cont..
• Characters :
• For documentation a common form of data is text or character strings.
• Today, most of the computers use ASCII (American Standard Code for Information Interchange) code
for character represented by a unique 7-bit pattern , thus, 123 different characters can be
represented.
• However, the ASCII encoded characters are always stored and transmitted using 8-bits per character.
• The eighth bit may be set to 0 or 1 used as a parity bit for error detection.
• Logical Data:
• Most of the processors interpret data as a bit, byte, word, or double word.
• These are referred to as units of data.
• When data is viewed as n 1-bit items of data, each item having the value 0 or 1, it is considered as a
logical data.
• The logical data is used to store an array of Boolean or binary data items and with logical data we
can manipulate the bits of data items.
Machine Instruction Types
• The processor instructions can be classified according to their
operations and according to the number of address references
required by them.
• According to Address Reference
• According to address reference there are three address, two address, one
address and zero address reference instructions. Let us see examples of each
of them
• Three Address Instructions
• The three address instruction can be represented symbolically as
ADD A, B, C
Machine Instruction Types Cont.
• where A, B, C are the variables.
• These variable names are assigned to distinct locations in the memory.
• In this instruction operands A and B are called source operands and
operand C is called destination operand and ADD is the operation to
be performed on the operands.
• Thus the general instruction format for three address instruction is
Operation Source 1, Source 2, Destination
• The number of bits required to represent such instruction include
• Bits required to specify the three memory addresses of the three operands. If
n-bits are required to specify one memory address, 3n bits are required to
specify three memory addresses.
• Bits required to specify the operation.
Machine Instruction Types Cont.
• Two Address Instructions
• The two address instruction can be represented symbolically as
ADD A, B
• This instruction adds the contents of variables A and B and stores the sum in
variable B destroying its previous contents.
• Here, operand A is source operand however operand B serves as both source
and destination operand.
• The general instruction format for two address instruction is
Operation Source, Destination
• To represent this instruction less number of bits are required as compared to
three address instruction.
• The number of bits required to represent two address instruction include :
• Bits required to specify the two memory addresses of the two operands, i.e. 2n bits.
• Bits required to specify the operation.
Machine Instruction Types Cont.
• One Address Instruction
• The one address instruction can be represented symbolically as
• ADD B
• This instruction adds the contents of variable A into the processor register called
accumulator and stores the sum back into the accumulator destroying the previous
contents of the accumulator.
• In this instruction the second operand is assumed implicitly in a unique location
accumulator.
• The general instruction format for one address instruction is
Operation Source
• Few more examples of one address instructions are .
• LOAD A : This instruction copies the contents of memory location A into the accumulator.
• STORE B : This instruction copies the contents of accumulator into memory location
Machine Instruction Types Cont.
• In one address instruction, it is important to note that the operand
specified in the instruction can be either source operand or
destination operand depending on the instruction.
• For example, in LOAD A instruction, the operand specified in the
instruction is a source operand whereas the operand specified in the
STORE B instruction is a destination operand.
• Similarly, in one address instruction the implied operand
(accumulator) can be either source or destination depending on the
instruction.
Machine Instruction Types Cont.
• Zero Address Instructions
• In these instructions, the locations of all operands are defined implicitly.
• Such instructions are found in machines that store operands in a structure
called a pushdown stack.
Machine Instruction Types Cont.
• Summary :
• From above discussion we can easily understand that the instruction with
only one address will require less number of bits to represent it, and
instruction with three addresses will require more number of bits to
represent it.
• Therefore, to access entire instruction from the memory, the instruction with
three addresses requires more memory accesses while instruction with one
address requires less memory accesses.
• The speed of instruction execution is mainly depend on how much memory
accesses it requires for the execution.
• If memory accesses are more, more time is required to execute the
instruction.
• Therefore, the execution time for three address instructions is more than the
execution time for one address instructions.
Machine Instruction Types Cont.
• To have a less execution time we have to use instructions with
minimum memory accesses.
• For this instead of referring the operands from memory it is advised
to refer operands from processor registers.
• When machine level language programs are generated by compilers
from high-level languages, the intelligent compilers see that the
maximum references to the operands lie in the processor registers.
According to Operations
• According to operations instruction set can be categorized into
following instruction types.
• Data Processing : Arithmetic and logic instructions
• Data Storage : Memory instructions
• Data Movement : Data transfer instructions
• Control : Test and branch instructions
According to Operations Cont..
• Data Processing :
• Data processing instructions include both arithmetic and logic instructions.
• The arithmetic instructions provide computational capabilities for processing
numeric data.
• Logic instructions provide capabilities of performing logical operations on the bits
of a word.
• Data Storage :
• Arithmetic and logical operations are performed primarily on data in CPU registers.
• Therefore, it is necessary to transfer data from memory to CPU registers before
operation and transfer data from CPU registers to memory after operation.
• The instructions used for such function are belongs to data storage instructions.
According to Operations Cont..
• Data Movement :
• Data movement instructions are the superset of data storage instructions.
• These instructions include the instructions for transfer of data between CPU
register, and transfer of data between CPU registers and input/output
devices.
• Control :
• This instruction type includes test and branch instructions.
• Test instructions are used to test the value of a data word or the status of a
computation.
• Branch instructions are used to branch to a different set of instructions
depending on the decision made.
Types of Operations
• A computer has a set of instructions that allows the user to formulate
any data-processing task.
• To carry out tasks, regardless of whether a computer has 100
instructions or 300 instructions,
• Its instructions must be capable of performing following basic
operations :
• Data Movement
• Data Processing
• Program sequencing and Control
Types of Operations Cont..
• The standard notations used in the discussion, are as listed
below
• Processor registers are represented by notations R0, R1, R2, and so
on.
• The addresses of the memory locations are represented by names
such as LOC, PLACE, MEM, etc.
• I/O registers are represented by names such as DATAIN, DATAOUT
and so no.
• The contents of register or memory location are denoted by
placing square brackets around the name of the register or
memory location.
Types of Operations Cont..

• Data Movement Operations

• These operations include the following data transfer operations .
• Data transfer between memory and CPU register

• Data transfer between CPU registers

• Data transfer between processor and input/output devices.

Data Movement Operations
Cont.
Data Transfer between Memory and CPU Registers
•
• Arithmetic and logical operations are performed primarily on data in CPU registers.
• Therefore it is necessary to transfer data from memory to CPU registers before
operation and transfer data from CPU registers to memory after operation.
• We know that both program instructions and data operands are stored in the
memory.
• To execute an instruction processor has to fetch instruction and read the operand or
operands if necessary from the memory.
• After execution of instruction processor may store the result or modified operand
back in the memory.
• Thus, there are two basic operations required in the memory access :
1. Load (Read or fetch)
2. Store (write).
Data Movement Operations
Cont.
• Load Operation :
• In the load operation the contents of the specified memory location are read
by the processor.
• For load operation processor sends the address of the memory location
whose contents are to be read and generates the appropriate read signal to
indicate that it is a read operation.
• The memory identifies the addressed memory location and sends the
contents of that memory location to the processor.
• This operation is illustrated in Fig. 3.1.
Data Movement Operations
Cont.
• Store Operation :
• In the store operation the data from the processor is Stored in the specified
memory location.
• For store operation processor sends the address of the memory location
where the data is to be written on the address lines, the data to be written on
the data lines and generates the appropriate write signal to indicate the store
operation.
Data Transfer between CPU
Registers
• As per the requirement of registers, the CPU registers can be made
free by data transfer operations between CPU registers.
• Example : R3  [R2] This expression states that the contents of
processor register R2 are transferred into processor register R3.
Data Transfer between Processor and Input /
Output Devices
• Many applications of a processor based system requires the transfer of data
between external circuitry to the processor and processor to the external
circuitry.
• e.g. - user can give information to the processor using keyboard and user can see
the result or output information from the processor with the help of display
device.
• The transfer of data between keyboard and processor and display device is called
input/output (I/O) data transfer.
• Example : R1  [DATA IN]
Data Processing Operations
• These operations include the following types of operations.
• Arithmetic operations
• Logical operations
• Shift and Rotate operations.
Arithmetic Operations
• These operations include basically the following operations.
• Add
• Subtract
• Multiply
• Divide
• Increment
• Negate (Change sign of operand)
Arithmetic Operations Cont...
• Example : ADD R1, R2, R3
• This expression states that the contents of processor registers R1 and R2 are added
and the result is Stored in the register R3.
• The multiplication instruction does the multiplication of two operands and Stores the
result in the destination operand.
• On the other hand the division instruction does the division of two operands and
stores the result in the destination operand.
• For example

• Unfortunately, all processors do not provide these instructions.

• On those processors MUL and DIV instruction are implemented by performing basic
operations such as add, subtract, shift and rotate, repeatedly.
Direct Access Media (DMA)
Controller
• DMA Controller is a hardware
device that allows I/O
devices to directly access
memory with less
participation of the
processor.
• DMA controller needs the
same old circuits of an
interface to communicate
with the CPU and
Input/Output devices.
Direct Access Media (DMA)
Controller
• Fig-1 below shows the block diagram of the DMA controller.
• The unit communicates with the CPU through data bus and control
lines.
• Through the use of the address bus and allowing the DMA and RS
register to select inputs, the register within the DMA is chosen by the
CPU.
• RD and WR are two-way inputs. When BG (bus grant) input is 0, the
CPU can communicate with DMA registers.
• When BG (bus grant) input is 1, the CPU has relinquished the buses
and DMA can communicate directly with the memory.
Direct Access Media (DMA)
Controller
• Explanation :
• The CPU initializes the DMA by sending the given information through
the data bus.
• The starting address of the memory block where the data is available
(to read) or where data are to be stored (to write).
• It also sends word count which is the number of words in the memory
block to be read or write.
• Control to define the mode of transfer such as read or write.
• A control to begin the DMA transfer.