TECHNOLOGIES FOR NETWORK-BASED SYSTEMS
Introduction
With the concept of scalable computing under our belt, it’s time to
explore hardware, software, and network technologies for distributed
computing system design and applications. In particular, we
will focus on viable approaches to building distributed operating
systems for handling massive parallelism in a distributed environment.
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TECHNOLOGIES FOR NETWORK-BASED SYSTEMS
1. Multicore CPUs and Multithreading Technologies
2. GPU Computing to Exascale and Beyond.
3. Memory, Storage, and Wide-Area Networking.
4. Virtual Machines and Virtualization Middleware
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Multicore CPUs and Multithreading Technologies
• Consider the growth of component and network technologies over the
past 30 years. They are crucial to the development of HPC and HTC
systems.
• In Figure 1.4, processor speed is measured in millions of instructions per
second (MIPS) and network bandwidth is measured in megabits per
second (Mbps) or gigabits per second (Gbps).
• The unit GE refers to 1 Gbps Ethernet bandwidth
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Multicore CPUs and Multithreading Technologies
• 1.2.1.1 Advances in CPU Processors
• Today, advanced CPUs or microprocessor chips assume a multicore
architecture with dual, quad,six, or more processing cores. These
processors exploit parallelism at ILP and TLP levels.
• Processor speed growth is plotted in the upper curve in Figure 1.4 across
generations of microprocessors or CMPs.(Compare strings / Compare
memory )
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1.2.1.1 Advances in CPU Processors
• The Instruction – level Parallelism (ILP) is highly exploited in modern
CPU processors.
• ILP mechanisms include multiple-issue superscalar architecture,dynamic
branch prediction, and speculative execution, among others.
• These ILP techniques demand hardware and compiler support.
• In addition, Data level Parallelism (DLP) and Thread level
Parallelism(TLP) are highly explored in graphics processing units
(GPUs) that adopt a many-core architecture with hundreds to thousands of
simple cores.
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Fig : Improvement in processor and network technologies over
33 years.
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Multicore CPU and Many-Core GPU Architectures
• Multicore CPUs may increase from the tens of cores to hundreds or more
in the future. But the CPU has reached its limit in terms of exploiting
massive DLP due to the aforementioned memory wall problem.
• This has triggered the development of many-core GPUs with hundreds or
more thin cores.
• Many Reduced Instruction Set Computer Processors(RISC) processors
have been replaced with multicore x-86 processors and many-core GPUs
in the Top 500 systems. The GPU also has been applied in large clusters to
build supercomputers in MPPs
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1.2.1.3 Multithreading Technology
*Multithreading is a programming concept where a single program can
execute multiple threads (smaller units of a process) concurrently.
* Each thread operates independently but shares the same memory
space, enabling efficient resource use and communication between
threads.
* It's a way to achieve concurrency, where multiple operations appear
to happen simultaneously, even on a single processor.
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1.2.1.3 Multithreading Technology
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1.2.1.3 Multithreading Technology
• Instructions from different threads are distinguished by specific shading
patterns for instructions from five independent threads. Typical
instruction scheduling patterns are shown here.
• Only instructions from the same thread are executed in a superscalar
processor.
• Fine-grain multithreading switches the execution of instructions from
different threads per cycle.
• Course-grain multithreading executes many instructions from the same
thread for quite a few cycles before switching to another thread.
• The multicore CMP executes instructions from different threads
completely.
• The Simlutaneous multi thread SMT allows simultaneous scheduling
of instructions from different threads in the same cycle.
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GPU Computing to Exascale and Beyond
• A GPU is a graphics coprocessor or accelerator mounted on a computer’s
graphics card or video card.
• A GPU offloads the CPU from tedious graphics tasks in video editing
applications.
• The world’s first GPU, the GeForce 256, was marketed by NVIDIA in
1999.
• These GPU chips can process a minimum of 10 million polygons per
second, and are used in nearly every computer on the market today
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1.2.2.1 How GPUs Work
• The NVIDIA GPU has been upgraded to 128 cores on a single chip.
• Modern GPUs are not restricted to accelerated graphics or video coding.
They are used in HPC systems to power supercomputers with massive
parallelism at multicore and multithreading levels.
• GPUs are designed to handle large numbers of floating-point operations in
parallel.
• Conventional GPUs are widely used in mobile phones, game consoles,
embedded systems,PCs, and servers.
• The NVIDIA CUDA Tesla or Fermi is used in GPU clusters or in HPC
systems for parallel processing of massive floating-pointing data
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1.2.2.2 GPU Programming Model
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1.2.2.2 GPU Programming Model
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1.2.2.3 Power Efficiency of the GPU
• Bill Dally of Stanford University considers power and massive parallelism
as the major benefits of GPUs over CPUs.
• By extrapolating current technology and computer architecture, it was
estimated that 60 Gflops/watt per core is needed to run an exaflops system
(.see Figure 1.10).Power constrains what we can put in a CPU or GPU
chip.
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1.2.3 Memory, Storage, and Wide-Area Networking
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1.2.3 Memory, Storage, and Wide-Area Networking
1.2.3.1 Memory Technology
• The upper curve in Figure 1.10
plots the growth of DRAM chip
capacity from 16 KB in 1976 to
64 GB in 2011.
• This shows that memory chips
have experienced a 4x increase in
capacity every three years.
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1.2.3 Memory, Storage, and Wide-Area Networking
1.2.3.2 Disks and Storage
Technology
• Beyond 2011, disks or disk arrays
have exceeded 3 TB in capacity.
• The lower curve in Figure 1.10
shows the disk storage growth
in 7 orders of magnitude in 33 years.
• The rapid growth of flash memory
and solid-state drives (SSDs) also
impacts the future of HPC and
HTC systems
• A typical SSD can handle
300,000 to 1 million write
cycles per block
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1.2.3 Memory, Storage, and Wide-Area Networking
1.2.3.3 System-Area
Interconnects
• As Figure 1.11 shows, a LAN
typically is used to connect
client hosts to big servers.
• A storage area network (SAN)
connects servers to network
storage such as disk arrays.
Networkattached storage
(NAS) connects client hosts
directly to the disk arrays.
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1.2.3 Memory, Storage, and Wide-Area Networking
1.2.3.4 Wide-Area Networking
• The lower curve in Figure 1.10
plots the rapid growth of Ethernet
bandwidth from 10 Mbps in 1979
to 1 Gbps in 1999, and 40 ~ 100
GE in 2011.
• High-bandwidth networking
increases the capability of
building massively distributed
systems.
• Most data centers are using
Gigabit Ethernet as the
interconnect in their server
clusters.
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