8086 Addressing Modes

What is the Addressing Mode ?

add dest, source add ax,bx ; dest +sourcedest ; ax +bxax

The addressing mode means where and how the CPU gets the operands when the instruction is executed.

 Addressing modes for Sequential Control Transfer Instructions

----These Instructions transfer control to the
next sequential instruction in the program

Addressing modes for Control Transfer Instructions

-----These Instructions transfer control to some predefined address Ex:INT CALL

Addressing modes for Sequential Control

Transfer Instructions

Three types of 8086 addressing modes Immediate Addressing Mode

---CPU gets the operand from the instruction

Register Addressing Mode

---CPU gets the operand from one of the internal registers

Memory Addressing Mode

---CPU gets the operand from the memory location(s)

1. Immediate Addressing Mode

Exp MOV AL, 80H Machine code:B080H

MOV AX, 1234H Machine Code:B83412H

Instruction Queue

AL

80H

Instruction Queue

AH 12
MACHINE CODE

AL 34

B8 34H 34 12H 12
MACHINE CODE

B0H 80H
5

2. Register Addressing Mode

ExpMOV AX, CX
Memory AX

CX

89 C1

Machine code

3. Memory Addressing Mode

Specify an offset address (effective address) using expressions of the form (different parts of expression are optional):

[ Base Register + Index Register+ Displacement]

1) Base Register---BX, BP 2) Index Register---SI, DI 3) Displacement ---constant value Example: 1) add ax,[20h] 3) add ax,[bx+20h] 5) add ax, [bx+si+20h]

2) add ax,[bx] 4) add ax, [bx+si]

3. Memory Addressing Mode

Direct Addressing Mode Exp: MOV AL, [1064H] Machine code:A06410H
The offset address of the operand is provided in the instruction directly; The physical address can be calculated using the content of DS and the offset : PA = (DS)*10H+Offset

 Direct Addressing Mode

Example: MOV AL, [1064h] Machine code: A06410H ;Assume (DS)=2000H

DS)*10H=20000H + 1064H 21064H

A0

64 10

Code Segment

AL

45

20000H

21064H

Data Segment

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 Register Indirect Addressing Mode

3. Memory Addressing Mode

The address of memory location is in a register

(SI,DI,or BX only)

The physical address is calculated using the content of DS

and the register(SI,DI,BX)
PA = (DS)*10H+(SI)/(DI)/(BX)

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 Register Indirect Addressing Mode

ASSUME: (DS)=3000H, (SI)=2000H, (BX)=1000H

MOV AX, [SI]

(DS)*10H=30000H + (SI)= 2000H 32000H M

MOV [BX], AL
(DS)*10h= 30000H + (BX)= 1000H 31000H M

AX

30000H

AL

30000H

32000H

50 40

31000H

11

64H

40

50

64H

 Register Relative Addressing

(BX) (BP) EA= (DI) + (SI)

Displacement

For physical address calculation: DS is used for BX,DI,SI; SS is used for BP PA=(DS)*10H+(BX)/(DI)/(SI)+Disp OR PA=(SS)*10H+(BP)+Disp
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 Register Relative Addressing MOV CL, [BX+1064H] ;assume: (DS)=2000h, (bx)=1000h

;Machine Code: 8A8F6410

8A 8F
Code Segment

PA=(ds)*10h+(bx)+1064h (DS)*10h= (BX)= + 20000H 1000H 1064H 22064H

64 10

20000H
21000H 22064H 45
Data Segment

CL

45

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 Based Indexed Addressing

(BX) EA= (BP) +

(DI) (SI)

Base register(bx or bp) determines which segment(data or stack) the operand is stored; if using BX, the operand is defaultly located in Data segment,then: PA=(DS)*10H+(BX)+(DI)/(SI) if using BP, the operand is defaultly located in stack segment,then: PA=(SS)*10H+(BP)+(DI)/(SI)
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 Based Indexed Addressing Example: MOV AH, [BP][SI];Assume(ss)=4000h,(bp)=2000h,(si)=1200h

PA=(ss)*10h+(bp)+(si)
M

(SS)*10H= 40000H (BP)= 2000H + (SI)= 1200H 43200H 40000H

AH

56H 43200H

56H

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 Based Indexed Relative Addressing

(BX) EA= (BP) + (DI) (SI) +
Displacement

if using BX, the operand is defaultly located in Data segment,then: PA=(DS)*10H+(BX)+(DI)/(SI)+disp if using BP, the operand is defaultly located in stack segment,then: PA=(SS)*10H+(BP)+(DI)/(SI)+disp

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 Based Indexed Relative Addressing MOV [BX+DI+1234H], AH 88

;assume (ds)=4000h,(bx)=0200h,(di)=0010h ;machine code:88A13412h

A1

Code segment

(DS)*10H=40000H (BX)= 0200H (DI)= 0010H 1234H + 41444H

34 12 40000H
Data segment

AH

45 41444H

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Summary on the 8086 memory addressing modes

operand offset address effective address Default Segment Register Overridden Segment Register

1. Direct Addressing

[disp]

disp Content of the R

DS DS

CS ES SS CS ES SS

2. Register [BX]/[SI] /[DI] Indirect Addressing

3. Register [SI/DI/BX/BP+disp] Relative Addressing

4. Based Indexed Addressing 5. Based Indexed Relative Addressing [BX+SI/DI] [BP+SI/DI] [BX+SI/DI+disp] [BP+SI/DI+disp]

(SI)/(DI)/(BX)/(BP)+disp DS
(BX)+disp (BP)+disp (BX)+(SI)/(DI)+disp (BP)+(SI)/(DI)+disp DS SS DS SS

CS ES SS
CS ES SS CS ES DS CS ES SS CS ES DS

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Examples: Assume: (BX)=6000H, (BP)=4000H, (SI)=2000H, (DS)=3000H, (ES)=3500H, (SS)=5000H

Instruction
1. MOV AX, [0520H] 2. MOV AX, [BX]

addressing mode
Direct Addressing Register Indirect Addressing

logical address
3000:0520 3000:6000

physical address
30520H 36000H

3. MOV AX, [SI+1000H]

Register Relative Addressing

3000:3000 5000:A060 3500:8050

33000H 5A060H 3D050H

4. MOV AX, [BP+6060H] Register Relative Addressing 5. MOV AX, ES: [BX+SI+0050H] Based Indexed Relative Addressing

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Addressing modes for Control Transfer Instructions

Inter-segment-Direct Inter-segment Modes for Control Transfer Instructions Intra-segment Direct Intra-segment Intra-segment Indirect Inter-segment-In Direct

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Inter-segment-Direct Addressing Mode

CS 2000h The address to which control is to be transferred lies in the different
segment and appears directly In the instruction as an immediate displacement value w.r.t IP If the displacement is 8-bits(-128<d<+127)(short) If the displacement is 16-bits(-32768<d<+32767)(Long)

Op-code for CALL

00 20
segment1

Ex: CALL 0020:0010H

Assume CS=2000h,IP=0000h

00 10

After JMP,CS= 0020h,IP=0010h CS 0020

segment2

IP
21

0010

Sub-routine

Inter-segment-IN-Direct Addressing Mode

The address to which control is to be transferred lies in the different \segment and it is passed to the instruction indirectly i.e contents of a memory block containing four bytes IP(LSB),IP(MSB),CS(LSB),CS(MSB)

CS 3000h IP 0010

Op-code for CALL

IP(LSB)10 IP(MSB)00 CS(LSB)20 CS(MSB)00

segment1

Ex: CALL [BX]

Before JMP,Assume BX=100h, CS=3000h,IP=200h

After JMP,CS= 0020h,IP=0010h CS 0020

IP
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segment2

0010

Sub-routine

Intra-segment-Direct Addressing Mode

The address to which control is to be transferred lies in the same segment and appears directly In the instruction as an immediate displacement value w.r.t IP If the displacement is 8-bits(-128<d<+127)(short) If the displacement is 16-bits(-32768<d<+32767)(Long)

Ex: CALL 500h

Assume CS=2000h,IP=0000h

After CALL,CS= 2000h,IP=IP+500h CS 2000h IP 0000 IP 0500

Op-code for CALL

05 00 Sub-routine
Code Segment

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Intra-segment-In-Direct Addressing Mode

In this mode the displacement to which control is to be transferred, Is in the same segment in which the control transfer instruction lies But it is passed to the instruction indirectly

Ex: CALL [BX]

Assume CS=2000h,IP=0000h , BX=800h

After CALL,CS= 2000h,IP=IP+800h CS 2000h IP 0000 IP 0800

Op-code for CALL

05 00 Sub-routine
Code Segment

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Example:
The Contents of different registers are given below. Form effective addresses for different addressing modes Offset(displacement)= 5000H AX=1000H,BX=2000H,SI=3000H,DI=4000H,BP=5000H,SP=6000H,CS=0000H,DS=1000H SS=2000H,IP=7000H Shifting a number four times is equivalent to multiplying it by 16D or 10H

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Instruction Set & Assembler Directives

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Programming in 8088/8086
Three levels of languages available to program a microprocessor: Machine Languages, Assembly Languages, and High-level Languages.

Machine Language
A sequence of binary codes for the instruction to be executed by microcomputers. Long binary bits can be simplified by using Hexadecimal format It is difficult to program and error prone. Different uP (micro-processor) uses different machine codes.

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Programming in 8088/8086 (cont.) Assembly Language To simplify the programming, assembly language (instead of machine language) is used. Assembly language uses 2- to 4-letter mnemonics to represent each instruction type. E.g. Subtraction is represented by SUB Four fields in assembly language statement: Label, OP Code, Operand and Comment fields. Programs will be translated into machine language, by Assembler, so it can be loaded into memory for execution. High-Level Language High level languages, like C, Basic or Pascal, can also be used to program microcomputers. An interpreter or a compiler is used to translate high level language statement to machine code. High level language is easier to read by human and is more suitable when the programs involves complex data structures.
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Assemblers
Programming the instructions directly in machine code is possible but every machine codes depending on how the data is stored. The process of converting the microprocessor instructions to the binary machine code can be performed automatically by a computer program, called an ASSEMBLER. Popular assemblers include IBM macro Assembler, Microsoft Macro Assembler (MASM) and Borland Turbo Assembler(installed on IE NT Network). Most assemblers accept an input text file containing lines with a rigorously defined syntax split into four fields.

Not all fields need to be present in a line. Eg. A line can be just a comment line if it starts with semicolon;

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Source Codes, Object Codes and Linking

Source code is the text written by the programmer in assembly language (or any other programming language)

Object code is the binary code obtained after running the assembler (
Or compiler if the source is in a high level language). Modules of a program may be written separately and linked together to form a executable program using a linker. The linker joins the object code of the different modules into one large

object file which is executable. Most assemblers on IBM PCs produce

object files which must be linked ( even if there are no separate modules).
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Source Codes, Object Codes and Linking(Contd.,)

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Fields in Assembler
<label> <Mnemonic or directive> <operands> <;comment> Comment field contains internal program documentation to improve human readability -use meaningful comments

Operand field contains data or address used by the instruction.

The following conventions typically apply:

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Fields in Assembler (Contd.,)

<label> <Mnemonic or directive> <operands> <;comment>

Mnemonic/directive field contains the abbreviation for the processor instruction (eg. MOV) or an assembler DIRECTIVE. Adirective produces no object code but is used to control how the assembler operates. Examples of directives include:

END -indicate the end of a program listing,

FRED LABEL NEAR - define FRED as a near label TOM EQU 1000H -define TOM as the number 1000H Label field contains a label which is assigned a value equal to the address where the label appears.
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Why Program in Assembler? Assembler language instruction has a one-to-one correspondence with the binary machine code: the programmer controls precisely all the operations performed by the processor (a high level language relies on a compiler or interpreter to generate the instructions). Assembler can generate faster and more compact programs Assembler language allows direct access and full control of input/output operations However, high-level language programs are easier to write and develop than assembler language programs

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Advantages of High-level languages Block structure code: programs are most readable when they are broken into logical blocks that perform specific function. Productivity: easier to program Level of complexity: no need to know the hardware details

Simple mathematics formula statement

Portability: only need to change the compiler when it is ported to other machine

Abstract data types: different data types like floating-point value,

record and array, and high precision value.
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Readability

Intel 8086 Instruction Set Overview

Intel 8088 has ninety basic ( ie not counting addressing mode

variants) instructions
Instructions belong to one of the following groups: data transfer, arithmetic, logic, string manipulation, control

transfer and processor control.

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Converting Assembly Language Instructions to Machine Code

An instruction can be coded with 1 to 6 bytes Byte 1 contains three kinds of information
Opcode field (6 bits) specifies the operation (add, subtract, move) Register Direction Bit (D bit) Tells the register operand in REG field in byte 2 is source or destination operand 1: destination 0: source

-Data Size Bit (W bit) Specifies whether the operation will be performed on 8bit or 16-bit data 0: 8 bits 1: 16 bits

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 Byte 2 has three fields Mode field (MOD)

Register field (REG) used to identify the register for the first operand Register/memory field (R/M field)

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2-bit MOD field and 3-bit R/M field together specify the second operand

Mode Field encoding

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Register/memory (R/M) Field Encoding

Examples
MOV BL,AL (88C316) Opcode for MOV = 100010 D = 0 (AL source operand) W bit = 0 (8-bits) Therefore byte 1 is 100010002=8816 MOD = 11 (register mode) REG = 000 (code for AL) R/M = 011 (destination is BL) Therefore Byte 2 is 110000112=C316

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Examples:
MOV BL, AL = 10001000 11000011 = 88 C3h ADD AX, [SI] = 00000011 00000100 = 03 04 h ADD [BX] [DI] + 1234h, AX = 00000001 10000001 __ __ h = 01 81 34 12 h

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Intel 8086 Instruction Set Overview

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I. Data Movement Instructions (14)

(abbreviations below: d=destination, s=source) General Data Movement Instructions MOV d,s - moves byte or word; most commonly used instruction PUSH s - stores a word (register or memory) onto the stack

POP d - removes a word from the stack

XCHG d,s - exchanges data, reg.-reg. Or memory to register XLAT - translates a byte using a lookup table (has no operands) IN d,s - moves data (byte or word) from I/O port to AX or AL

OUT d,s - moves data (byte or word) from AX or AL to I/O port

LEA d,s - loads effective address (not data at address) into register LDS d,s - loads 4 bytes (starting at s) to pointer (d) and DS LES d,s - loads 4 bytes (starting at s) to pointer (d) and ES

LAHF - loads the low-order bytes of the FLAGS register to AH

SAHF - stores AH into the low-order byte of FLAGS PUSHF - copies the FLAGS register to the stack POPF - copies a word from the stack to the FLAGS register
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Instructions for moving strings

String instructions are repeated when prefixed by the REP mnemonic (CX contains the repetition count) MOVS d,s - (MOVSB, MOVSW) memory to memory data transfer LODS s - (LODSB and LODSW) copies data into AX or AH STOS d - (STOSB, STOSW) stores data from AH or AX

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Data movement using MOV

MOV d, s d=destination (register or effective memory address), s=source (immediate data, register or memory address) MOV can transfer data from:

any register to any register (except CS register)

memory to any register (except CS) immediate operand to any register (except CS) any register to a memory location

immediate operand to memory

MOV cannot perform memory to memory transfers (must use a register as an intermediate storage). MOV moves a word or byte depending on the operand bit-lengths; the source

and destination operands must have the same bit length.

MOV cannot be used to transfer data directly into the CS register.

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The stack

The stack

The stack is a block of memory reserved for temporary storage of data and registers. Access is LAST-IN, FIRST OUT (LIFO)

The last memory location used in the stack is given by the effective
address calculated from the SP register and the SS register:

Example:

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The stack

Data may be stored onto the stack using the PUSH instruction this automatically decrements SP by 2 (all stack operations involve words). The POP instruction removes data from the stack (and increments SP by 2). The stack may be up to 64K-bytes in length.

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PUSH and POP instructions

Examples:
PUSH AX ;stores AX onto the stack POP AX ;removes a word from the stack and loads it into AX PUSHF ;stores the FLAGS register onto the stack

POPF ; removes a word from the stack and loads it into FLAGS
PUSH may be used with any register to save a word (the register contents) onto the stack. The usual order (e.g. as with MOV) of storing the lower order byte in the lower memory location is used. PUSH may also be used with immediate data, or data in memory. POP is the inverse of the PUSH instruction; it removes a word from the top of the stack. Any memory location or 16-bit register (except CS) may be used as the destination of a POP instruction. PUSHF and POPF saves and loads the FLAGS register to/from the stack,respectively.

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Exchange Instruction (XCHG) XCHG exchanges the contents of two registers or a register and memory. Both byte and word sized exchanges are possible.

Examples:
XCHG AX,BX; exchange the contents of AX and BX XCHG CL,BL; exchange CL and BL contents

XCHG DX,FRED; exchanges content of DX and memory

DS:FRED Memory to Memory exchanges using XCHG are NOT allowed.

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Translate Instruction (XLAT)

Many applications need to quickly convert byte sized codes to other values mapping one byte value to another (e.g. mapping keyboard binary codes to ASCII code) XLAT can perform a byte translation using a look-up table containing up to 256 elements XLAT assumes that the 256-byte table starts at the address given by DS:BX (i.e. effective address formed by the DS and BX registers). AL is used as an index to point to the required element in the table prior to the execution of XLAT. The result of XLAT instruction is returned in the same register (AL).
Address Data Table

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LEA &LDS
LEA loads the offset of a memory address into a 16-bit register. The offset address may be specified by any of the addressing modes.
Examples (with BP=1000H): LEA AX,[BP+40H];=>SS:[1000H+40H] =SS:[1040H];load 1040H into AX

LEA BX,FRED; load the offset of FRED (in data segment) to BX

LEA CX,ES:FRED; loads the offset of FRED (in extra segment) to CX LDS -Load data and DS LDS reads two words from the consecutive memory locations and loads them into the specified register and the DS segment registers. Examples (DS=1000H initially) LDS BX,[2222H]; copies content of 12222H to BL, 12223H to BH, and 12224 and 12225 to DS register LDS is useful for initializing the SI and DS registers before a string operation. E.g. LDS SI, sting_pointer The source for LDS can be displacement, index or pointer register (except SP).
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LES -Load data and ES

LES reads two words from memory and is very similar to LDS except that the second word is stored in ES instead of DS.

LES is useful for initializing that DI and ES registers for strings operation.
Example (with DS=1000H):

LES DI, [2222H]; loads DI with contents stored at 12222H and 12223H and loads ES with contents at 12224 and 12225H

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LAHF, SAHF LAHF (load AH with the low-order byte of the FLAGS register) and SAHF (Store AH into the low-order byte of the FLAG register)

very rarely used instructions -originally present to allow translation of 8085 programs to 8086.

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IN, OUT
Examples: IN AX, 0C8h IN AL, DX OUT p8 ,AX OUT DL, AX ;reads port address at C8h (8 bit address) and loads into AX ;reads the port address given by DX and loads into AL ;sends the data in AX to port p8 ; sends the data in AX to port given by DL

IN reads data from the specified IO port (8-bit or 16-bit wide) to the accumulator (

AL or AX).
The IO port can be an immediate address (8-bit only) or specified by a variable or register (8 or 16-bit address). (Seems only DX can be used.) OUT sends data from the accumulator register to the specified I/O port. Both byte and word sized data may be sent using IN and OUT.

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II. Arithmetic Instructions(20)

Intel 8088 has 20 instructions for performing integer addition, Subtraction , multiplication, division, and conversions from binary coded decimal to binary.

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Arithmetic Instructions (cont.)

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Addition Binary addition of two bytes or two words are performed using: ADD d,s ADD adds bytes or words in d and s and stores result in d. The operands d and s can use the same addressing modes as in MOV. Addition of double-word is achieved by using the carry bit in the FLAGS register. The instruction ADC d,s automatically includes the carry flag, and is used to add the more significant word in a double-word addition. Addition
Example: addition of two double words stored at [x] and [y] MOV AX, [x] ; Loads AX with the word stored at location [x] MOV DX, [x+2] ; Loads the high order word ADD AX, [y] ; Adds the low order word at [y] ADC DX, [y+2] ; Add including the carry from the low order words
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Addition (cont.)
Example: addition of two double words stored at [x] and [y]

Addition of binary coded decimal numbers (BCD) can be performed by using ADD or ADC followed by the DAA instruction to convert the number in register AL to a BCD representation. (see example)

Addition of numbers in their ASCII form is achieved by using AAA (ascii adjust after addition).

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ASCII adjust for Addition (AAA)

ASCII codes for the numbers 0 to 9 are 30H to 39H respectively. The ascii adjust instructions convert the sum stored in AL to two-byte unpack BCD number which are placed in AX. When 30H is added to each byte, the result is the ASCII codes of the digits representing the decimal for the original number in AL. Example: Register AL contains 31H (the ASCII code for 1), BL contains 39H (the ASCII code for 9). ADD AL, BL ; produces the result 6AH which is kept in AL. AAA ; converts 6AH in AL to 0100H in AX Addition of 30H to each byte of AX produces the result 3130H (the ASCII code for 10 which is the result of 1+9)

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Subtraction

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Multiplication

61

Division

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SIGN EXTENDED INSTRUCTIONS

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Other Arithmetic Instructions

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III. Logic and bit MANIPULATION Instructions (12)

65

III. Logic and bit MANIPULATION Instructions (12) (Contd)

66

Shift and Rotate

67

Shift and Rotate(Contd)

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List file of 8086 assembly language program to produce packed BCD from two ASCII characters

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IV. Strings Instruction (6)

70

IV. Instruction for moving strings(Contd)

72

REP prefix

73

LODS and STOS string instructions

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LODS and STOS string instructions(Contd)

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CMPS and SCAS string instructions

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V. Program Flow Instruction

77

Program Flow Instruction

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Unconditional JUMP

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Unconditional JUMP (cont.)

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List file of program Demonstrating backward JMP

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List file of program demonstrating forward JMP

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Conditional Jumps

83

8086 Conditional Jump Instructions

84

Ex.: Reading ASCII code when a strobe is present

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Assembly language for Reading ASCII code when a strobe is present

86

Loops

87

Procedures and modular Programming

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89

90

Procedures and modular Programming (Contd)

91

Procedures

92

Stack Diagram

93

Using PUSH and POP instructions

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Interrupt Instructions

95

Interrupt Instructions

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Program Data and Storage

Assembler directives for data storage

DB - byte(s) DW - word(s) DD - doubleword(s) DQ - quadword(s) DT - tenbyte(s)

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Arrays
Any consecutive storage locations of the same size can be called an array
X DW 40CH,10B,-13,0 Y DB 'This is an array' Z DD -109236, FFFFFFFFH, -1, 100B Components of X are at X, X+2, X+4, X+8 Components of Y are at Y, Y+1, , Y+15 Components of Z are at Z, Z+4, Z+8, Z+12

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DUP
Allows a sequence of storage locations to be defined or reserved Only used as an operand of a define directive
DB DW DB db 40 DUP (?) 10h DUP (0) 3 dup ("ABC") 4 dup(3 dup (0,1), 2 dup('$'))

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Word Storage
Word, doubleword, and quadword data are stored in reverse byte order (in memory)
Directive DW 256 DD 1234567H DQ 10 X DW 35DAh Bytes in Storage 00 01 67 45 23 01 0A 00 00 00 00 00 00 00 DA 35

Low byte of X is at X, high byte of X is at X+1

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EQU Directive
name EQU expression
expression can be string or numeric Use < and > to specify a string EQU these symbols cannot be redefined later in the program sample EQU 7Fh aString EQU <1.234> message EQU <This is a message>

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Macro definition:

name

MACRO [parameters,...]
<instructions>

ENDM
MyMacro MACRO p1, p2, p3 MOV AX, p1 MOV BX, p2 MOV CX, p3 ENDM ORG 100h MyMacro 1, 2, 3 MyMacro 4, 5, DX RET 119

The syntax for procedure declaration: name PROC

; here goes the code ; of the procedure ...

RET name ENDP

120

ORG

100h

CALL m1

MOV
RET

AX, 2
; return to Main Program.

m1 PROC MOV BX, 5 RET m1 ENDP

END
121

; return to caller.

ORG MOV MOV CALL CALL CALL CALL RET

100h AL, 1 BL, 2 m2 m2 m2 m2 ; return to operating system.

m2 PROC MUL BL RET m2 ENDP END

122

; AX = AL * BL. ; return to caller.

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