ARITHMETIC AND LOGIC UNIT
Hardware implementation for Addition and Subtraction:
Multiplication
UNSIGNED INTEGERS
Multiplicand (11) Multiplier (13) Product (143)
1011 X 1101
----------------
1011
0000
1011
1011
----------------------------
10001111
TWOS COMPLEMENT MULTIPLICATION
1011 X 1101
----------------
1011
0000
1011
1011
----------------------------
10001111
Figure 9.10 Multiplication of Two Unsigned 4-Bit Integers Yielding an 8-Bit Result
Straightforward multiplication will not work if both the multiplicand and
multiplier are negative.
In fact, it will not work if either the multiplicand or the multiplier is negative.
(a) Unsigned integers (b) Twos complement integers
Figure 9.11 Comparison of Multiplication of Unsigned and 2’s Complement
Booth’s algorithm:
Adv: Benefit of speeding up the multiplication process, relative to a more straightforward
approach.
The multiplier in Reg Q and multiplicand in M are placed.
There is a 1-bit register Q-1 placed logically to the right of the least significant bit of the Q
register.
The results of the mul will appear in A & Q regs.
A and Q-1 are initialized to 0.
Figure 9.12 Booth’s Algorithm for 2’s Complement Multiplication
Consider a +ve multiplier 00011110 = 24 + 23 + 22 + 21 = 30
Is also equal to 25 – 21
The number of such operations can be reduced to two if we observe
that
2n + 2n-1 + ...... + 2n-K = 2n+1 - 2n-K ----Eq 1
So the product can be generated by one addition and one subtraction of
the multiplicand.
This scheme extends to any number of blocks of 1s in a multiplier.
The same scheme works for a negative multiplier.
Let X be a negative number in twos complement notation. The leftmost bit of X is 1, because X
is negative:
Then the value of X can be expressed as
Assume that the leftmost 0 is in the kth position. Thus, X is of the form
Then the value of X is
----2
From Equation (1), we can say that
Rearranging,
----3
Substituting Eqn 3 in eqn 2 we have
Look at page 324, how -6 is handled with above principle.
DIVISION
Dividend = 147 Divisor = 11
To deal with -ve numbers, we recognize that
D=Q*V+R
Here D – dividend V – Divisor Q – Quotient R – Remainder
Consider eg. of int div with all possible combinations of signs of D and V:
D=7 V=3 Q=2 R=1
D=7 V = -3 Q = -2 R = 1
D = -7 V = 3 Q = -2 R = -1
D = -7 V = -3 Q = 2 R = -1
Note that the signs of Q and R are easily derivable from the signs of D and V.
Specifically,
sign(R) = sign(D)
sign(Q) = sign(D) * sign(V)
Hence, 2’s complement division is
-to convert the operands into unsigned values and,
-at the end, to account for the signs by complementation where needed.
