WEEK 2

CSC-325
COMPUTER
ORGANIZATION AND
ASSEMBLY LANGUAGE
LECTURER

MR.SALMAN KHAN

FACULTY OF COMPUTER SCIENCES

Switch your cell
phones to silent /
Vibration Mode
During Class

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Modes of Operations

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Modes of Operations
1) x86 processors have three primary modes of operation:
A) Protected Mode,
B) Real Address Mode
C) System Management Mode

2) A sub-mode named Virtual-8086 IS A SPECIAL case of protected mode

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Modes Of Operations
Real Mode:
1. In Real Mode, the 80386 processor behaves like an 8086 processor.
2. It provides a flat memory model with 1 MB addressable memory.
3. It lacks memory protection and multitasking capabilities.
4. All instructions and addressing modes are available.
Virtual Mode:
1. Virtual Mode allows the 80386 processor to run multiple virtual 8086 environments.
2. Each virtual machine has its own 1 MB address space and can run its own operating system.
3. It provides a level of memory protection and multitasking for virtual machines.

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Modes of Operation
Protected Mode:
1. Protected Mode offers the most advanced features of the 80386 processor.
2. It provides a flat memory model with 4 GB addressable memory.
3. It supports memory protection, multitasking, and virtual memory.
4. It allows for the use of 32-bit registers and instructions, enabling more efficient
programming.
In summary, Real Mode is the basic mode with limited capabilities, Virtual Mode allows for
running multiple virtual 8086 environments, and Protected Mode offers advanced features such
as memory protection, multitasking, and 32-bit capabilities.

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 Various General
Purpose Registers

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Registers
Processor operations mostly involve processing data. This data can be stored
in memory and accessed from thereon. However, reading data from and
storing data into memory slows down the processor, as it involves
complicated processes of sending the data request across the control bus
and into the memory storage unit and getting the data through the same
channel.
To speed up the processor operations, the processor includes some internal
memory storage locations, called registers.
The registers store data elements for processing without having to access the
memory. A limited number of registers are built into the processor chip.

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Working of Registers
When we provide the system with input, that input is stored in registers, and
when the system returns results after processing, those results are also
drawn from the registers. so that the CPU can use them to process the data
that the user provides.
Registers are performed based on three operations:
•Fetch: The Fetch Operation is used to retrieve user-provided instructions that
have been stored in the main memory. Registers are used to fetch these
instructions.
•Decode: The Decode Operation is used to interpret the Instructions, which
means that the CPU will determine which Operation has to be carried out on
the Instructions after the Instructions have been decoded.
•Execute: The CPU manages the Execute Operation. The results that the CPU
generates are then stored in the memory before being presented on the user
screen.
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Processor Registers
There are ten 32-bit and six 16-bit processor registers in IA-32 architecture.
The registers are grouped into three categories −
•General registers,
•Control registers, and
•Segment registers.

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General-Purpose Data
Registers:
The general registers are further divided into the following groups −
•Data registers,
•Pointer registers, and
•Index registers.

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Data Register

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Data Registers
Four 32-bit data registers are used for arithmetic, logical, and other
operations. These 32-bit registers can be used in three ways −
•As complete 32-bit data registers: EAX, EBX, ECX, EDX.
•Lower halves of the 32-bit registers can be used as four 16-bit data registers:
AX, BX, CX and DX.
•Lower and higher halves of the above-mentioned four 16-bit registers can be
used as eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

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Conti……..
• AX: This is known as the accumulator register. Its 16 bits are split into two 8-bit
registers, AH and AL, allowing it to execute 8-bit instructions as well. In 8086
microprocessors, it is used in the arithmetic, logic, and data transfer instructions. One
of the numbers involved in manipulation and division must be in AX or AL.
• BX: This is called a Base register. It has 16 bits and is split into two registers with 8
bits each, BH and BL. An address register is the BX register. It typically includes a
data pointer for indirect addressing that is based, based indexed, or register-based.
• CX: This is known as the Count register. Its 16 bits are split into two 8-bit registers, CH
and CL, allowing it to execute 8-bit instructions as well. This acts as a counter for
loops. It facilitates the development of program loops. Shift/rotate instructions and
string manipulation both allow the use of the count register as a counter.
• DX: This is known as the Data register. Its 16 bits are split into two 8-bit registers, DH
and DL so that it can execute 8-bit instructions as well. In I/O operations, the data
register can be used as a port number. It is also applied to division and multiplication.

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Pointer Registers
The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-bit right
portions IP, SP, and BP. There are three categories of pointer registers
•SP: This is known as a Stack pointer used to point the program stack. For accessing the stack
segment, it works with SS. It has a 16-bit size. It designates the item at the top of the stack. The
stack pointer will be (FFFE)H if the stack is empty. The stack segment is relative to its offset
address.
•BP: This is known as the Base pointer used to point data in the stack segments. We can utilize BP
to access data in the other segments, unlike SP. It has a 16-bit size. It mostly serves as a way to
access parameters given via the stack. The stack segment is relative to its offset address.
IP: This is known as instruction Register− The 16-bit IP register stores the offset address of the
next instruction to be executed. IP in association with the CS register (as CS:IP) gives the
complete address of the current instruction in the code segment.

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Index Registers
The 32-bit index registers, ESI and EDI, and their 16-bit rightmost portions. SI
and DI, are used for indexed addressing and sometimes used in addition and
subtraction. There are two sets of index pointers −
•SI: This source index register is used to identify memory addresses in the
data segment that DS is addressing. Therefore, it is simple to access
successive memory locations when we increment the contents of SI. It has a
16-bit size. Relative to the data segment, it has an offset.
•DI: The function of this destination index register is identical to that of SI.
String operations are a subclass of instructions that employ DI to access the
memory addresses specified by ES. It is generally used as a Destination index
for string operations.

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Buses and Its Types

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Computer Buses
A computer bus is a communication system used to transfer data between
components within a computer or between different computers. It plays a
crucial role in minimizing the number of connections needed by centralizing
communication over shared pathways.
•It consists of physical connections like wires, circuits, or cables.
•Components like the CPU, memory, and input/output (I/O) devices are
connected through a bus.
•It simplifies data transfer and improves efficiency.

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1. Address Bus
A collection of wires used to identify particular location in main memory is
called Address Bus. Or in other words, the information used to describe the
memory locations travels along the address bus.
•The address bus transports memory addresses which the processor wants to
access in order to read or write data..
•The address bus is unidirectional.
•The size of address bus determines how many unique memory locations can be
addressed.
•Example:
• A system with 4-bit address bus can address 24 = 16 Bytes of memory.
• A system with 16-bit address bus can address 216 = 64 KB of memory
• A system with 20-bit address bus can address 220 = 1 MB of memory.

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2. Data Bus
A collection of wires through which data is transmitted from one part of a
computer to another is called Data Bus. It can be thought of as a highway on which
data travels within a computer.
• The main objective of data bus is transfer of the data between microprocessor to
input/ output devices or memory.
• The data bus transfers instructions coming from or going to the processor.
• The data bus is bidirectional because the data can flow in either direction from CPU
to memory(or input/output device) or from memory to the CPU.
• The size (width) of bus determines how much data can be transmitted at one time.
• Example:
• A 16-bit bus can transmit 16 bits of data at a time.
• 32-bit bus can transmit 32 bits at a time.

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3. Control Bus
The connections that carry control information between the CPU and other
devices within the computer is called Control Bus. The control bus transports
orders and synchronization signal coming from the control unit and travelling
to all other hardware components
•The main objective of control bus is all signals controller carried from
processor to other hardware device.
•The Control bus is bidirectional because the data can flow in either direction
from CPU to memory(or input/output device) or from memory to the CPU.
•it also transmits response signals from the hardware.
•Example:
• This bus is used to indicate whether the CPU is reading from memory or writing
to memory.

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Common Bus System
using multiplexers

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Common Bus System using
multiplexers
A typical computer has many registers and we need to transfer the information between these
registers. A way to transfer the information is using the common bus system.

The concept of working a common bus system using a multiplexer in 4 bits, 8 bits, or 16 bits is
almost the same. This article will teach us about 4-bit and 8-bit register architecture, but most
registers are 16-bit in computer architecture.

Generally, computers use many registers for different purposes. We need to transfer the data
and instructions between these registers. So, To transfer the data between the registers, the
common bus system is used. For this purpose, we connect all registers with a common BUS
through Multiplexer.

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4-bit register in the Common Bus
System

No. of multiplexers needed = No. of bits in each

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1. The 4-bit register means that the size of the register is 4-bit.
2. These 4-bit registers use four multiplexers because the number of bits in the register
always equals the number of multiplexers.
3. This mechanism is also known as a “4×1” multiplexer.
4. The 4×1 Multiplexer means four inputs to each Multiplexer from four registers and one
output to the common bus.
5. In the above diagram, four registers and four multiplexers, each register of 4 bits,
numbering from 0 to 3. There are two select lines, S0 and S1

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1. Find the size of the memory if
its address consists of 22 bits.
Assume the memory is 2-byte
addressable.
Solution -
If the given address consists of ‘k’ bits, then 2k locations are possible.
Size of memory = 2k x Size of one location.
According to the question, number of locations with 22 bits = 222 locations
Given that the size of the memory is 2-bytes addressable, which means that
the size of one location is 2 bytes.
Hence, the size of memory = 222 x 2 bytes = 223 bytes = 8 MB.

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2. Calculate the number of address
bits, if the memory has a size of 16
GB. Assume the memory is 4-byte
addressable.
Solution -
If the given address consists of ‘k’ bits, then 2k locations are possible.
Size of memory = 2k x Size of one location.
Given that the size of memory is 16 GB. (16 GB = 234 B)
2k x 4 = 234
2k = 234 / 22 (∵ 22 = 4)
2k = 232
∴ k = 32 bits

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3. Consider a machine with 32 bit logical
addresses, 4 KB page size and page table entries
of 4 bytes each. Find the size of the page table in
bytes. Assume the memory is byte addressable.
Solution -
Given – No. of bits = 32 bits
Page Size = 4 KB = 4 x 210 bytes
Page table entry size = 4 bytes
Size of page table = Number of entries in page table x Page table entry size
Number of entries in page table = Process size / Page size
Process Size = Number of address bits
Thus, Process size = 232 bytes = 230 x 22 bytes = 4 GB
Number of entries in page table = 4 x 230 / 4 x 210 = 220 pages
Size of page table = 220 x 4 = 4 MB

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4. Consider a system with page table entries of 8
bytes each. If the size of the page table is 256
bytes, what is the number of entries in the page
table?
Solution -
Size of page table = Number of entries in the page table x page table entry
size
Given - Size of page table = 256 bytes, page table entry size = 8 bytes.
Thus, 256 = number of entries in page table x 8
Number of entries in the page table = 256 / 8 = 32 = 25

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