Computer Organization

Subject Code- CSE30136

Semester-4th Sem Department: CSE

Manas Ranjan Mishra

Assistant Professor
C.V. Raman Global University
Bhubaneswar, Odisha
 Vision & Mission
Vision of the C. V. Raman Global University: To emerge as a global leader in the arena of technical
education commensurate with the dynamic global scenario for the benefit of mankind.
Vision of the Department of CSE : To become a leader in providing high quality education and research
in the area of Computer Science, Information Technology, and allied areas.
Mission of C.V. Raman Global University :
 To provide state-of-art
technical education in the undergraduate and postgraduate levels;
To work collaboratively with technical Institutes / Universities / Industries of National and
International repute;
 To keep abreast with latest technological advancements;
 To enhance the Research and Development activities.
Mission of the Department of CSE:
M1: To develop human resource with sound theoretical and practical knowledge in the discipline of
Computer Science & Engineering.
M2: To work in groups for Research, Projects, and Co-Curricular activities involving modern methods,
tools and technology.
M3: To collaborate and interact with professionals from industry, academia, professional societies,
community groups for enhancement of quality of education.
 Program Outcome (PO)
• Engineering knowledge: Apply the knowledge of mathematics, science, engineering fundamentals, and an
engineering specialization for the solution of complex engineering problems.
• Problem analysis: Identify, formulate, research literature, and analyze complex engineering problems
reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering
sciences.
• Design/development of solutions: Design solutions for complex engineering problems and design system
components Or processes that meet the specified needs with appropriate consideration for public health
and safety, and cultural, societal, and environmental considerations.
• Conduct investigations of complex problems: Use research-based knowledge and research methods
including design of experiments, analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
• Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern engineering
and IT tools, including prediction and modeling to complex engineering activities, with an understanding of
the limitations.
• The engineer and society: Apply reasoning informed by the contextual knowledge to assess societal,
health, safety, legal, and cultural issues and the consequent responsibilities relevant to the professional
engineering practice.
 Program Outcome (PO)
• Environment and sustainability: Understand the impact of the professional engineering solutions in
societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable
development.
• Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the
engineering practice. Individual and team work: Function effectively as an individual, and as a
member or leader in diverse teams, and in multidisciplinary settings.
• Communication: Communicate effectively on complex engineering activities with the engineering
community and with the society at large, such as, being able to comprehend and write effective reports
and design documentation, make effective presentations, and give and receive clear instructions.
• Project management and finance: Demonstrate knowledge and understanding of the engineering and
management principles and apply these to one’s own work, as a member and leader in a team, to manage
projects and in multidisciplinary environments.
• Life-long learning: Recognize the need for, and have the preparation and ability to engage in independent
and life- long learning in the broadest context of technological change.
 Program Educational Objective (PEO)
• PEO1-To provide the fundamental knowledge in mathematics, science and engineering concepts for the
development of engineering system (Fundamental Knowledge).

• PEO2-To apply current industry accepted computing practices and emerging technologies to analyze,
design, implement, test and verify high quality computing systems and computer based solutions to real
world problems (Design and development).

• PEO3- To enable the use of appropriate skill sets and its applications towards social impacts of computing
technologies in the career related activities (Skill Set) and to produce Efficient team leaders, effective
communicators and capable of working in multi-disciplinary environment following ethical
values(Communication).

• PEO4- To practice professionally and ethically in various positions of industry or government and/or succeed
in graduate (Professionalism) with lifelong learning and to make substantial contributions to the society
(Societal Contribution)
 Course Outcome (CO)

CO1: Identify and analyze the basic structures of a computer hardware units, connectivity and software.

CO2: Design the basic structure of machine instruction and programs, memory location.

CO3: Analyze different memory in the hierarchy, their mapping and their performance.

CO4: Analyze internal details of a processor, how instructions are executed using different hardware units, and
how control unit controls all hardware components.

CO5: Study the design of ALU for arithmetic operations and use of registers.

CO6: Analyze the organization of secondary storage and how all the I/O devices communicate with CPU and
transfer data.
Course Syllabus

Unit 1: Structure of a Computer System

Unit 2: Memory Organization

Unit 3: Process and Control Unit

Unit 4: Computer Arithmetic

Unit 5: Secondary Storage and I/O

Text Books
• “Computer Organization”, C. Hamacher, V. Zvonko, S. Zaky, Tata McGraw Hill Publication, ISBN 007-
120411-, 5th Edition.
• “Computer System Architecture”, M. Morris Mano, Pearson Education, ISBN-978-81-317-0070-9, 3rd
Edition.

Reference Books
• “Computer Architecture and Parallel Processing”, Hwang and Briggs, Tata McGraw Hill
Publication, ISBN 13: 9780070315563.
• “Structured Computer Organization”, A. Tanenbaum, Prentice Hall Publication, ISBN 81–203–
1553–7, 4th Edition.

Website References
• https://nptel.ac.in/courses/106106092/
• https://www.tutorialspoint.com/computer_organization/index.asp
• https://www.geeksforgeeks.org/computer-organization-and-architecture-tutorials/
• https://www.javatpoint.com/computer-organization-and-architecture-tutorial

Mode of Teaching: Presentation & Marker – White Board

Unit 1 (Topics to be covered):
Organization & Architecture CPU Architecture

Structure & Function Register Organization

Brief History of computers Instruction types

Von Neumann Architecture Types of operands

Bus Structure Instruction formats

Elements of Bus Design Addressing modes and Address translation

Instruction cycles

RISC and CISC Processors

Pipelining, Pipelining Hazards

Superscalar Processors, Performance consideration

Self Study :

Single core vs Multicore processor organization

PCI Bus

Basic multiprocessor architecture

Lecture 1

Contents
• Organization and Architecture

• Structure & Function

• Brief History of Computers

• Von Neumann Architecture

Organization and Architecture
• Computer architecture is a science for designing a computer system. The aim of a
computer architect is to design a high performance system at a reasonable cost,
fulfilling all other requirements.

• A computer’s architecture provides various attributes to the computer system which

are needed by a machine language programmer or a system software designer to
develop a program.

• It is a conceptual model providing the following information:

 Instruction set  I/O space allocation (I/O map)

 Instruction format  Interrupts assignment and priority
 Operation codes  DMA channels assignment and priority
 Operand types  I/O techniques used for various devices
 Operand addressing modes  I/O controller command formats
 Registers  I/O controller status formats
 Main memory space utilization (memory map)
Organization and Architecture
• Thus, Computer architecture is a functional description of requirements and design implementation
for the various parts of computer.

 It deals with functional behavior of computer system.

 Architecture describes what the computer does.

• The computer architectural aspects needed for a machine language programmer is given below:

Computer architecture for a programmer

Organization and Architecture (contd..)

• Computer organization gives an in-depth picture of its functional structure and

logical interconnections between the different units (functional blocks).

• Usually it includes the details of the hardware. Two computers with same
architecture can have different organization.

• Similarly, two computers having same organization may differ in their architecture.

• While designing a computer, its architecture is fixed first and then its organization is
decided.
Computer Organization and Functional Units

• Modern computer is a computer system consisting of

hardware and software. The hardware has five different
types of functional units : memory, arithmetic and logic
unit (ALU), control unit, input unit and output unit.
• The program and data are entered into the computer
through the input unit. The memory stores the program
and data. The control unit fetches and analyzes the
instructions one-by-one and issues control signals to all
other units to perform various operations.
• The ALU is capable of performing several arithmetic and
logical operations.
• For a given instruction, the exact set of operations
required is indicated by the control signals. The results of
the instructions are stored in memory. They are taken out Functional units in computer
of the computer through the output unit.
Computer Organization and Functional Units

Input Unit
• Computers accept coded information through input units. The most common input
device is the keyboard.
• Whenever a key is pressed, the corresponding letter or digit is automatically translated
into its corresponding binary code and transmitted to the processor.

Output Unit
• The output unit is the counterpart of the input unit. Its function is to send processed
results to the outside world.
• Some units, such as graphic displays, provide both an output function, showing text and
graphics, and an input function, through touchscreen capability.
• The dual role of such units is the reason for using the single name input/output (I/O)
unit in many cases.
Computer Organization and Functional Units

Several input units and output units are shown below:

Computer Organization and Functional Units

Peripheral devices and functions

Computer Organization and Functional Units
Input/Output Techniques
• Input and output devices help us to give/take the program, data, and results to/from the computer.
When an input operation is performed, we move information from an input device to memory (or
CPU).
• Similarly, an output operation moves information from memory (or CPU) to an output device. An
I/O routine (a program) takes care of input/ output operations. It interacts with the device controller
to perform information transfer (input/output).
• An I/O routine can follow three different methods for performing data transfer as shown in Fig. (a).
In software methods, the I/O routine transfers every piece (byte) of data, through the CPU, in two
steps as shown in Fig. (b).

(a) Methods of data transfer (b) Principles of data transfer

Computer Organization and Functional Units
Input/Output Techniques

 An IN or OUT instruction is used for transfer of data between CPU and a device.

 Data transfers from high speed devices such as hard disk and floppy disk is difficult to handle by programmed mode
or interrupt mode since transfer rate of these modes is slower than the rate at which data is coming from these
devices.

 Hence, DMA mode is essential for high speed devices.

 Slow speed devices can be handled by programmed mode or interrupt mode. Interrupt mode is ideal for very slow
speed devices so that CPU time is not wasted in waiting for device readiness between successive bytes transfer.
Computer Organization and Functional Units (contd..)
(ALU) and Control Unit :
• The ALU and control unit have usually some temporary storage units known as
registers.
• Each register can be considered as a fast memory with single location.
• Such registers temporarily store certain information such as instruction, data, address,
etc.
• Storing in registers is advantageous since these can be read quickly compared to
fetching them from external memory.
• The ALU and control unit are together known as Central Processing Unit (CPU) or
processor.
• The memory and CPU consist of electronic circuits and form the nucleus of the
computer.
• The input and output units are electromechanical units consisting of both electronic
circuits and mechanical assemblies.
• The input and output units are known as peripheral devices.
Computer Organization and Functional Units (contd..)
Arithmetic and Log Unit (ALU):
• Most computer operations are executed in the arithmetic and logic unit (ALU) of the
processor.
• Any arithmetic or logic operation, such as addition, subtraction, multiplication, division,
or comparison of numbers, is initiated by bringing the required operands into the
processor, where the operation is performed by the ALU.
• For example, if two numbers located in the memory are to be added, they are brought
into the processor, and the addition is carried out by the ALU.
• The sum may then be stored in the memory or retained in the processor for immediate
use.
• When operands are brought into the processor, they are stored in high-speed storage
elements called registers. Each register can store one word of data.
• Access times to registers are even shorter than access times to the cache unit on the
processor chip.
Computer Organization and Functional Units (contd..)

Control Unit :
• The memory, arithmetic and logic, and I/O units store and process information and perform input and
output operations. The operation of these units must be coordinated in some way.

• This is the responsibility of the control unit. The control unit is effectively the nerve center that sends
control signals to other units and senses their states.

• I/O transfers, consisting of input and output operations, are controlled by program instructions that
identify the devices involved and the information to be transferred. Control circuits are responsible for
generating the timing signals that govern the transfers and determine when a given action is to take
place. Data transfers between the processor and the memory are also managed by the control unit
through timing signals.
Computer Organization and Functional Units (contd..)

Control Unit :
• It is reasonable to think of a control unit as a well-defined, physically separate unit that
interacts with other parts of the computer. In practice, however, this is seldom the case.
Much of the control circuitry is physically distributed throughout the computer.

• A large set of control lines (wires) carries the signals used for timing and
synchronization of events in all units.

• The operation of a computer can be summarized as follows:

 The computer accepts information in the form of programs and data through an input unit and
stores it in the memory.
 Information stored in the memory is fetched under program control into an arithmetic and logic
unit, where it is processed.
 Processed information leaves the computer through an output unit.
 All activities in the computer are directed by the control unit.
Computer Organization and Functional Units (contd..)

Stored Program Concept:

All modern computers use the stored program concept which was initially conceived by
the design team of ISA computer led by Von Neumann. Hence, it is commonly known as
Von Neumann concept. The essentials of stored program concept are as follows:
• The computer has five different types of units: memory, ALU, control unit, input unit
and output unit.
• The program and data are stored in a common memory.
• Once a program is in memory, the computer can execute it automatically without
manual intervention.
• The control unit fetches and executes the instructions in sequence one by one.
• This sequential execution can be modified by certain type of instructions.
• An instruction can modify the contents of any location in memory.
• Hence, a program can modify itself; instruction–execution sequence also can be
modified.
Computer Organization and Functional Units (contd..)

Main Memory and Auxiliary Memory:

• The memory from which the CPU fetches the instructions is
known as main memory or
• primary memory.
• Hence, to run a program, it has to be brought into the main
memory.
• The auxiliary memory is external to system nucleus and it can
store large amount of programs and data.
• The CPU does not fetch instructions of a program in the
auxiliary memory.
• Several programs are stored in an auxiliary memory and the
program that should be executed is brought into the main
memory. Auxiliary storage
• The auxiliary memory is cheaper compared to main memory
and hence a computer generally has limited amount of main
memory and large amount of auxiliary memory. The auxiliary
memory is also known as secondary storage.
Computer Organization and Functional Units (contd..)
Auxiliary Memory types :

Auxiliary
Memory Pen Drive
Floppy (Flash
Disk Memory)

Hard Magnetic
Disk Type
Optical
Disk
These are connected to the computer as
DVD Input–Output (I/O) devices.
CD
Computer Organization and Functional Units (contd..)
Device Controller :
• A peripheral device is linked to the system nucleus (CPU and memory) by a device
controller, also known as I/O controller.

• The main function of a device controller is transfer of information (program and data) between the system nucleus and
the device. Physically, a device controller can exist in three different forms: as a separate unit, as integrated with the
device, as integrated with CPU.

A basic device controller has five sections :

Device interface and system

Computer Organization and Functional Units (contd..)
Device Controller :
• It communicates with a device through the device interface that carries the signals
between a device controller and a device.
• All device controllers communicate with CPU or memory through the system interface
• The system interface is identical to all device controllers.

Device interface and system Common system interface

interface
• The command register stores the command given by the software. The data buffer
temporarily stores the data being transferred with the device.
• The status register stores the status of the device and controller. It is read by the
software.
Computer Organization and Functional Units (contd..)
Device Interface Signals :
• There are three types of signals between a device and a device controller: data,
control signals and status signals. The control signals are issued by the device
controller demanding certain actions by the device.
For example, the RESET signal asks the device to
get reset, i.e., clear the internal condition inside
the device. The status signals are sent by the I/O
device reporting certain internal conditions
(status) to the device controller. For example, the
ERROR signal reports that there is an error in the device.

Device interface signals

The data signals may be sent either serially on one wire, bit-by-bit Serial interface
or in parallel, on eight wires, carrying all eight bits of a byte
simultaneously.

Parallel interface
Computer Organization and Functional Units (contd..)

I/O Drivers:

 An I/O driver for a device consists of routines for performing various operations: read, write
etc. Each routine gives appropriate commands to the I/O controller and the device
controller issues necessary control signals to the device.

To support a device in a system, three items are required:

• A device controller which logically interfaces the device to the system nucleus.
• A device interface cable which physically connects the device to the device controller.
• An I/O driver.

 An I/O driver (device driver) is a collection of I/O routines for various operations for a specific
I/O device. It takes care of issuing commands to a device controller, verifying the status of the
device controller and device and handling input/output operations.

 The operating system and other programs use the device driver routines for doing I/O
operations.
 The I/O driver is a system program which can be asked by any other program to ‘serve’.
 The I/O drivers of all the I/O devices are collectively known as BIOS.
Computer Organization and Functional Units (contd..)
Main Memory:
 The function of the memory unit is to store programs and data. There are two classes of
storage, called primary and secondary.

• Primary memory, also called main

memory, is a fast memory that operates Each location in memory is identified by a unique address.
at electronic speeds. Programs must be
stored in this memory while they are being
executed.
• The memory stores instructions, data and results of
the current program being executed by the CPU.
• It is called program memory since the CPU fetches
instructions only from this memory. The main
memory is functionally organized as a number of
locations.
• Each location stores a fixed number of bits. The term
word length of a memory indicates the number of
bits in each location.
• The total capacity of a memory is the number of
locations multiplied by the word length.
Computer Organization and Functional Units (contd..)
Main Memory:
 The function of the memory unit is to store programs and data. There are two classes of
storage, called primary and secondary.

• Primary memory, also called main Two different memories with the same capacity
memory, is a fast memory that operates may have different organization as illustrated
at electronic speeds. Programs must be below. Both have same capacity of 4 kilo bytes but
stored in this memory while they are being they differ in their internal organizations.
executed.
• The memory stores instructions, data and results of
the current program being executed by the CPU.
• It is called program memory since the CPU fetches
instructions only from this memory. The main
memory is functionally organized as a number of
locations.
• Each location stores a fixed number of bits. The term
word length of a memory indicates the number of
bits in each location.
• The total capacity of a memory is the number of
locations multiplied by the word length. Memory capacity and organization
Computer Organization and Functional Units (contd..)
Random Access Memory (RAM):
• Instructions and data can be written into or read from the memory under the control of the
processor. It is essential to be able to access any word location in the memory as quickly as
possible.

• A memory in which any location can be accessed in a short and fixed amount time after
specifying its address is called a random-access memory (RAM).

• The time required to access one word is called the memory access time. This time is
independent of the location of the word being accessed.

• It typically ranges from a few nanoseconds (ns) to about 100 ns for current RAM units.
Read Only Memory (ROM):
• In a modern computer, usually a small part of the main memory is a Read Only Memory
(ROM).

• The CPU can read from the ROM but cannot write into it.

• Generally, some permanently required control programs and BIOS are stored in ROM by the
manufacturer.
Computer Organization and Functional Units (contd..)

Cache Memory:
• As an adjunct to the main memory, a smaller, faster RAM unit, called a cache,
is used to hold sections of a program that are currently being executed,
along with any associated data.
• The cache is tightly coupled with the processor and is usually contained on
the same integrated-circuit chip. The purpose of the cache is to facilitate
high instruction execution rates.
• At the start of program execution, the cache is empty.
• All program instructions and any required data are stored in the main
memory.
• As execution proceeds, instructions are fetched into the processor chip, and
a copy of each is placed in the cache.
• Now, suppose a number of instructions are executed repeatedly as happens
in a program loop. If these instructions are available in the cache, they can
be fetched quickly during the period of repeated use.
• Similarly, if the same data locations are accessed repeatedly while copies of
their contents are available in the cache, they can be fetched quickly.
Bus Structure
Bus Concept :
• Connecting paths are necessary inside a computer for carrying following
types of information between the subsystems (CPU, memory, and I/O
controllers):

1. Instruction from memory to CPU.

2. Data from memory to CPU.
3. Data from CPU to memory.
4. Memory Address from CPU to memory.
5. Port Address from CPU to I/O controllers.
6. Command from CPU to I/O controllers. Non-bus communication
7. Status from I/O controllers to CPU.
• In mainframe computers, there is a separate path from each source register to each destination register for
connecting the source and destination. Every source is directly connected to every destination.
• This results in huge cost since, there are lot of wires and driver/receiver circuits. In mini computers and
microcomputers, bus concept is used for inter connection of signals between the subsystems in a computer.
• The bus is a shared common path for several sources and destinations.
• A single wire carries a signal to multiple units. However, at any instant only two units are logically linked: one source
and one destination. The other units are logically disabled though physically connected.
Bus Structure
Bus Concept :
• Suppose the CPU sends an eight bit data to floppy disk controller.
• The eight bits are sent on eight lines. Each line is common to all controllers
and all of them receive the data pattern.
• Thus, each data bit is a bus and we have eight buses for data. In other words
the width of the data bus is 8-bits.
• Though all controllers receive the data, only one controller is logically
connected to the CPU. The other controllers do not use the data.
• The main advantage of bus is reducing cost of connecting paths (wires) and
associated driver/receiver circuits.
• The disadvantage of bus is low speed since the bus is shared. At any time,
only two units can communicate. Any other unit wanting to communicate has
to wait.

Bus concept
Bus Organization :
Bus Concept :

A bus is a group of wires/lines/tracks carrying

signals common to several hardware units.

The signals are divided into three different

types as illustrated in Figure :

(a) Address bus signals

(b) Data bus signals
(c) Control bus signals

Bus concept
Bus Organization :
Bus Concept :

Address Bus
The address bus is used for two different
purposes as follows:
(a) To carry memory address, while reading
from or writing into memory.
(b) To carry I/O port address or device
address, while sending/reading data to/from
I/O port.
In early microprocessors, the address bus is
uni-directional since only the CPU can send
address and other units cannot address the
microprocessor. The advanced
microprocessors that have on-chip cache
memory have bi-directional address bus, for
cache memory invalidation.
In addition to processor, the DMA controller
can send memory address, during its bus
cycle, for data transfer between memory and Bus concept
an I/O controller.
Bus Organization :
Bus Concept :

Data Bus :

The data bus is a bi-directional bus and is used for the following tasks:
(a) To fetch instruction from memory.
(b) To fetch operand (of an instruction) from memory.
(c) To store the result (of an instruction) into memory.
(d) To send a command to an I/O device controller (or port).
(e) To read the status from an I/O device controller (or port).
(f) To read data from a device controller (or port).
(g) To issue data to a device controller (or port).

• During a bus cycle, if the CPU is the bus master, the CPU either places data on
data bus or takes data from data bus.
• Though the DMA controller also can become a bus master, it can neither supply
data to data bus nor receive data from data bus.
• It can only direct the memory and an I/O controller to supply/receive data.
However, during CPU's bus cycle, the DMA controller can interact with data bus, if
it is addressed by the CPU.
Bus Organization :
Bus Concept :

Control Bus :
The different control signals in a bus are shown in Figure and are briefly explained :

(a) Memory Read

This signal is issued by the CPU (or DMA controller)
when performing a read operation with the
memory. It is an input signal to the memory.
The memory reads out the data, from the location
whose address is present on the address bus.
(b) Memory Write
This signal is issued by the CPU (or DMA controller)
when performing a write operation with the
memory. It is an input signal to the memory.
The memory stores the data in the location whose
address is present on the address bus.
Bus Organization :
Bus Concept :

Control Bus :
The different control signals in a bus are shown in Figure and are briefly explained :

(c) I/O Read

This signal is issued by the CPU when it is reading
from an input port. The input port addressed by
the CPU places its data on the data bus.
The DMA controller uses I/O read signal to
command an I/O controller to place data on data
bus during a DMA cycle for data transfer.

(d) I/O Write

This signal is issued by the CPU when writing into
an output port. The output port addressed by the
CPU receives the data from the data bus. The DMA
controller uses I/O write signal to command an I/O
controller to accept data from data bus during
a DMA cycle for data transfer.
Bus Organization :
Bus Concept :

Control Bus :
The different control signals in a bus are shown in Figure and are briefly explained :

(e) Ready
The ready is an input signal to the CPU, generated in order
to synchronize the slow memory or I/O ports with the fast
CPU.
For instance, when the CPU is reading from a relatively slow
memory, the READY signal is used to “freeze” the CPU till
the memory completes the read operation as shown in Fig. Synchronization between a fast
In other words, delay is introduced in the bus cycle (in CPU and a slow memory
memory read sequence) by indicating that the
memory data is not yet ready.
(f) Other Signals
Various other signals such as Interrupt Requests and DMA Requests are also considered as control
signals
Bus Cycle :

• In a bus based computer, communication between the CPU and other subsystems take
place on the bus.

• A clearly defined protocol is followed on the bus so that there is no interference from
other subsystems when the CPU is communicating with any one subsystem.

• Normally, the CPU can initiate a communication sequence whenever it wants.

• A sequence of events, performed on the bus, for transfer of one byte (or word), through
the data bus, is called a bus cycle. There are four major types of bus cycles:
 Memory read bus cycle: CPU reads from a memory location;
 Memory write bus cycle: CPU writes data into a memory location;
 I/O Read bus cycle: CPU reads (accepts) data from an input port;
 I/O Write bus cycle: CPU writes (sends) data to an output port.
Bus Cycle :
• An instruction cycle may involve multiple bus cycles of different types. Fetching of an
instruction involves memory read bus cycle. Storing a result in memory, needs memory
write bus cycle.
• Fetching operands involve memory read bus cycles. An IN or OUT instruction execution
involves I/O read bus cycle or I/O write bus cycle.
• The CPU starts a bus cycle by sending the address (of memory or port) on the address bus.
• All the subsystems connected to the bus decode this address. Only the addressed subsystem
will get logically connected to the bus and others do not interfere.
• The CPU indicates the type of bus cycle by sending the appropriate control signal (memory
read, memory write, I/O read, I/O write) on the control bus.
• In a given bus cycle, the CPU sends one control signal which distinctly identifies the type of
bus cycle. Memory responds to memory read or memory write whereas I/O ports respond
to I/O read or I/O write.
• During output bus cycles, CPU puts data on the data bus and the addressed subsystem
takes it. During input bus cycles, the addressed subsystem puts data on data bus and the
CPU takes (reads) it.
 History of Computers
• The present day computer is the result of combined efforts of several scientists over
the past 60–70 years. Early developments in computers were achieved at Universities
working on Government funded projects.

• The requirement of high speed calculations by United States military contributed to

many significant inventions in the early days whereas most of the developments in
recent years are by private industry. The history of computers is covered by three
distinct types of computers: Mechanical computers, Electro-mechanical computers and
Electronic computers.

• The
Early electronic computers are further grouped into different Computer Generations.
Calculators/Computers
Abacus
• The abacus is a mechanical device used for counting. The mathematical
operations such as addition, subtraction, division and multiplication can be
performed on a standard abacus.
• The abacus is nearly 2000 years old. It is still being used by Chinese merchants. It
is useful for teaching simple mathematics to children.
• The abacus has a wooden frame with vertical rods on which wooden beads slide.
Arithmetic problems are solved when these beads move around (with the fingers)
according to programming rules.
• Beads are considered counted, when moved towards the beam that separates the
two decks: upper deck and lower deck. Each bead in the upper deck has a value of
five; and each bead in the lower deck has a value of one.
 History of Computers
Early Calculators/Computers
Mechanical Computers/Calculators
• Mechanical calculators were based on simple parts such as gears and levers. The French
philosopher Blaise Pascal built the first digital computer in 1642.
• It performed addition and subtraction of decimal numbers. In Germany, Gottfried Wilhelm von
Leibniz invented a computer that could add, subtract, multiply and divide. Leibniz designed a
stepped gear mechanism for introducing the addend digits.
• A sophisticated calculator was designed by Charles Xavier Thomas. It could add, subtract,
multiply, and divide. This was followed by models with a range of improved capabilities such as
accumulation of partial results, storage and automatic re-entry of previous results and printing of
the results.
Punched Cards
• The development of punched cards by Herman Hollerith and James Powers was a significant
contribution to development of computers.
• They introduced offline equipments to read punched information (holes) on the cards. This
facilitated faster input of the data and the program. Also, the decks of cards were used as offline
secondary storage. International Business Machines (IBM), Remington , Burroughs, and other
companies introduced punch card systems with electromechanical devices.
 History of Computers
Computer Generations and Evolution
• The evolution of the computer over
the period of time has resulted in
development of various generations.
Different technologies have been
used for manufacturing the
computer hardware.
• Based on the component
technology, the computer is
classified into five generations.
Though, the main basis for the
classification is the component
technology, each new generation of
computers has a different
architectural structure as compared
to the earlier generation.

• The study of these aspects, helps

one to distinguish between the past
History of Computers
First Generation Computers
The following computers are significant milestones of first generation computers:
1. Electronic Numeric Indicator and Computer (ENIAC)
2. IAS
3. UNIVAC I
4. IBM 701

The main contributions of first generation computers are listed below:

1. Use of vacuum tubes for processing and storage

2. Common high speed memory for program and data
3. Use of fast main memory and slow secondary memory
4. Use of input–output instructions
5. Introduction of ferrite core memory
6. Introduction of assembly language to avoid tedious machine language programming
7. Use of electromechanical magnetic drum as secondary memory
8. Use of registers for storing operands and results of instructions inside CPU
9. Use of peripheral devices such as magnetic tape, magnetic drum, paper tape and card
punch
10. Use of interrupt concept
 History of Computers
Operation of First Generation Computers
• The first generation computers were pure hardware machines.
• They did not have operating system.
• Programming was done in the machine language which differs from one type of computer to
another. The user deals with several switches in the front panel to start, run or halt the computer.
• The internal status of the computer is displayed on several lights on the front panel. Invariably
only a designer or programmer could operate the computer due to the complexities involved.
(i) ENIAC
• It was developed at the University of Pennyslvania to handle the ballistic tables for the U.S. Army.
• It was a decimal computer with a set of accumulators. It was thousand times faster than the relay
computers.
• Programming the ENIAC was tedious task as it involved manual setting-up of switches and cables.
• To input a program, several hours of manual work was needed. The ENIAC was the first popular
electronic computer.
The difficulties faced in programming ENIAC led to the birth of stored program concept.
In 1945, John Von Neumann, who was a consultant to the ENIAC presented a new project called the
Electronic
Discrete variable Computer (EDVAC).
ENIAC multiplied two decimal numbers by reading the product from the multiplication table in
memory. ENIAC is commonly accepted as the first successful high speed Electronic Digital Computer
History of Computers
(ii) EDVAC AND STORED PROGRAM CONCEPT
The basic principle was that a computer should have a very simple, fixed physical structure, and be
able to execute any kind of computation by means of a proper programmed control without
modifying the unit. The EDVAC has the first stored program concept, that has three main principles:

1. Program and data can be stored in memory.

2. The computer executes the program in sequence as directed by the instructions in
the program.
3. A program can modify itself when the computer executes the program.

The EDVAC was a binary computer with 1-bit adder. It had a two tier memory hierarchy:
1. A fast main memory of 1 K words.
2. A slow secondary memory of 20 K words.

The instruction format used three addresses:

1. Two addresses for operand storage.
2. One address for result storage.
3. One address for indicating next instruction address.

ENIAC supported the conditional branching instruction in which two way branching is specified by
the third and fourth addresses. It also had input–output instruction to perform data transfer. The
bit-by-bit processing was slow but it reduced the hardware cost.
 History of Computers
(iii) IAS Computer (Von Neumann Machine)
The IAS computer was developed at the Princeton Institute for advanced studies. It is the basic
model for the stored-program concept which is followed in almost all subsequent computers.
The project team was led by Von Neumann.
In the IAS computer, the instruction has two fields, opcode and address, as shown in Fig below.

IAS instruction
• A memory word stores two such instructions. During instruction fetch, two instructions are
fetched from the memory in one access.
• The instruction set has five types of instructions: Arithmetic, Data transfer, Unconditional branch,
Conditional branch and Instruction address modify.
• The registers AC and MQ are directly addressable by instructions. The accumulator (AC) is a
general purpose register whereas the MQ is special purpose register.
• The AC is used in most of the arithmetic and data transfer instructions since the AC contents
plays a source, a destination or both in these instructions. The multiplier quotient (MQ) holds one
operand (multiplier) for a multiply instruction and the remainder for a divide instruction.
• The program counter (PC) is incremented by 1 after every instruction fetch. Since two consecutive instructions are
fetched simultaneously, the IR and IBR are used to store the current and next instructions, respectively.
 History of Computers
(iii) IAS Computer (Von Neumann Machine)

Advantages of IAS computer are as follows:

1. The IAS computer is a single address machine. The short instruction length results in reduced
program size and hence, main memory requirements. This leads to reduction in system price.

2. During instruction fetch, simultaneously, two instructions are brought from the memory. Thus, one
instruction is always pre-fetched. This reduces access time for the second instruction, thus speeding
up the instruction cycle time.

3. The use of ‘address modify’ instruction results in changing the address field of another instruction
in the memory. Thus, a program can modify itself during runtime. This dynamic change is a powerful
feature, resulting in the efficient programming.

Limitations of IAS computer are as follows:

1. The IAS computer was weak in performing I/O operations. The input or output instruction results
in transferring of data between the input device and memory or between the memory and
output device. In both cases, the data had to pass through DPU, since there is no ‘direct memory
access’ between memory and I/O subsystems.

2. The IAS computer did not have ‘CALL’ and ‘RETURN’ type of instructions. Hence, subroutine
facility was not possible.
 History of Computers
(iii) IAS Computer (Von Neumann Machine)

Advantages of IAS computer are as follows:

1. The IAS computer is a single address machine. The short instruction length results in reduced
program size and hence, main memory requirements. This leads to reduction in system price.

2. During instruction fetch, simultaneously, two instructions are brought from the memory. Thus, one
instruction is always pre-fetched. This reduces access time for the second instruction, thus speeding
up the instruction cycle time.

3. The use of ‘address modify’ instruction results in changing the address field of another instruction
in the memory. Thus, a program can modify itself during runtime. This dynamic change is a powerful
feature, resulting in the efficient programming.

Limitations of IAS computer are as follows:

1. The IAS computer was weak in performing I/O operations. The input or output instruction results
in transferring of data between the input device and memory or between the memory and
output device. In both cases, the data had to pass through DPU, since there is no ‘direct memory
access’ between memory and I/O subsystems.

2. The IAS computer did not have ‘CALL’ and ‘RETURN’ type of instructions. Hence, subroutine
facility was not possible.
History of Computers
(iii) Beyond IAS Computer

• Universal Automatic Computer (UNIVAC I) was developed by Eckert–Mauchy Corporation. It was suitable
for both scientific and commercial applications.
• This was soon followed by UNIVAC II which offered higher performance and had higher memory capacity.
• Subsequently, UNIVAC 1100 series of computers with compatibility between the various models was
released.
• International Business Machines (IBM) manufactured the IBM 701, its first electronic stored program
computer, in 1953. It was designed for scientific applications.
• Soon IBM 702, a system designed for commercial applications was introduced. UNIVAC series and IBM
series were two successful family of computers for a very long time.
 History of Computers
econd Generation Computers

• Invention of Transistor by Bell Labs was a boon to second generation computers.

• It was smaller in size and also consumed less power.
• Several companies such as IBM, NCR, RCA etc. quickly introduced transistor technology which
also improved reliability of computers.
• Instead of wiring circuits, photo printing was used to build Printed Circuit Boards (PCB). This
modularized the computer hardware into a set of easily replaceable functional circuit boards.
• Both computer production and maintenance of computers became easier. The use of high level
programming language is another major improvement in the field of second generation
computers.
• Computer manufacturers have also developed compilers for different programming languages
such as FORTRAN and COBOL.
• The second generation computers had a variety of peripheral devices such as console
typewriter, card reader, line printer, CRT display, graphic device etc.
• Newer application programs were available for accounting, payroll, inventory control, purchase
order generation, invoicing etc.
• Large organizations which installed computers also formed their own teams of programmers to
develop in-house programs.
• Application of the computers in newer places such as libraries and hospitals became popular.
History of Computers Feature of Second Generation Computers
 History of Computers
hird Generation Computers Table lists the various concepts and techniques used in
third generation computers. Birth of super computers
created interest among research community.
• Invention of Integrated Circuit (IC) chip is a
great event for electronics field giving rise to
microelectronics. IC has multiple advantages
over discrete components: smaller size,
higher speed, lower hardware cost,
improved reliability etc.
• Digital computer design became more
attractive and interesting. The use of
computers in a continuous processing and
manufacturing sectors such as petroleum
refining and electrical power distribution
became popular.
• The computer families by leading companies
such as IBM, UNIVAC, HP, ICL and DEC
dominated the computer industry.
Domination of minicomputers created more
job opportunities to computer professionals.
 History of Computers
ourth Generation Computers

• The LSI technology simplified the design of Table lists various concepts and techniques used in fourth
generation computers.
digital systems. Single-IC chip based
computers came to market. The invention of
microprocessor by INTEL gave birth to
microcomputers.
• Several semiconductor companies such as
Motorola, Fairchild, Texas Instruments and
Zilog manufactured microprocessors that
offer a fantastic range of capabilities.
Several small companies also produce
innovative computer design.
• Powerful workstations meant for specialized
application such as CAD, production
stations, test and repair jigs etc. were
manufactured in addition to general purpose
computers.
• Microcomputers slowly captured the market
of minicomputers.
 History of Computers

Fifth Generation Computers

Features of fifth generation computers

• The use of VLSI and artificial intelligence

concept is used in fifth generation
computers.
• Expert systems, pattern recognition, voice
recognition, signature capturing and
recognition,
• microprocessor controlled robots etc. are
some of the sophisticated developments in
the field of computers.
• This leads to the rapid growth of computer
professionals, trends and jargons in an
uncontrolled way.
Von Neumann Architecture

Fixed Program Computers – Their function is very specific and

they couldn’t be programmed, e.g. Calculators.

Stored Program Computers – These can be programmed to carry

out many different tasks, applications are stored on them.

*Harvard architecture:-
Comparison of Von Neumann Architecture with
Harvard Architecture
CPU Architecture:

assification of Instruction Set Architectures

The selection of an instruction set for a computer depends on the manner in which the
CPU is organized. Traditionally, there are three different CPU organizations with certain
specific instructions:

• Accumulator based CPU

• Registers based CPU
• Stack based CPU
CPU Architecture:
assification of Instruction Set Architectures
Accumulator based CPU
Initially, most computers had accumulator based CPUs. It is a simple CPU in which the accumulator
holds an operand for the instruction.
Similarly, the instruction leaves the result in the accumulator. The contents of the accumulator participate in the
arithmetic operations such as addition, subtraction etc. This is also known as one address machine.
The PDP-8, is the first minicomputer, which contains this type of CPU and is used for process control and laboratory
applications.

The advantages of accumulator based CPU are as follows:

• The accumulator contains an operand. Hence, there is no operand address field (for one operand) in the instruction. This
results in short instructions and less memory space. Due to the absence of the address field, these are known as zero
address instructions. Such CPUs normally have two types of instructions: zero address and single address. The single
address instructions have one operand in main memory and the other in the accumulator.

• Instruction cycle takes less time due to the absence of operand fetch.

The disadvantages of accumulator based CPU are as follows:

• Program size increases due to several instructions. Hence the memory size increases.
• Program execution time increases due to increase in the number of instructions.
CPU Architecture:
assification of Instruction Set Architectures
Accumulator based CPU
The advantages of accumulator based CPU are
as follows:
• The accumulator contains an operand. Hence,
there is no operand address field (for one operand)
in the instruction. This results in short instructions
and less memory space. Due to the absence of the
address field, these are known as zero address
instructions. Such CPUs normally have two types
of instructions: zero address and single address.
The single address instructions have one operand
in main memory and the other in the accumulator.
• Instruction cycle takes less time due to the
absence of operand fetch.

The disadvantages of accumulator based CPU

are as follows:
1. Program size increases due to several instructions.
Hence the memory size increases.
2. Program execution time increases due to increase
in the number of instructions.
CPU Architecture:
assification of Instruction Set Architectures
Registers based CPU
• In this type of CPU, multiple registers are
used as accumulator. In other words, there
are multiple accumulators.
• Such a CPU has a GPR organization. The use
of the registers result in short programs with
limited instructions. IBM System/360 and
PDP-11 are some of the typical examples.

• Comparing with example 3.1, it is observed that the registers based CPU (GPR architecture)
results in shorter program size than the accumulator based CPU.
• Also, the program for the accumulator based CPU requires a memory location for storing partial
result.
• Hence, additional memory accesses are needed during program execution.
• Thus, increase in the number of registers, increases CPU efficiency. But care should be taken to
avoid
• unnecessary usage of registers.
• Hence, compilers need to be more efficient in this aspect.
 CPU Architecture:
assification of Instruction Set Architectures

Stack based CPU

• The stack is a push down list with a Last In First Out (LIFO) access mechanism. It stores the operands.

• It is present either inside1 the CPU or a portion of the memory can be used as a stack. A register (or memory
location) is used to point to the address of the top vacant location of the stack.

• This register is known as the Stack Pointer (SP). When nothing is stored in the stack, the stack is empty and
the stack pointer points to the bottom of the stack.

• When an item is stored in the stack, it is called PUSH operation; the stack pointer is decremented. When the
stack is full, the stack pointer points to the top of the stack.

• When any item is removed from the stack (POP operation), the stack pointer is incremented.
• The item which is pushed into the stack last (recently) comes out first in the next POP operation. In a stack
based CPU, all operations by the CPU are done on the contents of a stack.

• Similarly, the result of an operation is stored in stack.

CPU Architecture:
assification of Instruction Set Architectures
Stack based CPU

• The stack is a push down list with a Last In First Out (LIFO) access mechanism. It
stores the operands.
• It is present either inside1 the CPU or a portion of the memory can be used as a
stack.
• A register (or memory location) is used to point to the address of the top vacant
location of the stack. This register is known as the Stack Pointer (SP). When nothing
is stored in the stack, the stack is empty and the stack pointer points to the bottom
of the stack.
• When an item is stored in the stack, it is called PUSH operation; the stack pointer is
decremented. When the stack is full, the stack pointer points to the top of the stack.
When any item is removed from the stack (POP operation), the stack pointer is
incremented.
• The item which is pushed into the stack last (recently) comes out first in the next
POP operation. In a stack based CPU, all operations by the CPU are done on the
contents of a stack.
• Similarly, the result of an operation is stored in stack. On executing an arithmetic
instruction such as ADD, the top operands are poped-off the stack. Burroughs B5000 Stack Concept
and HP 3000 are some examples of stack computers.
CPU Architecture:
assification of Instruction Set Architectures
Stack based CPU

Stack operation
CPU Architecture:
assification of Instruction Set Architectures
Stack based CPU

From the contents of stack, it is observed that the stack grows when some PUSH operation takes
place. When an arithmetic instruction is executed, the operands are removed from the stack and
the result occupies a position in the stack top.

Example 3.3 shows that the program size for the stack computer is more than for the registers
based CPU.

The advantages of the stack based CPU:

• Easy programming/high compiler efficiency
• Highly suited for block-structured languages
• Instructions don’t have address field; short instructions

The disadvantages of the stack based CPU:

• Additional hardware circuitry needed for stack implementation
• Increased program size
Computer Registers:
• Registers are a type of computer memory used to
quickly accept, store, and transfer data and
instructions that are being used immediately by
the CPU.

• The registers used by the CPU are often termed

as Processor registers.

• A processor register may hold an instruction, a

storage address, or any data (such as bit
sequence or individual characters).

• The computer needs processor registers for

manipulating data and a register for holding a
memory address.

• The register holding the memory location is used

to calculate the address of the next instruction
after the execution of the current instruction is
completed.

• Following figure shows the list of some of the

Computer Registers:
•The Memory unit has a capacity of 4096 words,
and each word contains 16 bits.
•The Data Register (DR) contains 16 bits which
hold the operand read from the memory location.
•The Memory Address Register (MAR) contains 12
bits which hold the address for the memory location.
•The Program Counter (PC) also contains 12 bits
which hold the address of the next instruction to be
read from memory after the current instruction is
executed.
•The Accumulator (AC) register is a general purpose
processing register.
•The instruction read from memory is placed in the
Instruction register (IR).
•The Temporary Register (TR) is used for holding
the temporary data during the processing.
•The Input Registers (IR) holds the input characters
given by the user.
•The Output Registers (OR) holds the output after
processing the input data.
Instruction Length:
•If the instruction is too long, it has following drawbacks:
•1. The instructions occupy more memory space; this increases the memory requirement.
•2. Either the data bus width has to be large or instruction fetch will take more time. The
•first condition increases hardware cost whereas, the other increases the instruction
•cycle time.
•If the instruction is too short, it has following drawbacks:
•1. There are too many instructions in the program. Hence, a lot of time is spent in
•fetching them.
•2. Program size increases. Hence memory requirement increases.

Instruction Format:
In computer organization, instruction formats refer to the way instructions are encoded and represented in machine
language. There are several types of instruction formats, including zero, one, two, and three-address instructions.

An instruction should provide four different information to CPU:

1. Operation to be done by the instruction.
2. Operands (data) on which operation has to be done.
3. Location (memory or register) where the result of the operation has to be stored.
4. Memory location from where the next instruction has to be fetched.
A theoretical instruction format specifying all the four items for an ADD instruction is
shown in Fig.
Instruction Format:
1. Operand specification : Instead of giving the operand in the instruction, its location in main
memory is identified in the instruction as operand address.
This has two advantages:
(a) The length of the operand address is shorter than the operand. Hence, it saves space in
instruction length.
(b) The programmer has flexibility in locating the operand in any of the following: main memory,
CPU registers, instruction, I/O port, etc.

2. Result address : Instead of storing the result in a separate location, it is generally stored in the first or second operand
address. This saves space in instruction length. The only disadvantage is that the initial operand is replaced by the result. The
programmer should be careful in handling this problem. If the operand is needed by the program for future instructions, its
copy should be retained in some other location so that it is not lost.

3. Next instruction address : In majority of the cases, the next instruction required is physically the next one after the current
instruction. This implies that dedicating a field for the next instruction address is wastage of space and inefficient use of
instruction length. Hence, it is assumed that the next required instruction is the physically next instruction.
However, a branch (jump) instruction is used wherever necessary. The branch instruction specifies the
address of the next instruction.

Address instruction
Instruction Format:
The format of ADD instruction as shown in Fig. below. incorporates the stated variations.
Some computers store the result in the first operand location whereas the others in the
second location. The control unit is designed accordingly.

Common format for AND instruction

Example: The instruction length and operand address field is 36 bits and 14 bits,
respectively. If two-operand instructions of 240 numbers are used, then how many one operand
instructions are possible?
Instruction length = 36 bits
A two-operand instruction needs 28 bits for the operand addresses (2 × 14). Hence,
opcode size = 36 – 28 = 8 bits
Total number of instructions possible = 256
Number of one-address instructions = 256 – 240 = 16
Instruction Format
Ex:- ADD
Ex:- ADD B
Ex:- ADD R1, B
Ex:- ADD R1, A, B
Instruction Format:
Zero Address Instructions
These instructions do not specify any operands or addresses. Instead, they operate on data
stored in registers or memory locations implicitly defined by the instruction. For example, a zero-
address instruction might simply add the contents of two registers together without specifying
the register names.
A stack-based computer does not use the address field in the instruction. To evaluate an
expression first it is converted to reverse Polish Notation i.e. Postfix Notation.
Instruction Format:
One Address Instructions
These instructions specify one operand or address,
which typically refers to a memory location or register.
The instruction operates on the contents of that
operand, and the result may be stored in the same or
a different location. For example, a one-address
instruction might load the contents of a memory
location into a register.
This uses an implied ACCUMULATOR register for data
manipulation. One operand is in the accumulator and
the other is in the register or memory location.
Implied means that the CPU already knows that one
operand is in the accumulator so there is no need to
All operations
specify it. are done between the accumulator(AC) register and a memory operand.
M[ ] is any memory location.
M[T] addresses a temporary memory location for storing the intermediate result.
This instruction format has only one operand field. This address field uses two special instructions
to perform data transfer, namely:
•LOAD: This is used to transfer the data to the accumulator.
•STORE: This is used to move the data from the accumulator to the memory.
Instruction Format:

Two Address Instructions

These instructions specify two operands or
addresses, which may be memory locations or
registers. The instruction operates on the contents
of both operands, and the result may be stored in
the same or a different location. For example, a
two-address instruction might add the contents of
two registers together and store the result in one
of the registers.
This is common in commercial computers. Here
two addresses can be specified in the instruction.
Unlike earlier in one address instruction, the result
was stored in the accumulator, here the result can
be stored at different locations rather than just
accumulators, but require more number of bit to
represent
The MOV the address. transfers the operands to the memory from the processor
instruction
registers. R1, R2 registers.
Instruction Format:
Three Address Instructions
These instructions specify three operands or
addresses, which may be memory locations or
registers. The instruction operates on the contents
of all three operands, and the result may be stored
in the same or a different location. For example, a
three-address instruction might multiply the
contents of two registers together and add the
contents of a third register, storing the result in a Two processor registers, R1 and R2.
fourth register. The symbol M [A] denotes the operand at
This has three address fields to specify a register memory address symbolized by A.
or a memory location. Programs created are much The operand1 and operand2 contain the
short in size but number of bits per instruction data or address that the CPU will operate.
increases. These instructions make the creation of Operand 3 contains the result’s address.
the program much easier but it does not mean that
program will run much faster because now
instructions only contain more information but
each micro-operation (changing the content of the
register, loading address in the address bus etc.)
will be performed in one cycle only.
Location of Operands :
 There are multiple options for placing the operands: main memory, CPU register, I/O port, and
instruction itself. Keeping an operand in a CPU register is more effective than storing in the main
memory due to shorter access time of CPU registers.
 This results in the reduction of instruction cycle time. Locating an operand in the instruction is
used for only certain special instructions.
 The content of a port can be used as an operand just like the content of a memory location.
There are some instructions which have no operands.
 HALT and NOOP are typical examples. There are some instructions which test the status of
hardware components such as register, flip–flop, memory location, etc.
 In these case, there are no operands. Similarly, some instructions just wait for some external signal.

Location of Results :
 There are multiple places for storing the result: main memory, CPU register, output port etc.
Some instructions such as HALT and NOOP do not have explicit results whereas, some
instructions just set or reset some flip–flops or clear registers.
Instruction Types :
The instructions are classified into different types on the basis of the following factors:
1. Opcode: Nature of operation done by the instruction.
2. Data: Type of data: binary, decimal etc.
3. Operand location: Memory, register etc.
4. Operand addressing: Method of specifying the operand location (address).
5. Instruction length: One byte, two byte etc.
6. Number of address fields: Zero address, single address, two address etc.
No two computers of different models have same instruction set. Almost every computer
has some unique instructions which attract the programmers. Computer architects give
considerable attention to the framing of the instruction set since it affects both the programmer
and the computer machine.
Instruction Types :
Taking into account the various operations, the instructions can be classified into following eight
types:

1. Data transfer instructions: These move the data from one register/memory location to another.
2. Arithmetic instructions: These perform arithmetical operations.
3. Logical instructions: These perform Boolean logical operations.
4. Control transfer instructions: These modify the program execution sequence
5. Input/output (I/O) instructions: These transfer information between external peripherals and
system nucleus (CPU/memory).
6. String manipulation instructions: These manipulate strings of byte, word, double word etc.
7. Translate instructions: These convert the data from one format to another.
8. Processor control instructions: These control processor operation.
Instruction Types :
Instruction Types :
Instruction Types :
Instruction Types :
Instruction Types :
Instruction Types :
Instruction Types :
Data Transfer Instructions:

Name Mnemonics
Load LD
Store ST
Move MOV
Exchange XCHG
Input IN
Output OUT
Push PUSH
Pop POP
Arithmetic Instructions:

Name Mnemonics
Increment INC
Decrement DEC
Add ADD
Subtract SUB
Multiply MUL
Add with carry ADDC
Subtract with borrow SUBB

Negate (2’s complement) NEG

Logical and bit manipulation Instructions:

Name Mnemonics
Clear CLR
Complement COM
AND AND
OR OR
Exclusive-OR XOR
Clear carry CLRC
Set carry SETC
Complement carry COMC
Enable Interrupt EI
Disable Interrupt DI
Shift Instructions:

Name Mnemonics
Logical shift right SHR
Logical shift left SHL
Arithmetic shift right SHRA
Arithmetic shift left SHLA
Rotate right ROR
Rotate left ROL
Rotate right through carry RORC

Rotate left through carry ROLC

Program control Instructions:

Name Mnemonics Mnemonics Branch Tested

Branch BR condition condition
Jump JMP BZ Branch if zero Z=1
Skip SKP BNZ Branch if not Z=0
Call CALL zero
Return RET BC Branch if carry C=1
Compare (by CMP BNC Branch if no C=0
subtraction) carry
Test (by ANDing) TST BP Branch if plus S=0
BM Branch if minus S=1
BV Branch if V=1
overflow
BNV Branch if no V=0
overflow
Types of Operands:

 Register Operand: MOV R1,R2

 Immediate Operand: MOV R1,01 Types of Operands

 Memory Operand: MOV R1,[X]
Instruction Types:

 Memory - reference instruction

Example: AND, ADD, LDA, STA

 Register - reference instruction

Example: CLA, CMA

 Input-Output instruction
Example:IN, OUT
Instruction Types:
 Memory - reference instruction
Example: AND, ADD, LDA, STA
Memory reference instructions are those commands or instructions which are in the custom to
generate a reference to the memory and approval to a program to have an approach to the
commanded information and that states as to from where the data is cache continually. These
instructions are known as Memory Reference Instructions.
 AND
The AND instruction implements the AND logic operation on the bit collection from the register and
the memory word that is determined by the effective address. The result of this operation is moved
back to the register.
 ADD
The ADD instruction adds the content of the memory word that is denoted by the effective address to
the value of the register.
 LDA
The LDA instruction shares the memory word denoted by the effective address to the register.
 STA
STA saves the content of the register into the memory word that is defined by the effective address.
The output is next used to the common bus and the data input is linked to the bus. It needed only one
micro-operation.
Instruction Types:
 Memory - reference instruction
Example: AND, ADD, LDA, STA

From bit 0 to bit 11, represent the

address field that specifies the
operand's address. From bit 12 to bit
14 represent the opcode field which
consists of 7 operations as 3 bits are
used to specify it. The 15th bit
specifies the indirect bit. If I=0, this
means direct address and I = 1
means indirect address
Instruction Types:
 Register - reference instruction
Example: CLA, CMA

These instructions are mainly used to perform operations on registers. Operands are not
required here.
From bit 0 to bit 11 specifies register operation. Here opcode value always remains 111,
and the value of the indirect bit is always 0.

 Input-Output instruction
Example:IN, OUT

These instructions are mainly used to perform operations on input and output related registers.
From bit 0 to bit 11 specifies input output operation. Here opcode value always remains 111
and value of indirect bit is always 1.
Addressing Modes
 Implied / Implicit Addressing Mode
 Immediate Addressing Mode
 Direct Addressing Mode
 Indirect Addressing Mode
 Register Direct Addressing Mode
 Register Indirect Addressing Mode
 Relative Addressing Mode
 Indexed Addressing Mode
 Base Register Addressing Mode
 Auto-Increment Addressing Mode
 Auto-Decrement Addressing Mode
Contd…
 Implied / Implicit Addressing Mode
Example: CMA (Complement Accumulator), zero address instructions
 Immediate Addressing Mode

Example: MOV R1, #20

 Direct Addressing Mode

Example: ADD R1, 4000
Contd…
 Indirect Addressing Mode

Example: ADD (R2),R0

 Register Direct Addressing Mode

Example: MOV R1,R2

 Register Indirect Addressing Mode

Example: ADD (R2),R0
Contd…
 Relative Addressing Mode

Example: branch instruction

 Indexed Addressing Mode

Example: MOV AL , DS: disp [SI]

Contd…
 Base Register Addressing Mode
Example: MOV AL, disp [BX]

 Auto increment
Mode
Contd…
 Auto decrement
Mode
Flynn’s Classification of
Computers
Instruction Cycles
Flowchart for Instruction Cycle
RISC and CISC Processors
 RISC (Reduced Instruction Set Computers)
 CISC (Complex Instruction Set Computers)
Pipelining

Non-pipelined pipelined
Pipeline stages

5 stage pipeline
Advantages and disadvantages of
pipeline
 Advantages

 The cycle time of the processor is reduced.

 It increases the throughput of the system
 It makes the system reliable.

 Disadvantages

 The design of pipelined processor is complex and costly to manufacture.

 Performance of pipelined processor
Consider a ‘k’ segment pipeline with clock cycle time as ‘Tp’. Let there be ‘n’ tasks to be
completed in the pipelined processor.
 Time taken to execute ‘n’ instructions in a pipelined processor:
ETpipeline = k + n – 1 cycles = (k + n – 1) Tp

 non-pipelined processor, execution time of ‘n’ instructions

ETnon-pipeline = n * k * Tp

 Speedup (S) = Performance of non-pipelined processor / Performance of

pipelined processor=[n * k] / [k + n – 1]

 Efficiency = Given speed up / Max speed up = S / Smax Smax = k

 Throughput = Number of instructions / Total time to complete the instructions=n /

(k
+ n – 1) * Tp
Pipelining Hazards
 Pipeline hazards are situations that prevent the next instruction in the instruction
stream from executing during its designated clock cycles.

 3 types of hazards

 Structural Hazard: Arise from resource conflicts

 Data Hazard: Occur when given instruction depends on data from an instruction
ahead of it in pipeline

 Control Hazard: Result from branch, other instructions that change

flow of program (i.e. change PC)
Structural
Hazard
Solutions for Structural Hazard
 Delay access to resource: stall

 Add more hardware resource

 Data Hazards
 RAW (Read after Write) [Flow/True data dependency]
I: R2 <- R1 + R3
J: R4 <- R2 + R3

 WAR (Write
after Read)
[Anti-Data
dependency]
I: R2 <- R1 + R3
J: R3 <- R4 + R5

 WAW (Write
after Write)
[Output data
Data Hazard
Example
Solutions for Data Hazard

forwarding stall (bubble)

Control Hazard
Solutions for Control
Hazard

Stall (use delay slot) branch prediction

Superscalar
Processors
References
1.https://www.javatpoint.com/computer-organization-and-architecture-
tutorial
2.https://nptel.ac.in/courses/106/103/106103068/
3. https://www.geeksforgeeks.org/computer-organization-and-
architecture-tutorials/
4. https://www.gatevidyalay.com/category/subjects/computer-
organization-and-architecture/
Topics Covered: