![Bit Level Logical Instructions
• Bit level manipulations are very convenient when it is necessary
to set or reset a particular bit in the internal RAM or SFRs [Special
Function Resister] .
• The internal RAM of 8051 from address 20H through 2FH is
both byte addressable and bit addressable.
• However, byte and bit address are different.](https://image.slidesharecdn.com/8051instructionset-190419042513/85/8051-instruction-set-21-320.jpg)
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8051 instruction set
- 1. Classification of Instruction Set of 8051 • An instruction is a single operation of a processor defined by an instruction set architecture. • According to type of operations, the instruction set of 8051 is classified as follows 1) Data Transfer Instructions 2) Byte Level Logical Instructions 3) Arithmetic Instructions 4) Bit Level Instructions 5) Rotate and Swap instructions 6) Jump and CALL Instructions
- 2. Data Transfer Instructions 1) Instructions to Access External Data Memory. 2) Instructions to Access External ROM / Program Memory. 3) Data Transfer with Stack (PUSH and POP) instructions. 4) Data Exchange Instructions.
- 3. Data Transfer Instructions • An immediate, direct, register and indirect addressing modes are used in different MOVE instructions. Ex: MOV A, Rn MOV A, direct MOV A, @Ri
- 4. Instructions to Access External Data Memory Ex: MOV X A, @Ri Copy the contents of external address in Ri to A. This copies the data from the 8-bit address in R0 to A. MOVX A, @DPTR This instruction copies data from the 16-bit address in DPTR to A. MOVX @DPTR, A This instruction copies data from A to the 16-bit address in DPTR.
- 5. Important Points to be remembered in accessing external data memory • All external data moves with external RAM involve the A register. • While accessing external RAM, Rp can address 256 bytes and DPTR can address 64Kbytes. • MOVX instruction is used to access external RAM or I/O addresses.
- 6. Instructions to Access External ROM/Program Memory MOVC A, @A + DPTR This copy the contents of the external ROM address formed by adding A and the DPTR, to A. MOVC A, @A + PC This copy the contents of the external ROM address formed by adding A and the PC, to A.
- 7. Important Points to be remembered in accessing external Read only Memory • When PC is used to access external ROM, it is incremented by 1 before it is added to A to form the physical address of external ROM. • All external data moves with external ROM involve the A register. • MOVC is used with internal or external ROM and can address 4K of internal code or 64K of external code. • The DPTR and the PC are not changed.
- 8. Data transfer with Stack (PUSH and POP) Instruction PUSH direct : Push onto stack Ex: PUSH B This instruction increments the stack pointer by one and stores the contents of register B to the internal RAM location addressed by the stack pointer (SP). POP ACC This instruction copies the contents of the internal RAM location addressed by the stack pointer to the accumulator. Then the stack pointer is decrements by one.
- 10. Important points to remember during PUSH and POP • When the SP contents become FFH, for the next PUSH, the SP rolls over to 00H. • The top of the internal RAM, i,e. its end address is 7FH. So next PUSHes after &FH result in errors. • Generally the SP is set at address above the register banks. • The PUSH and POP operations are used for the registers from the register banks (bank 0 – bank 3), specify direct addresses within the instructions. Do not use register name from register bank since the register name does not specify the bank in use.
- 11. Data Exchange Instructions • The Exchange instruction move data from source address to destination address and vice versa. Ex: XCH A,Rn XCH, direct XCH A, @Ri XCHD A, @Ri
- 12. Important points to remember in Exchange Instructions • All exchanges involve the A register. •All exchanges take place internally within 8051. • When XCHD A, @Ri instruction is executed, the upper nibble of A and the upper nibble of the address in Ri do not change. • Immediate addressing mode cannot be used in the exchange instructions.
- 13. Byte Level Logical Instructions • The instructions ANL, ORL, and XRL perform the logical functions AND, OR, and/or Exclusive – OR on the two byte variables indicated, leaving the result in the first. No flags are affected. • The byte – level logical operations use all four addressing modes for the source of a data byte. • Here, directly addressed bytes may be used as the destination with either the accumulator or a constant as the source. These instructions are useful for clearing (ANL), setting (ORL) or complementing (XRL) one or more bits in a RAM, output ports, or control registers.
- 14. • ANL <dest-byte>, <src-byte> ANL performs the bitwise logical-AND operation between the variables indicated and stores the result in the destination variable. No flags are affected. • ORL <dest-byte>, <src-byte> ORL performs the bitwise logical-OR operation between the indicated variables, storing the results in the destination byte. No flags are affected. • XRL <dest-byte>, <src-byte> XRL performs the bitwise logical Exclusive-OR operation between the indicated variables, string the results in the destination. No flags are affected. • CLR A : Clear Accumulator The accumulator is cleared (all bits set on zero). No flags are affected. • CPL A : Complement Accumulator Each bit of the accumulator is logically complemented (one’s complement). Bit which previously contained one are changed to a zero and vice – versa. No flags affected.
- 15. Arithmetic Instructions 1) Incrementing and Decrementing 2) Addition 3) Subtraction 4) Multiplication and Division 5) Decimal Arithmetic
- 16. Incrementing and Decrementing • Incrementing and Decrementing instructions allow additions and subtraction of from a given number. •These instructions not affect C, AC and OV flags. EX: INC A Increment Accumulator by 1 INC Rn Increment register INC direct Increment direct byte INC @Ri Increment Indirect RAM INC DPTR Increment Data Pinter by 1
- 17. EX: DEC A Decrement Accumulator by 1 DEC Rn Decrement register DEC direct Decrement direct byte DEC @Ri Decrement Indirect RAM
- 18. Addition EX: ADD A, Rn ADD A, direct ADD A, @Ri ADD A, #data ADDC A, Rn ADDC A, direct ADDC A, @ri ADDC A, #data
- 19. Subtraction SUBB A,<src-byte> : Subtract with borrow SUBB subtract the indicated variable and the carry flag together from the Accumulator, leaving the result in the Accumulator. SUBB A, Rn Subtract register from A with borrow SUBB A, direct Subtract direct byte from A with borrow SUBB A, @Ri Subtract indirect RAM from A with borrow SUBB A, #data Subtract immediate data from A with borrow
- 20. Multiplication and Division MUL AB: Multiply DIV AB : Divide Decimal Arithmetic DAA : Decimal – adjust Accumulator for addition It adjust the eight-bit value in the accumulator resulting from the earlier addition of two variables, to produce packed-BCD result.
- 21. Bit Level Logical Instructions • Bit level manipulations are very convenient when it is necessary to set or reset a particular bit in the internal RAM or SFRs [Special Function Resister] . • The internal RAM of 8051 from address 20H through 2FH is both byte addressable and bit addressable. • However, byte and bit address are different.
- 22. Byte Address in HEX Bit Address in HEX Byte Address in HEX Bit Address in HEX 20 00-07 28 40-47 21 08-0F 29 48-4F 22 10-17 2A 50-57 23 18-1F 2B 58-5F 24 20-27 2C 60-67 25 28-2F 2D 68-6F 26 30-37 2E 70-77 27 38-3F 2F 78-7F Bit and Byte Addresses of RAM
- 23. • Addresses of bit 0 and bit 7 of internal RAM byte address 20H are 00H and 07H respectively. • Using of the above mentioned table we can easily interpolate addresses of bit 1 and bit 6 of internal RAM byte address 26H as 31H and 36H, respectively.
- 24. SFR Direct Address in HEX Bit Address in HEX A E0 E0-E7 B F0 F0-F7 IE A8 A8-AF IP B8 B8-BF P0 80 80-87 P1 90 90-97 P2 A0 A0-A7 P3 B0 B0-B7 PSW D0 D0-D7 TCON 88 88-8F SCON 98 98-9F Bit and Byte Addresses of SFR
- 25. Bit Level Operations • CLR C : Clear Carry Flag • CLR bit : Clear direct bit • SETB C : Set Carry Flag • SETB bit: Set direct bit • CPL C : Complement Carry Flag • CPL bit : Complement direct bit • ANL C, <src-bit> : Logical AND for bit variables. • ANL C, bit : AND direct bit to carry flag • ANL C, /bit : AND complement of direct bit to Carry
- 26. • ORL C, <src-bit> : Logical – OR for bit variables. • ORL C, bit : OR direct bit to Carry flag •ORL C, /bit : OR complement of direct bit to Carry • MOV <dest-bit>, <src-bit> • MOV C, bit : Move direct bit to Carry flag • Mover carry flag to direct bit
- 27. Rotate and Swap Instructions • RL A : Rotate Accumulator Left. The eight bits in the Accumulator are rotated one bit to the left. Bit 7 is rotated into the bit 0 position. No flags are affected. • RLC A : Rotate A Left through the Carry flag. The eight bits in the Accumulator and the carry flag are together rotated one bit to the left. Bit 7 moves into the carry flag; the original state of the carry flag moves into the bit 0 position . No other flags are affected.
- 28. •RR A : Rotate Accumulator Right The eight bits in the Accumulator are rotated one bit to the right. Bit 0 is rotated into the bit 7 position. No flags are affected. • RRC A : Rotate A right through Carry flag The eight bits in the Accumulator and the carry flag are together rotated one bit to the right. Bit 0 moves into the carry flag; the original value of the carry flag moves into the bit 7 position. No other flags are affected. • Swap A : Swap nibbles within the Accumulator Swap A interchanges the low and high-order nibbles of the Accumulator. The operation can also be thought of as a four – bit rotate instruction. No flags are affected.