Interrupts
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The document discusses interrupts in Linux systems. It defines interrupts as interventions that allow devices to get the CPU's attention when there is a mismatch between device and CPU speeds. It describes how interrupts work through interrupt lines, an interrupt controller, and registered interrupt handlers. It covers interrupt request numbers, programming interfaces for requesting and freeing interrupts, the responsibilities of interrupt handlers, and additional features like message signaled interrupts and soft interrupts, which are used to break up interrupt handling work.
Interrupts
- 1. © 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Interrupts
- 2. 2© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. What to Expect? W's & How's of Interrupts? The IRQ Interrupt Handling & Handlers Soft IRQs
- 3. 3© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. W's of an Interrupt? What is an Interrupt? Intervention to get Attention Here, from the Devices to the CPU Why is an Interrupt required? Mismatch of Device & CPU speeds Get overall better efficiency & latency
- 4. 4© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. How does interrupt work? Interrupt is a Hardware thing It needs Physical connection In Processors Typically have one or two interrupt lines Handled by a Interrupt Controller, called PIC And PIC informs the Processor through its one line In Micro-controllers Each GPIO can act as an interrupt line Interrupt Controller is in-built In both cases, the CPU then decodes the IRQ And calls the corresponding registered interrupt handler
- 5. 5© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Interrupt ReQuest (IRQ) Number derived by CPU & Board Programmed or Hard Coded with Interrupt Controller Hence, one key component of LSPs In x86 CPU Specific: 0x00 to 0x1F (Hard coded) Board Specific: 0x20 to 0xFF Header: <asm/interrupt.h> → <asm/irq.h> → irq*.h In Microcontrollers Depends on the controller Header: <asm/interrupt.h> → <asm/irq.h> → irq*.h
- 6. 6© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Programming Interface Header: <asm/interrupt.h> Type: typedef irqreturn_t (*irq_handler_t)(int, void *); APIs int request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, const char *name, void *dev_id); void free_irq(unsigned int irq, void *dev_id); int can_request_irq(irq, flags); Flags IRQF_TRIGGER_RISING, ..., IRQF_TRIGGER_HIGH, ... IRQF_SAMPLE_RANDOM IRQF_SHARED, ...
- 7. 7© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. IRQ Handler Do's & Don'ts No sleeping – direct or indirect Example: schedule_timeout, input_register_device No mutexes Rather use spin_locks, if you must Can't exchange data with User Space In their own context. current is invalid If lot to be done, break it into two Top Half & Bottom Half Need not be re-entrant May get interrupted by higher priority interrupt handlers
- 8. 8© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. The Additional Info IRQ Control enable_irq(irq); disable_irq(irq); IRQ Handler returns IRQ_NONE IRQ_HANDLED Check for execution state in_interrupt(); Synchronous interrupts, treated alike Exceptions to report grave runtime errors Software interrupts such as the int 0x80 used for system calls in x86 architecture
- 9. 9© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Message Signaled Interrupts Specifically for PCI Devices Advantages No sharing, No sync issues, More interrupts Modes: MSI or MSI-X (only one at a time) MSI (since PCI 2.2) Special Address: PCI config space Interrupts / Device: Upto 32 in powers of 2 MSI-X (since PCI 3.0) Special Address: Bus address Interrupts / Device: Sparse & upto 2048
- 10. 10© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. MSI/MSI-X APIs MSI int pci_enable_msi(strcut pci_dev *); int pci_enable_msi_block(strcut pci_dev *, int cnt); void pci_disable_msi(strcut pci_dev *); MSI-X int pci_enable_msix(strcut pci_dev *, struct msix_entry *, int nvec); struct msix_entry { u16 vector /* allocated irq */, entry; }; void pci_disable_msix(strcut pci_dev *);
- 11. 11© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Soft IRQs
- 12. 12© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. What is a Soft IRQ? Basic Bottom Half Synchronous Interrupt Have strong locking requirements Used for the performance sensitive subsystems Not same as Software Interrupt
- 13. 13© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Typical Soft IRQs Timer Network Block Tasklet Scheduler High Resolution Timer
- 14. 14© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Linux Execution Model Interrupt Handlers Soft IRQ Handlers Kernel Threads Timer Network... Timer Network...Scheduler ... User Processes Work Q Kernel Thread User Process Pn User Process P1 ...
- 15. 15© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Programming Header: <linux/interrupt.h> APIs void open_softirq(int nr, void (*action)(struct softirq_action *)); void raise_softirq(unsigned int nr);
- 16. 16© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Top & Bottom Halves Top Half Registered through request_irq Bottom Half Tasklet Soft IRQ Context Fast & Atomic Only different tasklets can run on different CPUs Work Queue Special Kernel Process Context Allowed to sleep Can run simultaneously on different CPUs
- 17. 17© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. What all have we learnt? W's & How's of Interrupts? The IRQ Interrupt Handling & Handlers Message Signalled Interrupts Soft IRQs: The Bottom Halves
- 18. 18© 2010-15 SysPlay Workshops <[email protected]> All Rights Reserved. Any Queries?