Lecture15 fsm i_ic
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This document summarizes a lecture on finite state machines: 1. The lecture discusses finite state machines, including examples, state diagrams, state tables, and implementing FSMs in Verilog. 2. As an example, the lecture examines a circuit to store 16 bits of information and check if four 4-bit numbers are equal. 3. The problem set asks students to build Verilog systems for state machines, including one to control an elevator based on floor and button input.
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Lecture15 fsm i_ic
- 1. ECE 287 – Lecture 15 Finite State Machines - II
- 2. Announcements • Next Quiz on Wednesday • Exam II – Nov 15th
- 7. FSM Example For the given circuit, we want to use it to store 16 bits of information and check if all the 4 bit individual numbers (4 of them) are all equal. input valid clk out
- 8. Algorithm
- 10. State Table
- 12. What if clock is fast? How does the system start up?
- 14. Verilog for FSMs reset In = 0 In = 0 B A Out = 1 Out = 0 In = 1 In = 1
- 15. Try and build the Verilog for bit matching example at the start of class…
- 16. Problem Set 1. Build a verilog system for: In = 0 In = 1 In = 0 B Out = 1 A Out = 0 In = 0 In = 1 G Out = 1 In = 1
- 17. Problem Set 1. Build a verilog system for: • Design a state machine controller for an elevator. The elevator can be at one of two floors: Ground or First. There is one button that controls the elevator, and it has two values: Up or Down. Also, there are two lights in the elevator that indicate the current floor: Red for Ground, and Green for First. At each time step (clock), the controller checks the current floor and current input, changes floors and lights in the obvious way.