Linear_Integrates_1 data sceince ktu.pdf

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LINEAR INTEGRATED
CIRCUITS
MODULE 1

OPERATIONAL AMPLIFIERS
• An op-amp is an integrated circuit (IC) that amplifies voltage signals and is designed to perform various
analog computations.
• Op-amps typically have two input terminals:
a. Inverting (-)
b. Non-inverting (+) They also feature one output terminal
• The 741 op-amp (general-purpose) and LM324 (quad op-amp) are among the widely used types.
741 Op-Amp
• The 741 op-amp is a general-purpose amplifier used for mathematical operations like addition, subtraction,
integration, and differentiation.
• It can also function as an amplifier, filter, comparator, and more.
Pin Configuration
It typically comes in an 8-pin dual in-line package (DIP). Key pins include:
Pin 2: Inverting input
Pin 3: Non-inverting input
Pin 6: Output
Pin 4 and Pin 7: Negative and positive power supply terminals, respectively.

Operational Amplifier ( IC741 )
• It has high input impedance, low output impedance, and a high voltage gain (up to 200,000). Its frequency range is
from 0 Hz to 1 MHz.
• Applications: The 741 op-amp is used in signal processing, oscillators, timers, and instrumentation circuits, among
others.
Specifications
• Power supply: For the smooth functionality Op-Amp requires a minimum voltage of 5V and it can handle
up to 18V.
• Input Impedance has a range of about 2 mega ohms.
• Output Impedance has a range of about 75 ohms.

• Input Offset Voltage: It is the voltage that must be applied between the two input terminals of an
op-amp to null the output.
We denote the input offset voltage by Vio. It could be positive or negative.
The smaller the value of Vio, the better the input terminals are matched.
• The algebraic difference between the currents into the inverting and non-inverting terminals is referred to as an
input offset current, Iio
IB1 -current into non-inverting input
IB2 -current into the inverting input.
As the matching between two input terminals is improved, the difference between IB1 and IB2 becomes
smaller.
• Input bias current, IB is the average of the currents that flow into the inverting and non-inverting input terminals
of the op-amp.
• Differential Input Resistance Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting terminal with the other terminal connected to the ground.
• Common Mode rejection Ratio: CMMR can be defined as the ratio of the differential voltage gain Ad to the
common-mode voltage gain Acm; that is
OR

Where
Vocm= output common-mode voltage
Vcm =input common-mode voltage
Acm= Common-mode voltage gain
• Supply Voltage Rejection Ratio: The change in an op-amp’s input offset voltage caused by variation in supply
voltage is called the supply voltage rejection ratio(SVRR).
If we denote the change in supply voltage by ΔV and the corresponding in input offset voltage by ΔVio,
• Slew Rate (SR) – It defined as the maximum rate of change of output voltage per unit of time, expressed in volts
per microsecond.
It indicates how rapidly the output of an op-amp can change in response to a change in the input frequency.
Slew rate changes with a change in voltage gain and is normally specified at unity.
• The slew rate of an op-amp is fixed. Therefore, if the slope requirements of the output signal are greater than the
slew rate, then distortion occurs.
• That’s why slew rate is one of the important factors in selecting the op-amp for AC applications, particularly at
relatively high frequencies.

• A high slew rate is desirable when working with fast-changing signals, as it ensures the op-amp can accurately
reproduce those signals without distortion. However, if the input signal changes faster than the slew rate, the
output will be limited, and the signal may appear distorted or "slewed.“
• For example, if an op-amp has a slew rate of 1 V/μs, it means the output voltage can only change by a maximum
of 1 volt in one microsecond. This characteristic is crucial in high-frequency applications like audio and radio
frequency circuits.
• Voltage gain: It is 2,00,000 for a minimal range of frequencies.
• Input offset range: IC 741 Op Amp has an input offset range in between 2 – 6 mV.
• Output Load: The recommended range is less than 2 Kilo Ohms.
• Transient Response: The feedback section where a steady value is achieved before receiving the output value and
this is called as the transient response. Once it reaches this value, the steady value stays at that point and so
it is termed a steady level. This steady phase is not based on time. The attributes of this transient response
consist of overshoot percentage and rise time. It has an inverse relation to the unity-gain bandwidth of the
operational amplifier.
Operating Modes
1. Open-Loop Mode:
• In this mode, the op-amp operates without any feedback loop.
• It has a very high voltage gain (often in the range of tens of thousands).
• Open-loop mode is typically used in comparators, where the op-amp compares two input voltages and gives a high
or low output.

2.Closed-Loop Mode:
1. Here, feedback is provided from the output to the input, stabilizing the gain and controlling the behavior of
the op-amp.
2. Closed-loop mode is used in applications like amplifiers, filters, and oscillators.
3. Inverting Mode:
1. The input signal is applied to the inverting terminal (-), and the non-inverting terminal (+) is
grounded.
2. The output is inverted and scaled by the gain factor.
4. Non-Inverting Mode:
1. The input signal is applied to the non-inverting terminal (+), and the inverting terminal (-) receives
feedback.
2. The output signal follows the input signal's phase, with amplification.
3.Voltage Follower Mode (Buffer):
1. The output is directly connected to the inverting input (-), creating unity gain.
2. The op-amp acts as a buffer with no amplification but isolates and drives the load.
4.Differential Mode:
1. The op-amp amplifies the difference between the two input signals.
2. This mode is essential in applications requiring precise measurements, like sensor signal processing.
5.Comparator Mode:
1. The op-amp compares the voltage levels at its two inputs and produces a binary output signal.
2. This mode is widely used in digital circuits and ADCs.
6.Integrator and Differentiator Modes:
1. With appropriate feedback elements (e.g., capacitors), the op-amp can perform integration and
differentiation of the input signal, useful in signal processing.

Block Diagram of Op-Amp
•Input stage – It is a dual input, balanced output differential amplifier.
This stage generally provides most of the voltage gain of the amplifier and also establishes the input resistance
of the op-amp.
• Intermediate stage – It is also a differential amplifier, which is driven by the output of the first stage.
The intermediate stage is dual input and unbalanced(single-ended) output in most amplifiers because direct
coupling is used and the dc voltage at the output of the intermediate stage as well above ground potential.
• Level Shifting Circuit – Level Shifting Circuit or the level translator circuit is used after the intermediate stage
to shift the dc level at the output of the intermediate stage downward to zero volts with respect to the ground.
• The final stage – It is a push-pull complementary amplifier.
The output stage increases the output voltage swing and raises the current-supplying capability of the op-amp
and also provides low output resistance.

Ideal Op-Amp Parameters
Ideal operational amplifiers (op-amps) are theoretical devices that are often used to simplify circuit analysis. They
are characterized by several "ideal" parameters:
1.Infinite Open-Loop Gain: The gain of the amplifier without feedback is infinite.
2.Infinite Input Impedance: No current flows into the input terminals, ensuring the circuit connected to it is not
loaded.
3.Zero Output Impedance: The op-amp can drive any load without loss of output voltage.
4.Infinite Bandwidth: The gain remains constant at all frequencies.
5.Zero Offset Voltage: The output is exactly zero when both inputs are at the same voltage.
6.Perfect Linearity: There is no distortion of the signal.
7.Infinite Common-Mode Rejection Ratio (CMRR): It rejects any voltage common to both inputs perfectly.
8.Infinite Power Supply Rejection Ratio (PSRR): It is unaffected by changes in power supply voltage.
Equivalent Circuit

•The equivalent circuit of an Op-Amp includes Thevenin voltage source A, Input resistance Ri, and output resistance
Ro.
•Output Voltage V0
Where
A = large signal voltage gain
Vid=difference input voltage
V1 =voltage at the non-inverting input terminal with respect to ground
V2= voltage at inverting terminal with respect to ground
•The output voltage V0 is directly proportional to the algebraic difference between the two input voltages.
Open Loop Voltage
The three Open loop connections are:
1. Differential amplifier
• In this configuration, the inputs are applied to both the inverting and the non-inverting input terminals of the op-
amp and it amplifies the difference between the two input voltages.
• The input voltages are represented by Vi1 and Vi2. The source resistance Ri1 and Ri2 are negligibly small in
comparison with the very high input resistance offered by the op-amp, and thus the voltage drop across these
source resistances is assumed to be zero.
A is the large signal voltage gain.

Thus the output voltage is equal to the voltage gain A times the difference between the two input voltages. This is
the reason why this configuration is called a differential amplifier.
2. Inverting Amplifier
In this configuration the input signal is applied to the inverting input terminal of the op-amp and the non-inverting
input terminal is connected to the ground.
The output voltage is 1800 out of phase with respect to the input

Non-Inverting amplifier
• The input signal is applied to the non-inverting input terminal of the op-amp and the inverting input terminal is
connected to the ground.
• The input signal is amplified by the open – loop gain A and the output is in-phase with input signal.
• When operated in the open-loop configuration, the output of the op-amp is either in negative or positive saturation,
or switches between positive and negative saturation levels.
• This prevents the use of open – loop configuration of op-amps in linear applications.
Thus, in an inverting amplifier, the input signal is amplified by the open-loop gain A and in phase
shifted by 1800.

Voltage Transfer Curve
• The output voltage is proportional to difference input voltage but only up to the positive and negative saturation
voltages of op-amp.
• These saturation voltages are specified by the manufacturer in terms of output voltage swing rating of an op-amp,
for given value of supply voltages. These saturation voltages are slightly less than the supply voltages.
• Therefore, the voltage transfer curve is a straight line till output reaches saturation voltage level. Thereafter output
remains constant.

Frequency Response Curve
For the ideal op-amp, the gain is infinite and it has infinite bandwidth. But the actual op-amp has finite
bandwidth and finite gain. The Y-axis on the curve is the voltage gain of the op-amp in dB, while the X-axis
is the frequency in the logarithmic scale.

DIFFERENTIAL AMPLIFIER
A Differential Amplifiers amplify the difference between two voltages making this type of operational
amplifier circuit a Subtractor.
Transfer function

If V2=0
If V1=0
When R1=R2 and R3=R4
If all the resistors are all of the same ohmic value, R1 = R2 = R3 = R4, then the circuit will become a Unity Gain
Differential Amplifier and the voltage gain of the amplifier will be exactly one or unity.
Then the output expression would simply be Vout = V2 – V1.
if input V1 is higher than input V2 the output voltage sum will be negative.
if V2 is higher than V1, the output voltage sum will be positive.

Differential Amplifier
• When input signal I/P1 is applied to the transistor T1, there will be a high voltage drop across the
collector resistance RCOL1. Therefore the collector of T1 will be less positive.
• When I/P1 is negative T1 is turned OFF and the voltage drop across RCOL1 becomes very low. Therefore
the collector of T1 will be more positive.
• When T1 is turned ON by the positive value of I/P1 , the current through the emitter resistance REM
increases as the emitter current is almost equal to the collector current (IEIC). Thus the voltage drop
across REM increases and makes the emitter of both transistors going in a positive direction.
• By making T2’s emitter positive is the same as making the base of T2 negative. In that condition the
transistor T2 will conduct less current which in turn will cause less voltage drop in RCOL2 and thus the
collector of T2 will go in a positive direction for positive input signal.
• Thus we can conclude that the non-inverting output appears at the collector of transistor T2 for input at
base of T1.
• The amplification can be driven differentially by taking output between the collector of T1 and T2.
• Assume transistor T1 and T2 are identical in all characteristics, and if the voltages are equal (VBASE1 =
VBASE2), then the emitter current can also be said to be equal.
IEM1 = IEM2
Total Emitter Current, IE = IEM1 + IEM2
VEM = VBASE – VBASE EM

IEM = (VBASE – VBASE EM)/REM
The emitter current IEM remains virtually constant regardless of the hfe value of the transistors.
Since ICOL1 IEM1, and ICOL2 IEM2, ICOL1 ICOL2
Also, VCOL1 = VCOL2 = VCC – ICOL RCOL, assuming collector resistance RCOL1 = RCOL2 = RCOL.
Differential amplifier is a closed loop amplifier circuit which amplifies the difference between two signals. Differential
amplifiers have high common mode rejection ratio (CMRR) and high input impedance.
AC analysis of Differential Amplifier
The voltage across rC1

r′e - dynamic base-emitter junction resistance,
IE- is the DC emitter current.

A differential amplifier amplifies the difference between two input signals (V_S1 - V_S2).It is widely used in analog
circuits, operational amplifiers, and signal processing applications.
The performance of the differential amplifier depends on the matching characteristics of the transistor pair Q₁ and
Q₂. Ideally, both transistors should be identical to ensure balanced operation.
The circuit requires both a positive supply (Vcc) and a negative supply (-Vee) for proper operation.
Purpose of AC h-parameter (hybrid parameter) model is used to derive expressions for:
Differential gain
Common mode gain
Input resistance
Output resistance
Two-Port Network Representation:
The analysis considers a two-port network with: Voltages: 𝑉1 and 𝑉2 at the input and output.

Key Assumptions for Common Mode Analysis:
•Input signals are of magnitude Vs and are in phase.
•Unlike differential mode analysis, the emitter current is considered.
•The emitter resistance Re is included in the circuit for analysis.
•The current through Re is assumed to be 2Ie for simplification.
•The emitter resistance is taken as 2Ie.
From the circuit, applying KVL to the input loop:
𝐼𝑏𝑅𝑠+𝐼𝑏ℎ𝑖𝑒+2𝑅𝐸(𝐼𝑐+𝐼𝑏)=𝑉𝑠
I b R s +I b hie +2R E (I c +I b )=V s
Rewriting in terms of base current 𝐼𝑏I b and collector current I𝑐
𝑉𝑠=𝐼𝑏(𝑅𝑠+ℎ𝑖𝑒+2𝑅𝐸)+𝐼𝑐⋅2𝑅𝐸
V s =I b (R s +hie +2R E )+I c ⋅2R E
This equation is fundamental in determining the common mode gain and common mode rejection ratio (CMRR) in
differential amplifiers.
Common Mode Gain (𝐴𝐶A C )
The image provides the derivation for common mode gain (𝐴𝐶A C ) in a differential amplifier.
Applying Kirchhoff’s Voltage Law (KVL) to the Output Loop the output voltage is derived as:
𝑉𝑜=−𝐼L𝑅C
V o =−IL RC
Since 𝐼𝐿=ℎ𝑓𝑒𝐼𝑏I L =hfe I b ,
we substitute:𝑉𝑜=−ℎ𝑓𝑒𝐼𝑏𝑅𝐶
V o =−h fe I b R C

Input impedance (𝑅𝑖R i ) is the equivalent resistance seen at one input while the other input is grounded.
It represents the resistance between one input terminal and ground.
Hybrid Model Consideration : Since the h-parameter (hybrid) model is used for differential mode gain analysis, 𝑅
𝑖R i is typically influenced by parameters such as:
ℎ𝑖𝑒 (input resistance of the transistor),External resistors such as 𝑅𝑠R s ,Feedback resistances in some cases.
Ri = 2 (RS + hie)
Output Impedance
It is defined as the equivalent resistance between one of the output terminals with respect to ground.
Ro = RC
Constant Current Bias
Without physically increasing the value of RE, it is replaced by a transistor operated at a constant current.
Then the constant currrent source circuit gives the effect of a very high resistance without affecting the Q point
values of the differential amplifier.

By applying Kirchhoff Voltage Law

Substituting Vb and Ve,
VEE , R1, R2, R3 and VBE are constants, current IC3 is also constant and almost equal to IE3 . hence circuit with
transistor Q3, acts as a constant current source.

Current Mirror
A current mirror is a circuit used to generate a constant current source.
•It ensures that a fixed current is supplied to a load, regardless of voltage variations.
Working Principle:
•It exploits the property of transistors operating in the active region:
• In this region, the collector current (ICI_CIC) is relatively independent of the
collector-emitter voltage (VCEV_{CE}VCE).
• This allows the circuit to maintain a steady current despite changes in voltage.
output resistenace
gain

Wilson Current Mirror
A Wilson Current Mirror consists of three bipolar junction transistors
(BJTs) arranged in a specific feedback configuration to improve performance.
Circuit Configuration : Transistors Used: 𝑄1Q 1 , 𝑄2Q 2 , and 𝑄3Q 3 .
Reference Current (𝐼𝑅𝐸𝐹I REF ): Provided at the input.
Output Current (𝐼𝑂I O ): Mirrors the input current with high accuracy.
Working Mechanism:
1.Q1 and Q2 act as a basic current mirror, establishing the current reference.
2.Q3 provides negative feedback to improve the mirror accuracy.
3.The feedback mechanism compensates for variations in transistor parameters,
improving performance.
Base Current Q3
Emitter Current Q3

The Widlar Current Mirror is a modified version of the basic current mirror that is designed to generate low
output currents without requiring very large resistor values or low power supply voltages. It is widely used
in low-power analog circuits and IC design to provide precise current biasing.
Circuit Configuration:
•The Widlar current mirror consists of two bipolar junction transistors (BJTs):
• Q1Q_1Q1 (acts as a reference transistor)
• Q2Q_2Q2 (controls the output current)
•A resistor RER_ERE is added in the emitter leg of Q2Q_2Q2.
Working Mechanism:
1.Current Reference Setup:
1. IREFI_{REF}IREF flows through Q1Q_1Q1, setting a reference current.
2.Emitter Degeneration:
1. The presence of RER_ERE introduces voltage feedback, modifying the current flow through Q2Q_2Q2.
3.Output Current Reduction:
1. The added resistor lowers the output current (IOI_OIO) compared to the basic current mirror, achieving a
lower current without using large resistor values elsewhere.

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