1. Data Transfer Instructions
2. Arithmetic Instructions
3. Logical Instructions
4. String manipulation Instructions
5. Process Control Instructions
6. Control Transfer Instructions
Instruction Set
1
8086 Microprocessor
8086 supports 6 types of instructions:
1. Data Transfer Instructions
Instruction Set
2
8086 Microprocessor
Instructions that are used to transfer data/ address in to
registers, memory locations and I/O ports.
Generally involve two operands: Source operand and
Destination operand of the same size.
Source: Register or a memory location or an immediate data
Destination : Register or a memory location.
The size should be a either a byte or a word.
A 8-bit data can only be moved to 8-bit register/ memory
and a 16-bit data can be moved to 16-bit register/ memory.
1. Data Transfer Instructions
Instruction Set
3
8086 Microprocessor
Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
MOV reg2/ mem, reg1/ mem
MOV reg2, reg1
MOV mem, reg1
MOV reg2, mem
(reg2)  (reg1)
(mem)  (reg1)
(reg2)  (mem)
MOV reg/ mem, data
MOV reg, data
MOV mem, data
(reg)  data
(mem)  data
XCHG reg2/ mem, reg1
XCHG reg2, reg1
XCHG mem, reg1
(reg2)  (reg1)
(mem)  (reg1)
1. Data Transfer Instructions
Instruction Set
4
8086 Microprocessor
Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
PUSH reg16/ mem
PUSH reg16
PUSH mem
(SP)  (SP) – 2
MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (reg16)
(SP)  (SP) – 2
MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (mem)
POP reg16/ mem
POP reg16
POP mem
MA S = (SS) x 1610 + SP
(reg16)  (MA S ; MA S + 1)
(SP)  (SP) + 2
MA S = (SS) x 1610 + SP
(mem)  (MA S ; MA S + 1)
(SP)  (SP) + 2
1. Data Transfer Instructions
Instruction Set
5
8086 Microprocessor
Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
IN A, [DX]
IN AL, [DX]
IN AX, [DX]
PORTaddr = (DX)
(AL)  (PORT)
PORTaddr = (DX)
(AX)  (PORT)
IN A, addr8
IN AL, addr8
IN AX, addr8
(AL)  (addr8)
(AX)  (addr8)
OUT [DX], A
OUT [DX], AL
OUT [DX], AX
PORTaddr = (DX)
(PORT)  (AL)
PORTaddr = (DX)
(PORT)  (AX)
OUT addr8, A
OUT addr8, AL
OUT addr8, AX
(addr8)  (AL)
(addr8)  (AX)
2. Arithmetic Instructions
Instruction Set
6
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADD reg2/ mem, reg1/mem
ADC reg2, reg1
ADC reg2, mem
ADC mem, reg1
(reg2)  (reg1) + (reg2)
(reg2)  (reg2) + (mem)
(mem)  (mem)+(reg1)
ADD reg/mem, data
ADD reg, data
ADD mem, data
(reg)  (reg)+ data
(mem)  (mem)+data
ADD A, data
ADD AL, data8
ADD AX, data16
(AL)  (AL) + data8
(AX)  (AX) +data16
2. Arithmetic Instructions
Instruction Set
7
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADC reg2/ mem, reg1/mem
ADC reg2, reg1
ADC reg2, mem
ADC mem, reg1
(reg2)  (reg1) + (reg2)+CF
(reg2)  (reg2) + (mem)+CF
(mem)  (mem)+(reg1)+CF
ADC reg/mem, data
ADC reg, data
ADC mem, data
(reg)  (reg)+ data+CF
(mem)  (mem)+data+CF
ADDC A, data
ADD AL, data8
ADD AX, data16
(AL)  (AL) + data8+CF
(AX)  (AX) +data16+CF
2. Arithmetic Instructions
Instruction Set
8
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
SUB reg2/ mem, reg1/mem
SUB reg2, reg1
SUB reg2, mem
SUB mem, reg1
(reg2)  (reg1) - (reg2)
(reg2)  (reg2) - (mem)
(mem)  (mem) - (reg1)
SUB reg/mem, data
SUB reg, data
SUB mem, data
(reg)  (reg) - data
(mem)  (mem) - data
SUB A, data
SUB AL, data8
SUB AX, data16
(AL)  (AL) - data8
(AX)  (AX) - data16
2. Arithmetic Instructions
Instruction Set
9
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
SBB reg2/ mem, reg1/mem
SBB reg2, reg1
SBB reg2, mem
SBB mem, reg1
(reg2)  (reg1) - (reg2) - CF
(reg2)  (reg2) - (mem)- CF
(mem)  (mem) - (reg1) –CF
SBB reg/mem, data
SBB reg, data
SBB mem, data
(reg)  (reg) – data - CF
(mem)  (mem) - data - CF
SBB A, data
SBB AL, data8
SBB AX, data16
(AL)  (AL) - data8 - CF
(AX)  (AX) - data16 - CF
2. Arithmetic Instructions
Instruction Set
10
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
INC reg/ mem
INC reg8
INC reg16
INC mem
(reg8)  (reg8) + 1
(reg16)  (reg16) + 1
(mem)  (mem) + 1
DEC reg/ mem
DEC reg8
DEC reg16
DEC mem
(reg8)  (reg8) - 1
(reg16)  (reg16) - 1
(mem)  (mem) - 1
2. Arithmetic Instructions
Instruction Set
11
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
MUL reg/ mem
MUL reg
MUL mem
For byte : (AX)  (AL) x (reg8)
For word : (DX)(AX)  (AX) x (reg16)
For byte : (AX)  (AL) x (mem8)
For word : (DX)(AX)  (AX) x (mem16)
IMUL reg/ mem
IMUL reg
IMUL mem
For byte : (AX)  (AL) x (reg8)
For word : (DX)(AX)  (AX) x (reg16)
For byte : (AX)  (AX) x (mem8)
For word : (DX)(AX)  (AX) x (mem16)
2. Arithmetic Instructions
Instruction Set
12
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
DIV reg/ mem
DIV reg
DIV mem
For 16-bit :- 8-bit :
(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
For 16-bit :- 8-bit :
(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder
2. Arithmetic Instructions
Instruction Set
13
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
IDIV reg/ mem
IDIV reg
IDIV mem
For 16-bit :- 8-bit :
(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
For 16-bit :- 8-bit :
(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder
2. Arithmetic Instructions
Instruction Set
14
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP reg2/mem, reg1/ mem
CMP reg2, reg1
CMP reg2, mem
CMP mem, reg1
Modify flags  (reg2) – (reg1)
If (reg2) > (reg1) then CF=0, ZF=0, SF=0
If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0
Modify flags  (reg2) – (mem)
If (reg2) > (mem) then CF=0, ZF=0, SF=0
If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0
Modify flags  (mem) – (reg1)
If (mem) > (reg1) then CF=0, ZF=0, SF=0
If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0
2. Arithmetic Instructions
Instruction Set
15
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP reg/mem, data
CMP reg, data
CMP mem, data
Modify flags  (reg) – (data)
If (reg) > data then CF=0, ZF=0, SF=0
If (reg) < data then CF=1, ZF=0, SF=1
If (reg) = data then CF=0, ZF=1, SF=0
Modify flags  (mem) – (mem)
If (mem) > data then CF=0, ZF=0, SF=0
If (mem) < data then CF=1, ZF=0, SF=1
If (mem) = data then CF=0, ZF=1, SF=0
2. Arithmetic Instructions
Instruction Set
16
8086 Microprocessor
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP A, data
CMP AL, data8
CMP AX, data16
Modify flags  (AL) – data8
If (AL) > data8 then CF=0, ZF=0, SF=0
If (AL) < data8 then CF=1, ZF=0, SF=1
If (AL) = data8 then CF=0, ZF=1, SF=0
Modify flags  (AX) – data16
If (AX) > data16 then CF=0, ZF=0, SF=0
If (mem) < data16 then CF=1, ZF=0, SF=1
If (mem) = data16 then CF=0, ZF=1, SF=0
3. Logical Instructions
Instruction Set
17
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
18
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
19
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
20
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
21
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
22
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
23
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
3. Logical Instructions
Instruction Set
24
8086 Microprocessor
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
4. String Manipulation Instructions
Instruction Set
25
8086 Microprocessor
 String : Sequence of bytes or words
 8086 instruction set includes instruction for string movement, comparison,
scan, load and store.
 REP instruction prefix : used to repeat execution of string instructions
 String instructions end with S or SB or SW.
S represents string, SB string byte and SW string word.
 Offset or effective address of the source operand is stored in SI register and
that of the destination operand is stored in DI register.
 Depending on the status of DF, SI and DI registers are automatically
updated.
 DF = 0  SI and DI are incremented by 1 for byte and 2 for word.
 DF = 1  SI and DI are decremented by 1 for byte and 2 for word.
4. String Manipulation Instructions
Instruction Set
26
8086 Microprocessor
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
REP
REPZ/ REPE
(Repeat CMPS or SCAS until
ZF = 0)
REPNZ/ REPNE
(Repeat CMPS or SCAS until
ZF = 1)
While CX  0 and ZF = 1, repeat execution of
string instruction and
(CX)  (CX) – 1
While CX  0 and ZF = 0, repeat execution of
string instruction and
(CX)  (CX) - 1
4. String Manipulation Instructions
Instruction Set
27
8086 Microprocessor
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
MOVS
MOVSB
MOVSW
MA = (DS) x 1610 + (SI)
MAE = (ES) x 1610 + (DI)
(MAE)  (MA)
If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1
MA = (DS) x 1610 + (SI)
MAE = (ES) x 1610 + (DI)
(MAE ; MAE + 1)  (MA; MA + 1)
If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2
4. String Manipulation Instructions
Instruction Set
28
8086 Microprocessor
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
CMPS
CMPSB
CMPSW
MA = (DS) x 1610 + (SI)
MAE = (ES) x 1610 + (DI)
Modify flags  (MA) - (MAE)
If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0
If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1
If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0
For byte operation
If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1
For word operation
If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2
Compare two string byte or string word
4. String Manipulation Instructions
Instruction Set
29
8086 Microprocessor
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
SCAS
SCASB
SCASW
MAE = (ES) x 1610 + (DI)
Modify flags  (AL) - (MAE)
If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0
If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1
If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI)  (DI) + 1
If DF = 1, then (DI)  (DI) – 1
MAE = (ES) x 1610 + (DI)
Modify flags  (AL) - (MAE)
If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0
If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1
If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0
If DF = 0, then (DI)  (DI) + 2
If DF = 1, then (DI)  (DI) – 2
Scan (compare) a string byte or word with accumulator
4. String Manipulation Instructions
Instruction Set
30
8086 Microprocessor
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
LODS
LODSB
LODSW
MA = (DS) x 1610 + (SI)
(AL)  (MA)
If DF = 0, then (SI)  (SI) + 1
If DF = 1, then (SI)  (SI) – 1
MA = (DS) x 1610 + (SI)
(AX)  (MA ; MA + 1)
If DF = 0, then (SI)  (SI) + 2
If DF = 1, then (SI)  (SI) – 2
Load string byte in to AL or string word in to AX
4. String Manipulation Instructions
Instruction Set
31
8086 Microprocessor
Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
STOS
STOSB
STOSW
MAE = (ES) x 1610 + (DI)
(MAE)  (AL)
If DF = 0, then (DI)  (DI) + 1
If DF = 1, then (DI)  (DI) – 1
MAE = (ES) x 1610 + (DI)
(MAE ; MAE + 1 )  (AX)
If DF = 0, then (DI)  (DI) + 2
If DF = 1, then (DI)  (DI) – 2
Store byte from AL or word from AX in to string
Mnemonics Explanation
STC Set CF  1
CLC Clear CF  0
CMC Complement carry CF  CF/
STD Set direction flag DF  1
CLD Clear direction flag DF  0
STI Set interrupt enable flag IF  1
CLI Clear interrupt enable flag IF  0
NOP No operation
HLT Halt after interrupt is set
WAIT Wait for TEST pin active
ESC opcode mem/ reg Used to pass instruction to a coprocessor
which shares the address and data bus
with the 8086
LOCK Lock bus during next instruction
5. Processor Control Instructions
Instruction Set
32
8086 Microprocessor
6. Control Transfer Instructions
Instruction Set
33
8086 Microprocessor
Transfer the control to a specific destination or target instruction
Do not affect flags
Mnemonics Explanation
CALL reg/ mem/ disp16 Call subroutine
RET Return from subroutine
JMP reg/ mem/ disp8/ disp16 Unconditional jump
 8086 Unconditional transfers
6. Control Transfer Instructions
Instruction Set
34
8086 Microprocessor
 8086 signed conditional
branch instructions
 8086 unsigned conditional
branch instructions
Checks flags
If conditions are true, the program control is
transferred to the new memory location in the same
segment by modifying the content of IP
6. Control Transfer Instructions
Instruction Set
35
8086 Microprocessor
Name Alternate name
JE disp8
Jump if equal
JZ disp8
Jump if result is 0
JNE disp8
Jump if not equal
JNZ disp8
Jump if not zero
JG disp8
Jump if greater
JNLE disp8
Jump if not less or
equal
JGE disp8
Jump if greater
than or equal
JNL disp8
Jump if not less
JL disp8
Jump if less than
JNGE disp8
Jump if not
greater than or
equal
JLE disp8
Jump if less than
or equal
JNG disp8
Jump if not
greater
 8086 signed conditional
branch instructions
 8086 unsigned conditional
branch instructions
Name Alternate name
JE disp8
Jump if equal
JZ disp8
Jump if result is 0
JNE disp8
Jump if not equal
JNZ disp8
Jump if not zero
JA disp8
Jump if above
JNBE disp8
Jump if not below
or equal
JAE disp8
Jump if above or
equal
JNB disp8
Jump if not below
JB disp8
Jump if below
JNAE disp8
Jump if not above
or equal
JBE disp8
Jump if below or
equal
JNA disp8
Jump if not above
6. Control Transfer Instructions
Instruction Set
36
8086 Microprocessor
Mnemonics Explanation
JC disp8 Jump if CF = 1
JNC disp8 Jump if CF = 0
JP disp8 Jump if PF = 1
JNP disp8 Jump if PF = 0
JO disp8 Jump if OF = 1
JNO disp8 Jump if OF = 0
JS disp8 Jump if SF = 1
JNS disp8 Jump if SF = 0
JZ disp8 Jump if result is zero, i.e, Z = 1
JNZ disp8 Jump if result is not zero, i.e, Z = 1
 8086 conditional branch instructions affecting individual flags
8086 Instruction Set: Summary
AND Logical AND of byte or word
NOT Logical NOT of byte or word
OR Logical OR of byte or word
RCL Rotate left trough carry byte or word
RCR Rotate right trough carry byte or word
ROL Rotate left byte or word
ROR Rotate right byte or word
SAL Arithmetic shift left byte or word
SAR Arithmetic shift right byte or word
SHL Logical shift left byte or word
SHR Logical shift right byte or word
TEST Test byte or word
XOR Logical exclusive-OR of byte or word
CMPS Compare byte or word string
LODS Load byte or word string
IN Input byte or word from port
OUT Output byte or word to
MOV Move to/from register/memory
MOVS Move byte or word string
MOVSB Move string byte
MOVSW Move string word
8086 Instruction Set: Summary
38
DAA Decimal adjust for addition
DAS Decimal adjust for subtraction
DEC Decrement byte or word by one
DIV Divide byte or word
IDIV Integer divide byte or word
IMUL Integer multiply byte or word
INC Increment byte or word by one
MUL Multiply byte or word (unsigned)
NEG Negate byte or word
SBB Subtract byte or word and carry (borrow)
SUB Subtract byte or word
REP Repeat
REPE Repeat while equal
REPZ Repeat while zero
REPNE Repeat while not equal
REPNZ Repeat while not zero
SCAS Scan byte or word string
STOS Store byte or word string
8086 Instruction Set: Summary
LAHF Load AH from flags
LDS Load pointer using data segment
LEA Load effective address
LES Load pointer using extra segment port
POP Pop word off stack
POPF Pop flags off stack
PUSH Push word onto stack
PUSHF Push flags onto stack
SAHF Store AH into flags
XCHG Exchange byte or word
XLAT Translate byte
AAA ASCII adjust for addition
AAD ASCII adjust for division
AAM ASCII adjust for multiply
AAS ASCII adjust for subtraction
ADC Add byte or word plus carry
ADD Add byte or word
CBW Convert byte or word
CMP Compare byte or word
CWD Convert word to double-word
Assemble Directives
40
8086 Microprocessor
Instructions to the Assembler regarding the program being
executed.
Control the generation of machine codes and organization of
the program; but no machine codes are generated for
assembler directives.
Also called ‘pseudo instructions’
Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..
Assemble Directives
41
8086 Microprocessor
Define Byte
Define a byte type (8-bit) variable
Reserves specific amount of memory
locations to each variable
Range : 00H – FFH for unsigned value;
00H – 7FH for positive value and
80H – FFH for negative value
General form : variable DB value/ values
Example:
LIST DB 7FH, 42H, 35H
Three consecutive memory locations are reserved for
the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
memory location
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
FAR
NEAR
ENDP
SHORT
MACRO
ENDM
Assemble Directives
42
8086 Microprocessor
Define Word
Define a word type (16-bit) variable
Reserves two consecutive memory locations
to each variable
Range : 0000H – FFFFH for unsigned value;
0000H – 7FFFH for positive value and
8000H – FFFFH for negative value
General form : variable DW value/ values
Example:
ALIST DW 6512H, 0F251H, 0CDE2H
Six consecutive memory locations are reserved for
the variable ALIST and each 16-bit data specified in
the instruction is stored in two consecutive memory
location.
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
FAR
NEAR
ENDP
SHORT
MACRO
ENDM
Assemble Directives
43
8086 Microprocessor
SEGMENT : Used to indicate the beginning of
a code/ data/ stack segment
ENDS : Used to indicate the end of a code/
data/ stack segment
General form:
Segnam SEGMENT
…
…
…
…
…
…
Segnam ENDS
Program code
or
Data Defining Statements
User defined name of
the segment
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
FAR
NEAR
ENDP
SHORT
MACRO
ENDM
Assemble Directives
44
8086 Microprocessor
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
FAR
NEAR
ENDP
SHORT
MACRO
ENDM
Informs the assembler the name of the
program/ data segment that should be used
for a specific segment.
General form:
Segment Register
ASSUME segreg : segnam, .. , segreg : segnam
User defined name of
the segment
ASSUME CS: ACODE, DS:ADATA Tells the compiler that the
instructions of the program are
stored in the segment ACODE and
data are stored in the segment
ADATA
Example:
Assemble Directives
45
8086 Microprocessor
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
FAR
NEAR
ENDP
SHORT
MACRO
ENDM
ORG (Origin) is used to assign the starting address
(Effective address) for a program/ data segment
END is used to terminate a program; statements
after END will be ignored
EVEN : Informs the assembler to store program/
data segment starting from an even address
EQU (Equate) is used to attach a value to a variable
ORG 1000H Informs the assembler that the statements
following ORG 1000H should be stored in
memory starting with effective address
1000H
LOOP EQU 10FEH Value of variable LOOP is 10FEH
_SDATA SEGMENT
ORG 1200H
A DB 4CH
EVEN
B DW 1052H
_SDATA ENDS
In this data segment, effective address of
memory location assigned to A will be 1200H
and that of B will be 1202H and 1203H.
Examples:
Assemble Directives
46
8086 Microprocessor
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM
PROC Indicates the beginning of a procedure
ENDP End of procedure
FAR Intersegment call
NEAR Intrasegment call
General form
procname PROC[NEAR/ FAR]
…
…
…
RET
procname ENDP
Program statements of the
procedure
Last statement of the
procedure
User defined name of
the procedure
Assemble Directives
47
8086 Microprocessor
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM
ADD64 PROC NEAR
…
…
…
RET
ADD64 ENDP
The subroutine/ procedure named ADD64 is
declared as NEAR and so the assembler will
code the CALL and RET instructions involved
in this procedure as near call and return
CONVERT PROC FAR
…
…
…
RET
CONVERT ENDP
The subroutine/ procedure named CONVERT
is declared as FAR and so the assembler will
code the CALL and RET instructions involved
in this procedure as far call and return
Examples:
Assemble Directives
48
8086 Microprocessor
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM
Reserves one memory location for 8-bit
signed displacement in jump instructions
JMP SHORT
AHEAD
The directive will reserve one
memory location for 8-bit
displacement named AHEAD
Example:
Assemble Directives
49
8086 Microprocessor
DB
DW
SEGMENT
ENDS
ASSUME
ORG
END
EVEN
EQU
PROC
ENDP
FAR
NEAR
SHORT
MACRO
ENDM
MACRO Indicate the beginning of a macro
ENDM End of a macro
General form:
macroname MACRO[Arg1, Arg2 ...]
…
…
…
macroname ENDM
Program
statements in
the macro
User defined name of
the macro

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Microprocessor 8086 instructions

  • 1. 1. Data Transfer Instructions 2. Arithmetic Instructions 3. Logical Instructions 4. String manipulation Instructions 5. Process Control Instructions 6. Control Transfer Instructions Instruction Set 1 8086 Microprocessor 8086 supports 6 types of instructions:
  • 2. 1. Data Transfer Instructions Instruction Set 2 8086 Microprocessor Instructions that are used to transfer data/ address in to registers, memory locations and I/O ports. Generally involve two operands: Source operand and Destination operand of the same size. Source: Register or a memory location or an immediate data Destination : Register or a memory location. The size should be a either a byte or a word. A 8-bit data can only be moved to 8-bit register/ memory and a 16-bit data can be moved to 16-bit register/ memory.
  • 3. 1. Data Transfer Instructions Instruction Set 3 8086 Microprocessor Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT … MOV reg2/ mem, reg1/ mem MOV reg2, reg1 MOV mem, reg1 MOV reg2, mem (reg2)  (reg1) (mem)  (reg1) (reg2)  (mem) MOV reg/ mem, data MOV reg, data MOV mem, data (reg)  data (mem)  data XCHG reg2/ mem, reg1 XCHG reg2, reg1 XCHG mem, reg1 (reg2)  (reg1) (mem)  (reg1)
  • 4. 1. Data Transfer Instructions Instruction Set 4 8086 Microprocessor Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT … PUSH reg16/ mem PUSH reg16 PUSH mem (SP)  (SP) – 2 MA S = (SS) x 1610 + SP (MA S ; MA S + 1)  (reg16) (SP)  (SP) – 2 MA S = (SS) x 1610 + SP (MA S ; MA S + 1)  (mem) POP reg16/ mem POP reg16 POP mem MA S = (SS) x 1610 + SP (reg16)  (MA S ; MA S + 1) (SP)  (SP) + 2 MA S = (SS) x 1610 + SP (mem)  (MA S ; MA S + 1) (SP)  (SP) + 2
  • 5. 1. Data Transfer Instructions Instruction Set 5 8086 Microprocessor Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT … IN A, [DX] IN AL, [DX] IN AX, [DX] PORTaddr = (DX) (AL)  (PORT) PORTaddr = (DX) (AX)  (PORT) IN A, addr8 IN AL, addr8 IN AX, addr8 (AL)  (addr8) (AX)  (addr8) OUT [DX], A OUT [DX], AL OUT [DX], AX PORTaddr = (DX) (PORT)  (AL) PORTaddr = (DX) (PORT)  (AX) OUT addr8, A OUT addr8, AL OUT addr8, AX (addr8)  (AL) (addr8)  (AX)
  • 6. 2. Arithmetic Instructions Instruction Set 6 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… ADD reg2/ mem, reg1/mem ADC reg2, reg1 ADC reg2, mem ADC mem, reg1 (reg2)  (reg1) + (reg2) (reg2)  (reg2) + (mem) (mem)  (mem)+(reg1) ADD reg/mem, data ADD reg, data ADD mem, data (reg)  (reg)+ data (mem)  (mem)+data ADD A, data ADD AL, data8 ADD AX, data16 (AL)  (AL) + data8 (AX)  (AX) +data16
  • 7. 2. Arithmetic Instructions Instruction Set 7 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… ADC reg2/ mem, reg1/mem ADC reg2, reg1 ADC reg2, mem ADC mem, reg1 (reg2)  (reg1) + (reg2)+CF (reg2)  (reg2) + (mem)+CF (mem)  (mem)+(reg1)+CF ADC reg/mem, data ADC reg, data ADC mem, data (reg)  (reg)+ data+CF (mem)  (mem)+data+CF ADDC A, data ADD AL, data8 ADD AX, data16 (AL)  (AL) + data8+CF (AX)  (AX) +data16+CF
  • 8. 2. Arithmetic Instructions Instruction Set 8 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… SUB reg2/ mem, reg1/mem SUB reg2, reg1 SUB reg2, mem SUB mem, reg1 (reg2)  (reg1) - (reg2) (reg2)  (reg2) - (mem) (mem)  (mem) - (reg1) SUB reg/mem, data SUB reg, data SUB mem, data (reg)  (reg) - data (mem)  (mem) - data SUB A, data SUB AL, data8 SUB AX, data16 (AL)  (AL) - data8 (AX)  (AX) - data16
  • 9. 2. Arithmetic Instructions Instruction Set 9 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… SBB reg2/ mem, reg1/mem SBB reg2, reg1 SBB reg2, mem SBB mem, reg1 (reg2)  (reg1) - (reg2) - CF (reg2)  (reg2) - (mem)- CF (mem)  (mem) - (reg1) –CF SBB reg/mem, data SBB reg, data SBB mem, data (reg)  (reg) – data - CF (mem)  (mem) - data - CF SBB A, data SBB AL, data8 SBB AX, data16 (AL)  (AL) - data8 - CF (AX)  (AX) - data16 - CF
  • 10. 2. Arithmetic Instructions Instruction Set 10 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… INC reg/ mem INC reg8 INC reg16 INC mem (reg8)  (reg8) + 1 (reg16)  (reg16) + 1 (mem)  (mem) + 1 DEC reg/ mem DEC reg8 DEC reg16 DEC mem (reg8)  (reg8) - 1 (reg16)  (reg16) - 1 (mem)  (mem) - 1
  • 11. 2. Arithmetic Instructions Instruction Set 11 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… MUL reg/ mem MUL reg MUL mem For byte : (AX)  (AL) x (reg8) For word : (DX)(AX)  (AX) x (reg16) For byte : (AX)  (AL) x (mem8) For word : (DX)(AX)  (AX) x (mem16) IMUL reg/ mem IMUL reg IMUL mem For byte : (AX)  (AL) x (reg8) For word : (DX)(AX)  (AX) x (reg16) For byte : (AX)  (AX) x (mem8) For word : (DX)(AX)  (AX) x (mem16)
  • 12. 2. Arithmetic Instructions Instruction Set 12 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… DIV reg/ mem DIV reg DIV mem For 16-bit :- 8-bit : (AL)  (AX) :- (reg8) Quotient (AH)  (AX) MOD(reg8) Remainder For 32-bit :- 16-bit : (AX)  (DX)(AX) :- (reg16) Quotient (DX)  (DX)(AX) MOD(reg16) Remainder For 16-bit :- 8-bit : (AL)  (AX) :- (mem8) Quotient (AH)  (AX) MOD(mem8) Remainder For 32-bit :- 16-bit : (AX)  (DX)(AX) :- (mem16) Quotient (DX)  (DX)(AX) MOD(mem16) Remainder
  • 13. 2. Arithmetic Instructions Instruction Set 13 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… IDIV reg/ mem IDIV reg IDIV mem For 16-bit :- 8-bit : (AL)  (AX) :- (reg8) Quotient (AH)  (AX) MOD(reg8) Remainder For 32-bit :- 16-bit : (AX)  (DX)(AX) :- (reg16) Quotient (DX)  (DX)(AX) MOD(reg16) Remainder For 16-bit :- 8-bit : (AL)  (AX) :- (mem8) Quotient (AH)  (AX) MOD(mem8) Remainder For 32-bit :- 16-bit : (AX)  (DX)(AX) :- (mem16) Quotient (DX)  (DX)(AX) MOD(mem16) Remainder
  • 14. 2. Arithmetic Instructions Instruction Set 14 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… CMP reg2/mem, reg1/ mem CMP reg2, reg1 CMP reg2, mem CMP mem, reg1 Modify flags  (reg2) – (reg1) If (reg2) > (reg1) then CF=0, ZF=0, SF=0 If (reg2) < (reg1) then CF=1, ZF=0, SF=1 If (reg2) = (reg1) then CF=0, ZF=1, SF=0 Modify flags  (reg2) – (mem) If (reg2) > (mem) then CF=0, ZF=0, SF=0 If (reg2) < (mem) then CF=1, ZF=0, SF=1 If (reg2) = (mem) then CF=0, ZF=1, SF=0 Modify flags  (mem) – (reg1) If (mem) > (reg1) then CF=0, ZF=0, SF=0 If (mem) < (reg1) then CF=1, ZF=0, SF=1 If (mem) = (reg1) then CF=0, ZF=1, SF=0
  • 15. 2. Arithmetic Instructions Instruction Set 15 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… CMP reg/mem, data CMP reg, data CMP mem, data Modify flags  (reg) – (data) If (reg) > data then CF=0, ZF=0, SF=0 If (reg) < data then CF=1, ZF=0, SF=1 If (reg) = data then CF=0, ZF=1, SF=0 Modify flags  (mem) – (mem) If (mem) > data then CF=0, ZF=0, SF=0 If (mem) < data then CF=1, ZF=0, SF=1 If (mem) = data then CF=0, ZF=1, SF=0
  • 16. 2. Arithmetic Instructions Instruction Set 16 8086 Microprocessor Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP… CMP A, data CMP AL, data8 CMP AX, data16 Modify flags  (AL) – data8 If (AL) > data8 then CF=0, ZF=0, SF=0 If (AL) < data8 then CF=1, ZF=0, SF=1 If (AL) = data8 then CF=0, ZF=1, SF=0 Modify flags  (AX) – data16 If (AX) > data16 then CF=0, ZF=0, SF=0 If (mem) < data16 then CF=1, ZF=0, SF=1 If (mem) = data16 then CF=0, ZF=1, SF=0
  • 17. 3. Logical Instructions Instruction Set 17 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 18. 3. Logical Instructions Instruction Set 18 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 19. 3. Logical Instructions Instruction Set 19 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 20. 3. Logical Instructions Instruction Set 20 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 21. 3. Logical Instructions Instruction Set 21 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 22. 3. Logical Instructions Instruction Set 22 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 23. 3. Logical Instructions Instruction Set 23 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 24. 3. Logical Instructions Instruction Set 24 8086 Microprocessor Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
  • 25. 4. String Manipulation Instructions Instruction Set 25 8086 Microprocessor  String : Sequence of bytes or words  8086 instruction set includes instruction for string movement, comparison, scan, load and store.  REP instruction prefix : used to repeat execution of string instructions  String instructions end with S or SB or SW. S represents string, SB string byte and SW string word.  Offset or effective address of the source operand is stored in SI register and that of the destination operand is stored in DI register.  Depending on the status of DF, SI and DI registers are automatically updated.  DF = 0  SI and DI are incremented by 1 for byte and 2 for word.  DF = 1  SI and DI are decremented by 1 for byte and 2 for word.
  • 26. 4. String Manipulation Instructions Instruction Set 26 8086 Microprocessor Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS REP REPZ/ REPE (Repeat CMPS or SCAS until ZF = 0) REPNZ/ REPNE (Repeat CMPS or SCAS until ZF = 1) While CX  0 and ZF = 1, repeat execution of string instruction and (CX)  (CX) – 1 While CX  0 and ZF = 0, repeat execution of string instruction and (CX)  (CX) - 1
  • 27. 4. String Manipulation Instructions Instruction Set 27 8086 Microprocessor Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS MOVS MOVSB MOVSW MA = (DS) x 1610 + (SI) MAE = (ES) x 1610 + (DI) (MAE)  (MA) If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1 If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1 MA = (DS) x 1610 + (SI) MAE = (ES) x 1610 + (DI) (MAE ; MAE + 1)  (MA; MA + 1) If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2 If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2
  • 28. 4. String Manipulation Instructions Instruction Set 28 8086 Microprocessor Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS CMPS CMPSB CMPSW MA = (DS) x 1610 + (SI) MAE = (ES) x 1610 + (DI) Modify flags  (MA) - (MAE) If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0 If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1 If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0 For byte operation If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1 If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1 For word operation If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2 If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2 Compare two string byte or string word
  • 29. 4. String Manipulation Instructions Instruction Set 29 8086 Microprocessor Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS SCAS SCASB SCASW MAE = (ES) x 1610 + (DI) Modify flags  (AL) - (MAE) If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0 If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1 If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0 If DF = 0, then (DI)  (DI) + 1 If DF = 1, then (DI)  (DI) – 1 MAE = (ES) x 1610 + (DI) Modify flags  (AL) - (MAE) If (AX) > (MAE ; MAE + 1), then CF = 0; ZF = 0; SF = 0 If (AX) < (MAE ; MAE + 1), then CF = 1; ZF = 0; SF = 1 If (AX) = (MAE ; MAE + 1), then CF = 0; ZF = 1; SF = 0 If DF = 0, then (DI)  (DI) + 2 If DF = 1, then (DI)  (DI) – 2 Scan (compare) a string byte or word with accumulator
  • 30. 4. String Manipulation Instructions Instruction Set 30 8086 Microprocessor Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS LODS LODSB LODSW MA = (DS) x 1610 + (SI) (AL)  (MA) If DF = 0, then (SI)  (SI) + 1 If DF = 1, then (SI)  (SI) – 1 MA = (DS) x 1610 + (SI) (AX)  (MA ; MA + 1) If DF = 0, then (SI)  (SI) + 2 If DF = 1, then (SI)  (SI) – 2 Load string byte in to AL or string word in to AX
  • 31. 4. String Manipulation Instructions Instruction Set 31 8086 Microprocessor Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS STOS STOSB STOSW MAE = (ES) x 1610 + (DI) (MAE)  (AL) If DF = 0, then (DI)  (DI) + 1 If DF = 1, then (DI)  (DI) – 1 MAE = (ES) x 1610 + (DI) (MAE ; MAE + 1 )  (AX) If DF = 0, then (DI)  (DI) + 2 If DF = 1, then (DI)  (DI) – 2 Store byte from AL or word from AX in to string
  • 32. Mnemonics Explanation STC Set CF  1 CLC Clear CF  0 CMC Complement carry CF  CF/ STD Set direction flag DF  1 CLD Clear direction flag DF  0 STI Set interrupt enable flag IF  1 CLI Clear interrupt enable flag IF  0 NOP No operation HLT Halt after interrupt is set WAIT Wait for TEST pin active ESC opcode mem/ reg Used to pass instruction to a coprocessor which shares the address and data bus with the 8086 LOCK Lock bus during next instruction 5. Processor Control Instructions Instruction Set 32 8086 Microprocessor
  • 33. 6. Control Transfer Instructions Instruction Set 33 8086 Microprocessor Transfer the control to a specific destination or target instruction Do not affect flags Mnemonics Explanation CALL reg/ mem/ disp16 Call subroutine RET Return from subroutine JMP reg/ mem/ disp8/ disp16 Unconditional jump  8086 Unconditional transfers
  • 34. 6. Control Transfer Instructions Instruction Set 34 8086 Microprocessor  8086 signed conditional branch instructions  8086 unsigned conditional branch instructions Checks flags If conditions are true, the program control is transferred to the new memory location in the same segment by modifying the content of IP
  • 35. 6. Control Transfer Instructions Instruction Set 35 8086 Microprocessor Name Alternate name JE disp8 Jump if equal JZ disp8 Jump if result is 0 JNE disp8 Jump if not equal JNZ disp8 Jump if not zero JG disp8 Jump if greater JNLE disp8 Jump if not less or equal JGE disp8 Jump if greater than or equal JNL disp8 Jump if not less JL disp8 Jump if less than JNGE disp8 Jump if not greater than or equal JLE disp8 Jump if less than or equal JNG disp8 Jump if not greater  8086 signed conditional branch instructions  8086 unsigned conditional branch instructions Name Alternate name JE disp8 Jump if equal JZ disp8 Jump if result is 0 JNE disp8 Jump if not equal JNZ disp8 Jump if not zero JA disp8 Jump if above JNBE disp8 Jump if not below or equal JAE disp8 Jump if above or equal JNB disp8 Jump if not below JB disp8 Jump if below JNAE disp8 Jump if not above or equal JBE disp8 Jump if below or equal JNA disp8 Jump if not above
  • 36. 6. Control Transfer Instructions Instruction Set 36 8086 Microprocessor Mnemonics Explanation JC disp8 Jump if CF = 1 JNC disp8 Jump if CF = 0 JP disp8 Jump if PF = 1 JNP disp8 Jump if PF = 0 JO disp8 Jump if OF = 1 JNO disp8 Jump if OF = 0 JS disp8 Jump if SF = 1 JNS disp8 Jump if SF = 0 JZ disp8 Jump if result is zero, i.e, Z = 1 JNZ disp8 Jump if result is not zero, i.e, Z = 1  8086 conditional branch instructions affecting individual flags
  • 37. 8086 Instruction Set: Summary AND Logical AND of byte or word NOT Logical NOT of byte or word OR Logical OR of byte or word RCL Rotate left trough carry byte or word RCR Rotate right trough carry byte or word ROL Rotate left byte or word ROR Rotate right byte or word SAL Arithmetic shift left byte or word SAR Arithmetic shift right byte or word SHL Logical shift left byte or word SHR Logical shift right byte or word TEST Test byte or word XOR Logical exclusive-OR of byte or word CMPS Compare byte or word string LODS Load byte or word string IN Input byte or word from port OUT Output byte or word to MOV Move to/from register/memory MOVS Move byte or word string MOVSB Move string byte MOVSW Move string word
  • 38. 8086 Instruction Set: Summary 38 DAA Decimal adjust for addition DAS Decimal adjust for subtraction DEC Decrement byte or word by one DIV Divide byte or word IDIV Integer divide byte or word IMUL Integer multiply byte or word INC Increment byte or word by one MUL Multiply byte or word (unsigned) NEG Negate byte or word SBB Subtract byte or word and carry (borrow) SUB Subtract byte or word REP Repeat REPE Repeat while equal REPZ Repeat while zero REPNE Repeat while not equal REPNZ Repeat while not zero SCAS Scan byte or word string STOS Store byte or word string
  • 39. 8086 Instruction Set: Summary LAHF Load AH from flags LDS Load pointer using data segment LEA Load effective address LES Load pointer using extra segment port POP Pop word off stack POPF Pop flags off stack PUSH Push word onto stack PUSHF Push flags onto stack SAHF Store AH into flags XCHG Exchange byte or word XLAT Translate byte AAA ASCII adjust for addition AAD ASCII adjust for division AAM ASCII adjust for multiply AAS ASCII adjust for subtraction ADC Add byte or word plus carry ADD Add byte or word CBW Convert byte or word CMP Compare byte or word CWD Convert word to double-word
  • 40. Assemble Directives 40 8086 Microprocessor Instructions to the Assembler regarding the program being executed. Control the generation of machine codes and organization of the program; but no machine codes are generated for assembler directives. Also called ‘pseudo instructions’ Used to : › specify the start and end of a program › attach value to variables › allocate storage locations to input/ output data › define start and end of segments, procedures, macros etc..
  • 41. Assemble Directives 41 8086 Microprocessor Define Byte Define a byte type (8-bit) variable Reserves specific amount of memory locations to each variable Range : 00H – FFH for unsigned value; 00H – 7FH for positive value and 80H – FFH for negative value General form : variable DB value/ values Example: LIST DB 7FH, 42H, 35H Three consecutive memory locations are reserved for the variable LIST and each data specified in the instruction are stored as initial value in the reserved memory location DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC FAR NEAR ENDP SHORT MACRO ENDM
  • 42. Assemble Directives 42 8086 Microprocessor Define Word Define a word type (16-bit) variable Reserves two consecutive memory locations to each variable Range : 0000H – FFFFH for unsigned value; 0000H – 7FFFH for positive value and 8000H – FFFFH for negative value General form : variable DW value/ values Example: ALIST DW 6512H, 0F251H, 0CDE2H Six consecutive memory locations are reserved for the variable ALIST and each 16-bit data specified in the instruction is stored in two consecutive memory location. DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC FAR NEAR ENDP SHORT MACRO ENDM
  • 43. Assemble Directives 43 8086 Microprocessor SEGMENT : Used to indicate the beginning of a code/ data/ stack segment ENDS : Used to indicate the end of a code/ data/ stack segment General form: Segnam SEGMENT … … … … … … Segnam ENDS Program code or Data Defining Statements User defined name of the segment DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC FAR NEAR ENDP SHORT MACRO ENDM
  • 44. Assemble Directives 44 8086 Microprocessor DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC FAR NEAR ENDP SHORT MACRO ENDM Informs the assembler the name of the program/ data segment that should be used for a specific segment. General form: Segment Register ASSUME segreg : segnam, .. , segreg : segnam User defined name of the segment ASSUME CS: ACODE, DS:ADATA Tells the compiler that the instructions of the program are stored in the segment ACODE and data are stored in the segment ADATA Example:
  • 45. Assemble Directives 45 8086 Microprocessor DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC FAR NEAR ENDP SHORT MACRO ENDM ORG (Origin) is used to assign the starting address (Effective address) for a program/ data segment END is used to terminate a program; statements after END will be ignored EVEN : Informs the assembler to store program/ data segment starting from an even address EQU (Equate) is used to attach a value to a variable ORG 1000H Informs the assembler that the statements following ORG 1000H should be stored in memory starting with effective address 1000H LOOP EQU 10FEH Value of variable LOOP is 10FEH _SDATA SEGMENT ORG 1200H A DB 4CH EVEN B DW 1052H _SDATA ENDS In this data segment, effective address of memory location assigned to A will be 1200H and that of B will be 1202H and 1203H. Examples:
  • 46. Assemble Directives 46 8086 Microprocessor DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC ENDP FAR NEAR SHORT MACRO ENDM PROC Indicates the beginning of a procedure ENDP End of procedure FAR Intersegment call NEAR Intrasegment call General form procname PROC[NEAR/ FAR] … … … RET procname ENDP Program statements of the procedure Last statement of the procedure User defined name of the procedure
  • 47. Assemble Directives 47 8086 Microprocessor DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC ENDP FAR NEAR SHORT MACRO ENDM ADD64 PROC NEAR … … … RET ADD64 ENDP The subroutine/ procedure named ADD64 is declared as NEAR and so the assembler will code the CALL and RET instructions involved in this procedure as near call and return CONVERT PROC FAR … … … RET CONVERT ENDP The subroutine/ procedure named CONVERT is declared as FAR and so the assembler will code the CALL and RET instructions involved in this procedure as far call and return Examples:
  • 48. Assemble Directives 48 8086 Microprocessor DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC ENDP FAR NEAR SHORT MACRO ENDM Reserves one memory location for 8-bit signed displacement in jump instructions JMP SHORT AHEAD The directive will reserve one memory location for 8-bit displacement named AHEAD Example:
  • 49. Assemble Directives 49 8086 Microprocessor DB DW SEGMENT ENDS ASSUME ORG END EVEN EQU PROC ENDP FAR NEAR SHORT MACRO ENDM MACRO Indicate the beginning of a macro ENDM End of a macro General form: macroname MACRO[Arg1, Arg2 ...] … … … macroname ENDM Program statements in the macro User defined name of the macro