8051 Timers / Counters

8051 Timers / Counters

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  8051 Timers /Counters José Borges ,Patrício Lima, Marcos Brito, Marek Mastyło, Jakub Nyk GROUP 4 DEEC –MPIN FEUP April, 2010 April 10
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  Outlines 1. Introduction 2. 8051 Timer/Counter 3. Operating Modes 4. Timer Vs Counter 5. T/C and Interruptions 6. Application Examples 7. Conclusion April 10 2
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  Introduction  General Function: • Calculating the amounts of time between events • Counting events • Generating baud rate for serial port April 10 3
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  Introduction  Applications: • Communication ̵ Generating rectangular pulses (signal modulation) ̵ Watchdog timers • Manufacturing Industry - Counting objects - Measuring intervals • Etc April 10 4
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  Introduction  8051 containstwo 16-bits timers • T0 • T1  Two different types of timer: • Interval timer • Counter  Maximum value is 65536  Initial state can be set by user April 10 5
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  Timer/Counter Special Function Registers  Timers/Counters can be operated by user with special function registers  T0 and T1 share two SFRs: TMOD and TCON  Each timer has also two registers dedicated to itself: TH0/TL0 and TH1/TL1 April 10 6
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  Timer/Counter Special Function Registers-TMOD  TMOD (Timer Mode Register) is a non-bit- addressable, 8-bit register: Reference: http://fivedots.coe.psu.ac.th/~cj/asm/slides/mcs51/timer2.pdf April 10 7
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  Timer/Counter Special Function Registers-TMOD  Lower 4 bits are for Timer0  Upper 4 bits are for Timer1  GATE bit is used for choice of internal or external control: • GATE=0 is for internal control, start and stop are controlled by software • GATE=1 is for external control, start and stop are controlled by software and and external source  C/T bit decides about timer type: interval timer or counter April 10 8
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  Timer/Counter Special Function Registers-TMOD  M0 and M1 bits are used to set timer mode (the same for Timer0 and Timer1)  8051 delivers 4 timer modes: M1 M0 Mode Description 0 0 Mode 0 13-bit timer 0 1 Mode 1 16-bit timer 1 0 Mode 2 8-bit auto reload 1 1 Mode 3 Split timer mode April 10 9
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  Timer/Counter Special Function Registers-TCON  TCON (Timer Control Register) is a bit- addressable, 8-bit register where 4 upper bits are responsible for timers/counters: Reference: http://fivedots.coe.psu.ac.th/~cj/asm/slides/mcs51/timer2.pdf April 10 10
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  Timer/Counter Special Function Registers-TCON  TR0 and TR1 are set by user to turn on (or turn off) Timer0 or Timer1: • TR=0 – turn off • TR=1 – turn on  TF0 and TF1 are Timer Flags informing about overflow (then TF=1 and interrupt could be activate if it’s set, should be cleaned) April 10 11
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  Timer/Counter Special Function Registers-TCON  Equivalent instructions for TCON: • Timer0: - SETB TR0 = SETB TCON.4 - CLR TR0 = CLR TCON.4 - SETB TF0 = SETB TCON.5 - CLR TF0 = CLR TCON.5 • Timer1 - SETB TR1 = SETB TCON.6 - CLR TR1 = CLR TCON.6 - SETB TF1 = SETB TCON.7 - CLR TF1 = CLR TCON.7 April 10 12
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  Timer/Counter Special Function Registers-TL/TH  TH0 and TL0 are upper and lower registers of Timer0  TH1 and TL1 are upper and lower registers of Timer1  They help to set initial value of timer/counter April 10 13
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  Timer Vs Counter Differences  Timer • Counts machine cycles  Counters: • Counts events as a result of falling slope of external input signal put on a pin  Timer mode and counter mode are relative to machine cycle April 10 14
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  Timer Vs Counter Differences  Timer • Input from internal system clock  Counters: • Show the number of events on registers • External input from T0 input pin (P3.4) for Counter 0 • External input from T1 input pin (P3.5) for Counter 1 • External input from Tx input pin. • We use Tx to denote T0 or T1 April 10 15
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  Timer Modes Mode 0  Mode 0 is identical for Timer0 and Timer1  Timers work as 13-bit counters, an interrupt is generated when counter overflows. It takes 8192 input pulses to generate the next interrupt  Timers use 8 bits of THi and 5 lower bits of TLi  After timer overflows TFi (Timer Flag in TCON) is set, an interrupt occurs Where i=0,1 April 10 16
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  Timer Modes Mode 0  Structure of Timer1 in mode 0: Reference: Tomasz Starecki; Mikrokontrolery 8051 w praktyce, Twarda oprawa, 2002. ISBN: 83-910067-4-3, Pic. 3.1 April 10 17
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  Timer Modes Mode 1  Similar to mode 0  Timers use 8 bits of THi and 8 bits of TLi  Timer is a 16-bit counter, it takes 65536 input pulses to generate the next interrupt  Improved capacity April 10 18
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  Timer Modes Mode 1  Structure of Timer0 in mode 1: Reference: Tomasz Starecki; Mikrokontrolery 8051 w praktyce, Twarda oprawa, 2002. ISBN: 83-910067-4-3, Pic. 3.1 April 10 19
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  Timer Modes Mode 2  Timers are 8-bit auto reload  Timer is operated by TLi, when TLi overflows TFi is set  TLi is auto reloaded with Thi value when overflows  THi is never modified when TLi overflows April 10 20
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  Timer Modes Mode 2  Structure of Timer1 in mode 2: Reference: Tomasz Starecki; Mikrokontrolery 8051 w praktyce, Twarda oprawa, 2002. ISBN: 83-910067-4-3, Pic. 3.1 April 10 21
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  Timer Modes Mode 3  Split-timer mode  Timer1 can be put in other modes  Timer0 operates TL0 and TH0 as two separate 8-bit timers/counters  TL0 works as a 8-bit timer/counter  TH0 is a 8-bit timer which counts machine cycles  Timer0 is operated with TF0 and TR0, TF1 and TR1 are not used April 10 22
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  Timer Modes Mode 3  Structure of Timer1 in mode 3: Reference: Tomasz Starecki; Mikrokontrolery 8051 w praktyce, Twarda oprawa, 2002. ISBN: 83-910067-4-3, Pic. 3.1 April 10 23
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  Timer Modes Example  Choose mode 1 for Timer:  MOV TMOD,#01H  Set the value of TH0 and TL0:  MOV TH0,#FFH  MOV TL0,#FCH  Clear Timer flag and start the timer:  CLR TF0  SETB TR0 April 10 24
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  Timer Modes Example  The 8051 starts to count up by incrementing the TH0-TL0  TH0-TL0= FFFCH,FFFDH,FFFEH,FFFFH,0000H Reference: http://www.iau-neyshabur.ac.ir/nokhodchian/5-timer(part%201).ppt April 10 25
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  How does atimer count?  Timer/Counter counts up  It is incremented by microcontroller • Timer is incremented every machine cycle • Coutner is incremented when event is detected April 10 26
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  How does atimer count?  A single machine cycle consists of 12 crystal pulses, thus timer will count: 11 059 000 / 12 = 921 583 per second April 10 27
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  How does atimer count?  Example: How many times will the timer be incremented in 0.05 seconds? 0.05 * 921 583 = 46 079.15 times  Accuracy is not perfect April 10 28
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  How does atimer count?  Timer/Counter counts up  It is incremented by microcontroller • Timer is incremented every machine cycle • Coutner is incremented when event is detected April 10 29
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  How does atimer count?  A single machine cycle consists of 12 crystal pulses, thus timer will count: 11 059 000 / 12 = 921 583 per second April 10 30
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  How does atimer count?  Example: How many times will the timer be incremented in 0.05 seconds? 0.05 * 921 583 = 46 079.15 times  Accuracy is not perfect April 10 31
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  Timer/ Counter and Interruptions  Timer/ Counter can be configured to start an interruption routine Reference: Philips Semiconductors – Family 8051 April 10 32
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  How a timer interruption occurs  Some Special Registers are used • ET0 and ET1 from Interruption Enable Register • PT0 and T1 from Interruption Priority Register • TF0 and TF1 from T/C Control Register April 10 April 10 33 33
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  How a timer interruption occurs  Timer/counter interruption process : • ET bit must be set • TR bit must be set to run the timer • The interruption is initialized when overflow occurs April 10 April 10 34 34
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  How a timer interruption occurs  In this point the Timer overflow Flag is cleared by hardware Reference: Philips Semiconductors – Family 8051 April 10 35
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  Software overflow detection  How the overflow can be detected if interruption is not enable? • In some cases ,it’s not necessary to enable an interruption • In this case the overflow is detected by software • A routine is necessary to check constantly the overflow occurrence April 10 36
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  Software overflow detection • The overflow occurs when the TF is high • TF must be cleared to by software to turn ON the timer April 10 37
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  Software overflow detection  Delay routine example without enable interruption: cseg at 0000h jmp main … main: … … setb tr0 acall delay50ms … … delay50ms: mov TL0,#low(46080) mov TH0,#high(46080) clr TF0 jnb TF0,$ ret April 10 38
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  Application Example Digital Clock  Circuit schematic • Interface with LCD display and serial port. April 10 39
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  Application Example Digital Clock  Interruption configuration • IE mov IE,#10010010b Or setb EA setb ES setb ET0 April 10 40
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  Application Example Digital Clock  Interruption configuration • TCON orl TCON,#00101000b Or setb TR0 setb TR1 April 10 41
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  Application Example Digital Clock  Interruption configuration • TMOD mov TMOD,#00100001b Not bit adressable April 10 42
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  Application Example Digital Clock  Interruption configuration • SCON mov SCON,#01110000b Or setb SM1 setb SM2 setb REN April 10 43
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  Application Example Digital Clock  Interruption configuration • Serial port baud rate mov TH1,#0xFD • TH1 = TL1=253 mov TH1, TL1 11.0592𝑀𝐻𝑧 𝑏𝑎𝑢𝑑 𝑟𝑎𝑡𝑒 = 2 ∗ 32 ∗ 12 ∗ 256 − 253 𝑏𝑎𝑢𝑑 𝑟𝑎𝑡𝑒 = 19200 April 10 44
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  Application Example Digital Clock  Interruption configuration Problem : • 8051 only count up to 65536 us How we count 1 second ? April 10 45
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  Application Example Digital Clock  Interruption configuration TIMER equ 65536-46080 Solution : mov TL0,#high(TIMER) • Count 20*50ms mov TH0,#low(TIMER) 12 50000𝑢𝑠 = ∗ 𝐶𝑖𝑐𝑙𝑒𝑠 11.0592𝑀ℎ𝑧 𝑐𝑖𝑐𝑙𝑒𝑠 = 46080 April 10 46
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  Application Example Digital Clock  Interruption configuration mov IE,#10010010b mov TMOD,#00100001b orl TCON,#00101000b mov SCON,#01110000b mov TH1,#0xFD mov TH1, TL1 mov TL0,#high(TIMER) mov TH0,#low(TIMER) April 10 47
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  Application Example Digital Clock DIGITAL CLOCK VDD VSS VEE RW RS D0 D1 D2 D3 D4 D5 D6 D7 E 1 2 3 4 5 6 7 8 9 10 11 12 13 14 mov IE,#10010010b GND VDD mov TMOD,#00100001b RXD TXD C1 33p C2 33p orl TCON,#00101000b RTS CTS X1 mov U1 19 XTAL1 SCON,#01110000b AD[0..7] 11.0592MHz mov 18 XTAL2 TH1,#0xFD A[8..15] 30 mov TH1, TL1 ALE 31 EA 9 29 RST PSEN mov 1 2 P1.0 TL0,#high(TIMER) P3.0/RXD 10 11 P1.1 P3.1/TXD 3 12 mov TH0,#low(TIMER) P1.2 P3.2/INT0 4 13 P1.3 P3.3/INT1 5 14 P1.4 P3.4/T0 6 15 P1.5 P3.5/T1 7 16 P1.6 P3.6/WR 8 17 P1.7 P3.7/RD 8051 April 10 48
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  Application Example Counter w/ Ext. Enabler +1 0 1 1 0 0 1 0 1 April 10 49
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  Application Example Ledsequ P1 overflow equ R0 Counter w/ Ext. Enabler cseg at 00h jmp main cseg at 1bh Initialization jmp Timer1 ;Counter/ Timer 1 Int. cseg at 40h Timer1: Counter inc overflow ;Do a Task Leds = TL1 Interrupt TF1 reti main: Return mov IE,#88H ;Enables the Timer1 mov TMOD,#0E0h ;Gate =1, Counter selected, Mode 2 Do a Task mov TH1,#00h ;With 00h it counts 255 times mov TL1,#00h setb TR1 ;Begin to count Led: mov Leds,TL1 ; shows the value with Leds of the actual count jmp Led end April 10 50
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  Application Example Digital Clock  Reference: • http://www.8052.com/tuttimer.phtml • http://www.8052.com/tutlcd2.php • http://www.8051projects.net/lcd- interfacing/introduction.php • ISIS Proteus - http://www.labcenter.co.uk/download/prodemo_d ownload.cfm#professional • Philips Semiconductors - 80C51 Family April 10 51
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  Thank you! April 10 52