diff options
| author | Maxime Chevalier-Boisvert <[email protected]> | 2022-05-18 14:41:43 -0400 |
|---|---|---|
| committer | Takashi Kokubun <[email protected]> | 2022-08-29 08:46:53 -0700 |
| commit | 369911d31de0446dbee805a5e4ddd5691518e6ff (patch) | |
| tree | abd56950518a1a1906aa8b6921c8f7414d438a6b /yjit/src/backend/x86_64/mod.rs | |
| parent | a2aa289594352db98b893aae716cebae0556a20e (diff) | |
Add dbg!() for Assembler. Fix regalloc issue.
Diffstat (limited to 'yjit/src/backend/x86_64/mod.rs')
| -rw-r--r-- | yjit/src/backend/x86_64/mod.rs | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs index 67e220fd8b..2eb12e3d27 100644 --- a/yjit/src/backend/x86_64/mod.rs +++ b/yjit/src/backend/x86_64/mod.rs @@ -18,9 +18,12 @@ pub const SP: Opnd = Opnd::Reg(RBX_REG); impl From<Opnd> for X86Opnd { fn from(opnd: Opnd) -> Self { match opnd { + // NOTE: these operand types need to be lowered first //Value(VALUE), // Immediate Ruby value, may be GC'd, movable //InsnOut(usize), // Output of a preceding instruction in this block + Opnd::InsnOut(idx) => panic!("InsnOut operand made it past register allocation"), + Opnd::None => X86Opnd::None, Opnd::UImm(val) => uimm_opnd(val), @@ -59,18 +62,19 @@ impl Assembler Op::Comment => {}, Op::Label => {}, - Op::Add => { - - //add(cb, ) + Op::Add => add(cb, insn.opnds[0].into(), insn.opnds[1].into()), + /* + Load + Store, + */ + Op::Mov => add(cb, insn.opnds[0].into(), insn.opnds[1].into()), - }, + // Test and set flags + Op::Test => add(cb, insn.opnds[0].into(), insn.opnds[1].into()), /* - Load - Store, - Mov, Test, Cmp, Jnz, |