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| author | Hiroshi SHIBATA <[email protected]> | 2023-12-25 13:48:26 +0900 |
|---|---|---|
| committer | Hiroshi SHIBATA <[email protected]> | 2023-12-25 13:50:23 +0900 |
| commit | 863ded45a18773742cf3adab0f6deb4ba6b47c6e (patch) | |
| tree | d7199b790db14ef755c689747351943921ca32a6 /yjit/src/backend | |
| parent | 2cdbeb29e6e06d3492e2d4a388558ab883b07150 (diff) | |
Typofix under bootstraptest, spec and yjit directories
Diffstat (limited to 'yjit/src/backend')
| -rw-r--r-- | yjit/src/backend/x86_64/mod.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/yjit/src/backend/x86_64/mod.rs b/yjit/src/backend/x86_64/mod.rs index 043139f492..25c92642d3 100644 --- a/yjit/src/backend/x86_64/mod.rs +++ b/yjit/src/backend/x86_64/mod.rs @@ -135,7 +135,7 @@ impl Assembler // Opnd::Value operands into registers here because: // // - Most instructions can't be encoded with 64-bit immediates. - // - We look for Op::Load specifically when emiting to keep GC'ed + // - We look for Op::Load specifically when emitting to keep GC'ed // VALUEs alive. This is a sort of canonicalization. let mut unmapped_opnds: Vec<Opnd> = vec![]; |