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📄 Easily create your resume with Markdown on VSCode / Typora / Obsidian

CSS 4,018 257 Updated Sep 28, 2025

Verilog/SystemVerilog Syntax and Omni-completion

Vim Script 412 93 Updated Oct 13, 2024

pathogen.vim: manage your runtimepath

Vim Script 12,144 1,154 Updated Aug 24, 2022

Must-have verilog systemverilog modules

Verilog 1,897 411 Updated Aug 2, 2025

lib, demo, model, data

Java 1 Updated Apr 11, 2022

Vdoing主题博客模板

JavaScript 1 Updated Aug 4, 2022

🚀一款简洁高效的VuePress知识管理&博客(blog)主题

Vue 1 Updated Aug 24, 2022

RISC-V Tools (ISA Simulator and Tests)

Shell 1 Updated Dec 22, 2022

Rocket Chip Generator

Scala 1 Updated Dec 3, 2024

Giter8 template for a simple hello world app in Scala.

Scala 1 Updated Dec 26, 2024

个人博客

Vue 1 Updated Aug 28, 2022

Spike, a RISC-V ISA Simulator

C 1 Updated Jan 3, 2025

AutoGPT is the vision of accessible AI for everyone, to use and to build on. Our mission is to provide the tools, so that you can focus on what matters.

Python 180,623 46,206 Updated Dec 29, 2025

automatic-verilog based on vimscript

Vim Script 280 81 Updated Oct 24, 2023

UESTC Thesis Latex Template 2023. It fully supports the latest format specification in 2023, supports independent symbol table, abbreviation table, and complete and fully customizable Academic/Prof…

TeX 420 83 Updated Feb 8, 2025

《如何使用 LaTeX 排版论文》讲稿

TeX 1 Updated Apr 18, 2022

一步一步写MIPS CPU

Verilog 846 160 Updated Aug 4, 2021

Verilog library for ASIC and FPGA designers

Verilog 1 Updated Nov 27, 2021
HTML 1 Updated Aug 28, 2022