Native Debugger plugin for RISC-V by moste00 · Pull Request #5966 · rizinorg/rizin

moste00 · 2026-02-25T23:06:32Z

Your checklist for this pull request

I've read the guidelines for contributing to this repository.
I made sure to follow the project's coding style.
I've documented every RZ_API function and struct this PR changes.
I've added tests that prove my changes are effective (required for changes to RZ_API).
I've updated the Rizin book with the relevant information (if needed).
I've used AI tools to generate fully or partially these code changes and I'm sure the changes are not copyrighted by somebody else.

Detailed description

...

Test plan

...

Closing issues

...

notxvilka

@wargio @well-mannered-goat take a look too, please

well-mannered-goat

LGTM

wargio · 2026-03-08T06:19:45Z

i dont like passing thr RzIO layer here. i would prefer to invoke the disassembler and thenpassing down the disassembled instruction

moste00 · 2026-03-18T03:28:43Z

Depends-on: #6029

codecov · 2026-03-18T04:35:21Z

Codecov Report

❌ Patch coverage is 31.25000% with 44 lines in your changes missing coverage. Please review.
✅ Project coverage is 48.29%. Comparing base (2d2e47c) to head (b68091b).
⚠️ Report is 4 commits behind head on dev.

Files with missing lines	Patch %	Lines
librz/debug/p/native/bt/fuzzy-all.c	0.00%	11 Missing ⚠️
librz/debug/p/native/bt.c	23.07%	8 Missing and 2 partials ⚠️
librz/arch/p/asm/asm_riscv_cs.c	0.00%	8 Missing ⚠️
librz/arch/p/asm/asm_arm_cs.c	0.00%	4 Missing ⚠️
librz/arch/p/asm/asm_bf.c	0.00%	2 Missing ⚠️
librz/arch/p/asm/asm_mips_cs.c	0.00%	2 Missing ⚠️
librz/arch/p/asm/asm_ppc_cs.c	0.00%	2 Missing ⚠️
librz/arch/p/asm/asm_sh.c	0.00%	2 Missing ⚠️
librz/core/core.c	85.71%	0 Missing and 2 partials ⚠️
librz/bin/format/elf/elf_notes.c	50.00%	0 Missing and 1 partial ⚠️

Additional details and impacted files

Files with missing lines	Coverage Δ
librz/arch/asm.c	`54.68% <100.00%> (ø)`
librz/arch/p/asm/asm_x86_zydis.c	`75.29% <100.00%> (ø)`
librz/debug/p/native/linux/linux_coredump.c	`0.00% <ø> (ø)`
librz/debug/p/native/linux/linux_debug.c	`33.33% <ø> (-0.23%)`	⬇️
librz/include/rz_asm.h	`25.00% <ø> (ø)`
librz/bin/format/elf/elf_notes.c	`66.33% <50.00%> (-0.17%)`	⬇️
librz/arch/p/asm/asm_bf.c	`58.69% <0.00%> (ø)`
librz/arch/p/asm/asm_mips_cs.c	`63.04% <0.00%> (ø)`
librz/arch/p/asm/asm_ppc_cs.c	`65.85% <0.00%> (ø)`
librz/arch/p/asm/asm_sh.c	`65.00% <0.00%> (ø)`
... and 5 more

... and 3 files with indirect coverage changes

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notxvilka

Great! Indeed, further improvements could be done in separate PRs.

wargio

please do not use the private headers unless you are in the correct namespace.

Example: asm_private.h can be used only in RzArch sources

well-mannered-goat · 2026-04-23T07:46:26Z

Can you add some signal tests too? Since I need to solve an issue #5332 related to it.

Sorry I don't understand, do you mean you have some ready tests that I should commit to this PR with my write permissions, or that I should write new tests about some signals ? Also the issue you mentioned doesn't mention RISC-V so why it's related to this PR.

I meant to write some tests. But leave it for now, since anyways i have to work on PR i'll see about that 😅

…cktraces

…tion

moste00 · 2026-04-25T22:59:11Z

@wargio done.

wargio · 2026-04-26T02:01:22Z

+	if (list) {
+		pcname = rz_reg_get_name(dbg->reg, RZ_REG_NAME_LR);
+		if (pcname) {
+			ut64 addr = rz_reg_getv(dbg->reg, pcname);
+			frame = RZ_NEW0(RzDebugFrame);
+			frame->addr = addr;
+			frame->size = 0;
+			rz_list_prepend(list, frame);
+		}
+	}


invert and early return

@moste00 @wargio I will merge as is to unblock other dependent PRs, please send a separate PR for that change.

wargio

one small change and for me can be merged

…ments,failcases for ops_count<n_lines(memory reading),return 0 if vector is null() fix typo format fixes updated test cases librz/io: fix book link in io_mach (rizinorg#6285) librz/debug: fix coredump creation on macOS * librz/debug: fix coredump creation on xnu * librz/debug: fix numbers of vmmap entries in xnu * test/db/archos/darwin-arm64: add coredump test tools/rz: Revert weird-looking test (rizinorg#6288) * tools/rz: Revert weird-looking test * Do `dos2unix` on whole file librz/debug: native debugger plugin for RISC-V (rizinorg#5966) * added breakpoints and stepping * add link register to allow single-stepping a ret instruction, fix stacktraces * refactor to avoid passing the IO layer structs to the breakpoint function * add tests, refine the stacktrace to not include non-function * add register information for core file parsing * core file generation for RISC-V * make tests run under riscv-64 * make tests run under riscv-32 Fix rz_vector_set() behavior to match the rz_pvector version one. (rizinorg#6274) * Fix rz_vector_set() behavior to match the rz_pvector version one. * Use existing vector functions for setting elements. librz/bin: ELF coredump parsing support for RISC-V (rizinorg#6266) librz/bin: ELF coredump parsing support for s390x (rizinorg#6271) librz/bin: ELF coredump parsing support for LoongArch (rizinorg#6273) Fix qnx out of bound reads and writes. (rizinorg#6292) build(deps): bump actions/upload-artifact from 4 to 7 (rizinorg#6229) Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact) from 4 to 7. - [Release notes](https://github.com/actions/upload-artifact/releases) - [Commits](actions/upload-artifact@v4...v7) --- updated-dependencies: - dependency-name: actions/upload-artifact dependency-version: '7' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> build(deps): bump softprops/action-gh-release from 2 to 3 (rizinorg#6228) Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2 to 3. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](softprops/action-gh-release@v2...v3) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: '3' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> build(deps): bump actions/cache from 4 to 5 (rizinorg#6262) Bumps [actions/cache](https://github.com/actions/cache) from 4 to 5. - [Release notes](https://github.com/actions/cache/releases) - [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md) - [Commits](actions/cache@v4...v5) --- updated-dependencies: - dependency-name: actions/cache dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Cleanup luac code (rizinorg#6298) RzReg: Associate roles with RzRegItem instead of name strings (rizinorg#6291) Register roles (RzRegisterId) are now associated directly with an RzRegItem in RzReg rather than mapping to name strings, which previously needed an additional hashtable lookup to get more information about the register. Conversely, if the name is needed from an RzRegItem, it is available directly as a member. This is not a pure refactor as there were cases before where a register name was assigned to a role in the register profile, but no register actually existed under that name. Such cases will now cause a warning to be printed during profile load and the role association will be ignored. Changes in register profiles in this commit are for fixing such cases. librz/bin: fix regstate load in ELF corefiles for x86_64 (rizinorg#6195) * regstate retrieval in ELF corefiles * remove rzbin call from cmd_debug * increase FP_LAYOUT to 128 rz-bindgen: Test with rz-test (rizinorg#6299) util: extend string search with user-defined printable characters (rizinorg#6161) * util: extend string search with user-defined printable characters * util: use RzVector for user_unprintable options * util: address review for configurable unprintable chars * core/cconfig: use goto error_free pattern in cb_str_unprintable * test/cmd_search_z: merge duplicate Armenian utf16le tests debug: make xnu attach idempotent for di (rizinorg#6295) librz/bin: add more ELF header warning detail (rizinorg#6301) elf: Simplify phdr checking code (rizinorg#6302) Remove unused xnu_native_hwstep_enable implementations (dead code) (rizinorg#6300) Implement Pool Node allocation for RzList (rizinorg#6203) Add new implementation of RzConfig (rizinorg#5820) Remove rz_range (rizinorg#6303) Replace strnlen calls Non-C-standard strnlen is not available on Mac OS X 10.5 Fix build on sparc64 and ppc Dynamic endian checking can't be used in RZ_SYS_ENDIAN because its value is used in the preprocessor. When __BYTE_ORDER__ is not available, as is the case on OpenBSD/sparc64, we fall back to big endian. Fix build with debugger=false option Fetch the addends from the relocation position in REL types of object files (rizinorg#6112) Revert "Implement Pool Node allocation for RzList (rizinorg#6203)" (rizinorg#6313) This reverts commit d3a97d5. tui: build filtered panel commands dynamically (rizinorg#6221) * build filtered panel commands with dynamic string growth * build filtered panel cmds with RzStrBuf Update capstone for M68k (rizinorg#6309) * Bump capstone to the latest next * Add capstone M68k changes * Update M68k instruction size and fix tests * Add M68K assembly instruction definitions for 68000, 68020, 68030, 68060, and CPU32 * Update maxopsz to 22 for bflt, hunk, and smd formats * Add M68k ELF coredump parsing support librz/arch: add RS08 and HCS12X as new M680X CPU types (rizinorg#5977) librz/arch: fix m68k CPU32 detection with Capstone v6 (rizinorg#6314) Co-authored-by agent: Codex/GPT-5 Remove RzConfig.lock and re-introduce rz_config_lock for compatibility (rizinorg#6315) rz_config_lock() is still in use by some external plugins. It should be removed completely once plugins have migrated to the new API. For now, it is a no-op to not break compilation of plugins. librz/arch: check if M680X HSC12X/RS08 is present in Capstone (rizinorg#6318) build: propagate OpenSSL in CMake exports (rizinorg#6284) Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Co-authored-by: NOT XVilka <notxvilka@proton.me> log.level help: Don't show `0:DEBUG` on Release builds (rizinorg#6319) * log.level help: Don't show `0:DEBUG` on Release builds * Use `choco install python310` instead test: make consistent `sysz regs` test output (rizinorg#6326) Add analysis pass to make `avgl` command show global variables (rizinorg#6306) Mark bytes as data and show as such in disassembly if referenced as DATA (rizinorg#6307) librz/bin: fix the false-positive detection of the C166 bins as AVR bins Fix s390x build without debugger (rizinorg#6316) * Fix s390x build without debugger From: Andreas Schneider <asn@cryptomilk.org> Date: Wed, 23 Apr 2026 11:35:00 +0200 Subject: [PATCH] Fix s390x link error when debugger is disabled When the debugger is disabled (-Ddebugger=false), debug_native.c is not compiled, so rz_debug_get_tls() and rz_debug_native_threads() are never defined. However, linux_heap_glibc.c (part of librz_core) calls both functions unconditionally, causing a link failure on s390x. Add stub implementations in debug.c guarded by #if !DEBUGGER so the symbols are always present in librz_debug regardless of the debugger option. * Fix formatting --------- Co-authored-by: Giovanni <561184+wargio@users.noreply.github.com> test: fix avr/c166 test on big endian machine (rizinorg#6329) Improve mips args & prelude detection (rizinorg#6320) test: fix avr/c166 detection test on SystemZ (rizinorg#6333) analysis: fix data in K64F-RIOT-SPI.elf not marked properly (rizinorg#6331) Apply patches/fix_zydis_amalgamated_riscv32_build to subproject We already vendor a patched zydis and this fix should be available to everyone, not only CI. Patch zydis to work on OpenBSD/sparc64 This combines the following patches already sent upstream: zyantific/zycore-c#97 zyantific/zydis#603 ...and introduces a workaround to fix segfaults caused by accesses into arrays of the packed ZydisShortString struct. The final solution will likely be an upstream rework of this structure: zyantific/zydis#263 Finally, we adjust the condition for when ZydisStringAppendHexU32 is used, since it is not defined by default. This is already solved more elegantly in Zydis development upstream, but it requires more changes, so we stick to a smaller patch on top of the latest release for now. Fix double free and reject invalid values for `search.in` (rizinorg#6327) pdq: Downgrade "Failed to read chunk" msg from error to warning (rizinorg#6332) Feature: JOP and COP support (rizinorg#6257) * Refactor handlers * COP Support * JOP support * Fix RISCV gadget search test * Remove redundant cop,jop test * Add COP tests * Add JOP tests * Combine gadget_[rjc]op.c into gadget.c Reduce verbose error messages from unsupported native debugger (rizinorg#6337) init and fini are called on regular rizin start, even if not debugging. These errors were distracting and not very meaningful there. They do however make sense when executing any actual debug operation. Fix OOB read in OMF format plugin (rizinorg#6336) * Fix OOB read of section due to invalid bounds check. * Move array offset to variable for readability. Use libdemangle commit with fixed CVE. (rizinorg#6340) added reviewd changes updated to upstream updated type flags Support Siemens/Infineon C16x microcontroller (rizinorg#6321) librz/arch: add LuaJIT 2.1 bytecode support (rizinorg#5961) * Add LuaJIT binary loader * Add LuaJIT analysis and disassembly plugin * New CPU format `luajit` for luac plugin librz/bin/omf: fix build warning (rizinorg#6341) librz/bin/omf: OMF166 fix error handling (rizinorg#6342) Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com> librz/core: fix OMF debug type error (rizinorg#6343) Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com> librz/arch/c166: fix behavior on big-endian hosts Fix `afb-*` (rizinorg#6347) * Base test output * Fix `afb-*` librz/bin/elf: add some missing MIPS relocs (rizinorg#6348) * Add support to various MIPS reloc conversion. R_MIPS_26, R_MIPS_HI16, R_MIPS_LO16, R_MIPS_GOT16, R_MIPS_PC16, R_MIPS_CALL16, R_MIPS_64, R_MIPS_GOT_HI16, R_MIPS_GOT_LO16, R_MIPS_CALL_HI16, R_MIPS_CALL_LO16, R_MIPS_REL16 * Fix test missing RUN at the end.

…ments,failcases for ops_count<n_lines(memory reading),return 0 if vector is null() fix typo format fixes updated test cases librz/io: fix book link in io_mach (rizinorg#6285) librz/debug: fix coredump creation on macOS * librz/debug: fix coredump creation on xnu * librz/debug: fix numbers of vmmap entries in xnu * test/db/archos/darwin-arm64: add coredump test tools/rz: Revert weird-looking test (rizinorg#6288) * tools/rz: Revert weird-looking test * Do `dos2unix` on whole file librz/debug: native debugger plugin for RISC-V (rizinorg#5966) * added breakpoints and stepping * add link register to allow single-stepping a ret instruction, fix stacktraces * refactor to avoid passing the IO layer structs to the breakpoint function * add tests, refine the stacktrace to not include non-function * add register information for core file parsing * core file generation for RISC-V * make tests run under riscv-64 * make tests run under riscv-32 Fix rz_vector_set() behavior to match the rz_pvector version one. (rizinorg#6274) * Fix rz_vector_set() behavior to match the rz_pvector version one. * Use existing vector functions for setting elements. librz/bin: ELF coredump parsing support for RISC-V (rizinorg#6266) librz/bin: ELF coredump parsing support for s390x (rizinorg#6271) librz/bin: ELF coredump parsing support for LoongArch (rizinorg#6273) Fix qnx out of bound reads and writes. (rizinorg#6292) build(deps): bump actions/upload-artifact from 4 to 7 (rizinorg#6229) Bumps [actions/upload-artifact](https://github.com/actions/upload-artifact) from 4 to 7. - [Release notes](https://github.com/actions/upload-artifact/releases) - [Commits](actions/upload-artifact@v4...v7) --- updated-dependencies: - dependency-name: actions/upload-artifact dependency-version: '7' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> build(deps): bump softprops/action-gh-release from 2 to 3 (rizinorg#6228) Bumps [softprops/action-gh-release](https://github.com/softprops/action-gh-release) from 2 to 3. - [Release notes](https://github.com/softprops/action-gh-release/releases) - [Changelog](https://github.com/softprops/action-gh-release/blob/master/CHANGELOG.md) - [Commits](softprops/action-gh-release@v2...v3) --- updated-dependencies: - dependency-name: softprops/action-gh-release dependency-version: '3' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> build(deps): bump actions/cache from 4 to 5 (rizinorg#6262) Bumps [actions/cache](https://github.com/actions/cache) from 4 to 5. - [Release notes](https://github.com/actions/cache/releases) - [Changelog](https://github.com/actions/cache/blob/main/RELEASES.md) - [Commits](actions/cache@v4...v5) --- updated-dependencies: - dependency-name: actions/cache dependency-version: '5' dependency-type: direct:production update-type: version-update:semver-major ... Signed-off-by: dependabot[bot] <support@github.com> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Cleanup luac code (rizinorg#6298) RzReg: Associate roles with RzRegItem instead of name strings (rizinorg#6291) Register roles (RzRegisterId) are now associated directly with an RzRegItem in RzReg rather than mapping to name strings, which previously needed an additional hashtable lookup to get more information about the register. Conversely, if the name is needed from an RzRegItem, it is available directly as a member. This is not a pure refactor as there were cases before where a register name was assigned to a role in the register profile, but no register actually existed under that name. Such cases will now cause a warning to be printed during profile load and the role association will be ignored. Changes in register profiles in this commit are for fixing such cases. librz/bin: fix regstate load in ELF corefiles for x86_64 (rizinorg#6195) * regstate retrieval in ELF corefiles * remove rzbin call from cmd_debug * increase FP_LAYOUT to 128 rz-bindgen: Test with rz-test (rizinorg#6299) util: extend string search with user-defined printable characters (rizinorg#6161) * util: extend string search with user-defined printable characters * util: use RzVector for user_unprintable options * util: address review for configurable unprintable chars * core/cconfig: use goto error_free pattern in cb_str_unprintable * test/cmd_search_z: merge duplicate Armenian utf16le tests debug: make xnu attach idempotent for di (rizinorg#6295) librz/bin: add more ELF header warning detail (rizinorg#6301) elf: Simplify phdr checking code (rizinorg#6302) Remove unused xnu_native_hwstep_enable implementations (dead code) (rizinorg#6300) Implement Pool Node allocation for RzList (rizinorg#6203) Add new implementation of RzConfig (rizinorg#5820) Remove rz_range (rizinorg#6303) Replace strnlen calls Non-C-standard strnlen is not available on Mac OS X 10.5 Fix build on sparc64 and ppc Dynamic endian checking can't be used in RZ_SYS_ENDIAN because its value is used in the preprocessor. When __BYTE_ORDER__ is not available, as is the case on OpenBSD/sparc64, we fall back to big endian. Fix build with debugger=false option Fetch the addends from the relocation position in REL types of object files (rizinorg#6112) Revert "Implement Pool Node allocation for RzList (rizinorg#6203)" (rizinorg#6313) This reverts commit d3a97d5. tui: build filtered panel commands dynamically (rizinorg#6221) * build filtered panel commands with dynamic string growth * build filtered panel cmds with RzStrBuf Update capstone for M68k (rizinorg#6309) * Bump capstone to the latest next * Add capstone M68k changes * Update M68k instruction size and fix tests * Add M68K assembly instruction definitions for 68000, 68020, 68030, 68060, and CPU32 * Update maxopsz to 22 for bflt, hunk, and smd formats * Add M68k ELF coredump parsing support librz/arch: add RS08 and HCS12X as new M680X CPU types (rizinorg#5977) librz/arch: fix m68k CPU32 detection with Capstone v6 (rizinorg#6314) Co-authored-by agent: Codex/GPT-5 Remove RzConfig.lock and re-introduce rz_config_lock for compatibility (rizinorg#6315) rz_config_lock() is still in use by some external plugins. It should be removed completely once plugins have migrated to the new API. For now, it is a no-op to not break compilation of plugins. librz/arch: check if M680X HSC12X/RS08 is present in Capstone (rizinorg#6318) build: propagate OpenSSL in CMake exports (rizinorg#6284) Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Co-authored-by: NOT XVilka <notxvilka@proton.me> log.level help: Don't show `0:DEBUG` on Release builds (rizinorg#6319) * log.level help: Don't show `0:DEBUG` on Release builds * Use `choco install python310` instead test: make consistent `sysz regs` test output (rizinorg#6326) Add analysis pass to make `avgl` command show global variables (rizinorg#6306) Mark bytes as data and show as such in disassembly if referenced as DATA (rizinorg#6307) librz/bin: fix the false-positive detection of the C166 bins as AVR bins Fix s390x build without debugger (rizinorg#6316) * Fix s390x build without debugger From: Andreas Schneider <asn@cryptomilk.org> Date: Wed, 23 Apr 2026 11:35:00 +0200 Subject: [PATCH] Fix s390x link error when debugger is disabled When the debugger is disabled (-Ddebugger=false), debug_native.c is not compiled, so rz_debug_get_tls() and rz_debug_native_threads() are never defined. However, linux_heap_glibc.c (part of librz_core) calls both functions unconditionally, causing a link failure on s390x. Add stub implementations in debug.c guarded by #if !DEBUGGER so the symbols are always present in librz_debug regardless of the debugger option. * Fix formatting --------- Co-authored-by: Giovanni <561184+wargio@users.noreply.github.com> test: fix avr/c166 test on big endian machine (rizinorg#6329) Improve mips args & prelude detection (rizinorg#6320) test: fix avr/c166 detection test on SystemZ (rizinorg#6333) analysis: fix data in K64F-RIOT-SPI.elf not marked properly (rizinorg#6331) Apply patches/fix_zydis_amalgamated_riscv32_build to subproject We already vendor a patched zydis and this fix should be available to everyone, not only CI. Patch zydis to work on OpenBSD/sparc64 This combines the following patches already sent upstream: zyantific/zycore-c#97 zyantific/zydis#603 ...and introduces a workaround to fix segfaults caused by accesses into arrays of the packed ZydisShortString struct. The final solution will likely be an upstream rework of this structure: zyantific/zydis#263 Finally, we adjust the condition for when ZydisStringAppendHexU32 is used, since it is not defined by default. This is already solved more elegantly in Zydis development upstream, but it requires more changes, so we stick to a smaller patch on top of the latest release for now. Fix double free and reject invalid values for `search.in` (rizinorg#6327) pdq: Downgrade "Failed to read chunk" msg from error to warning (rizinorg#6332) Feature: JOP and COP support (rizinorg#6257) * Refactor handlers * COP Support * JOP support * Fix RISCV gadget search test * Remove redundant cop,jop test * Add COP tests * Add JOP tests * Combine gadget_[rjc]op.c into gadget.c Reduce verbose error messages from unsupported native debugger (rizinorg#6337) init and fini are called on regular rizin start, even if not debugging. These errors were distracting and not very meaningful there. They do however make sense when executing any actual debug operation. Fix OOB read in OMF format plugin (rizinorg#6336) * Fix OOB read of section due to invalid bounds check. * Move array offset to variable for readability. Use libdemangle commit with fixed CVE. (rizinorg#6340) added reviewd changes updated to upstream updated type flags Support Siemens/Infineon C16x microcontroller (rizinorg#6321) librz/arch: add LuaJIT 2.1 bytecode support (rizinorg#5961) * Add LuaJIT binary loader * Add LuaJIT analysis and disassembly plugin * New CPU format `luajit` for luac plugin librz/bin/omf: fix build warning (rizinorg#6341) librz/bin/omf: OMF166 fix error handling (rizinorg#6342) Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com> librz/core: fix OMF debug type error (rizinorg#6343) Co-authored-by: Anton Kochkov <anton.kochkov@gmail.com> librz/arch/c166: fix behavior on big-endian hosts Fix `afb-*` (rizinorg#6347) * Base test output * Fix `afb-*` librz/bin/elf: add some missing MIPS relocs (rizinorg#6348) * Add support to various MIPS reloc conversion. R_MIPS_26, R_MIPS_HI16, R_MIPS_LO16, R_MIPS_GOT16, R_MIPS_PC16, R_MIPS_CALL16, R_MIPS_64, R_MIPS_GOT_HI16, R_MIPS_GOT_LO16, R_MIPS_CALL_HI16, R_MIPS_CALL_LO16, R_MIPS_REL16 * Fix test missing RUN at the end. added tests, newstruct RzCoreILPrintOptions,buffer is taken from arguments,failcases for ops_count<n_lines(memory reading),return 0 if vector is null() fix typo format fixes

* added breakpoints and stepping * add link register to allow single-stepping a ret instruction, fix stacktraces * refactor to avoid passing the IO layer structs to the breakpoint function * add tests, refine the stacktrace to not include non-function * add register information for core file parsing * core file generation for RISC-V * make tests run under riscv-64 * make tests run under riscv-32

github-actions Bot added the RzDebug label Feb 25, 2026

github-actions Bot added RzAnalysis API RzCore ARM MIPS PPC X86 RzAsm-Disassembler labels Mar 6, 2026

moste00 marked this pull request as ready for review March 6, 2026 02:55

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moste00 force-pushed the feature/riscv_native_debugger branch from d30e2b4 to 04ed5b8 Compare March 6, 2026 03:33

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notxvilka added this to the 0.9.0 milestone Mar 7, 2026

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moste00 mentioned this pull request Mar 13, 2026

add RISC-V to CI using QEMU and Debian kernel, busybox as init #6029

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moste00 requested a review from b1llow as a code owner March 15, 2026 22:32

moste00 force-pushed the feature/riscv_native_debugger branch from a7e26d6 to 48e76e2 Compare March 18, 2026 03:23

wargio marked this pull request as draft March 18, 2026 12:52

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moste00 mentioned this pull request Apr 21, 2026

ELF coredump parsing support for RISC-V #6266

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notxvilka approved these changes Apr 21, 2026

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notxvilka mentioned this pull request Apr 21, 2026

ELF coredump parsing support - more architectures #5240

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wargio reviewed Apr 23, 2026

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notxvilka added the waiting-for-author Used to mark PRs where more work is needed label Apr 24, 2026

moste00 force-pushed the feature/riscv_native_debugger branch 2 times, most recently from fb88c2c to b1e7cac Compare April 25, 2026 20:57

moste00 and others added 8 commits April 25, 2026 23:59

added breakpoints and stepping

b448d63

add link register to allow single-stepping a ret instruction, fix sta…

bd1a696

…cktraces

refactor to avoid passing the IO layer structs to the breakpoint func…

525c0ea

…tion

add tests, refine the stacktrace to not include non-function

c21dd9b

add register information for core file parsing

4305a48

core file generation for RISC-V

f130103

more tests

556b382

make tests run under riscv-64

0cc4b02

moste00 force-pushed the feature/riscv_native_debugger branch from b1e7cac to 4cd562d Compare April 25, 2026 21:05

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make tests run under riscv-32

b68091b

moste00 force-pushed the feature/riscv_native_debugger branch from 4cd562d to b68091b Compare April 25, 2026 21:16

wargio reviewed Apr 26, 2026

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wargio approved these changes Apr 26, 2026

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notxvilka approved these changes Apr 26, 2026

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notxvilka merged commit 29b04fa into rizinorg:dev Apr 26, 2026
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