Skip to content

Add RISC-V platform and PAUSE instruction #1262

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
Amanieu merged 2 commits into from
Dec 5, 2021
Merged

Add RISC-V platform and PAUSE instruction #1262

Changes from 1 commit
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
6239a24
Add RISC-V platform on `core::arch`
luojia65 Dec 2, 2021
1a9eec3
Add `PAUSE` instruction to RISC-V `core::arch`
luojia65 Dec 2, 2021
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Add PAUSE instruction to RISC-V core::arch 
Use `#[inline]` instead of `#[inline(always)]`
  • Loading branch information
@luojia65
luojia65 committed Dec 4, 2021
commit 1a9eec30e25c551e4a0eac39e1e25816e591afd2
9 changes: 9 additions & 0 deletions crates/core_arch/src/riscv/mod.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1 +1,10 @@
//! RISC-V intrinsics

/// Generates the `PAUSE` instruction
///
/// The PAUSE instruction is a HINT that indicates the current hart's rate of instruction retirement
/// should be temporarily reduced or paused. The duration of its effect must be bounded and may be zero.
#[inline]
pub fn pause() {
unsafe { asm!(".word 0x0100000F", options(nomem, nostack)) }
}