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VLSI & ASIC Design Course Schedule

The document provides a schedule for an MS program's first contact program, listing the dates and times for 5 papers to be presented over 2 weeks, with papers being presented each day from Monday to Friday between 9am-11am, 11:30am-1:30pm, and 2pm-4pm, and labs and optional labs scheduled on Saturdays and some weekdays.

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Harold Wilson
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0% found this document useful (0 votes)
188 views58 pages

VLSI & ASIC Design Course Schedule

The document provides a schedule for an MS program's first contact program, listing the dates and times for 5 papers to be presented over 2 weeks, with papers being presented each day from Monday to Friday between 9am-11am, 11:30am-1:30pm, and 2pm-4pm, and labs and optional labs scheduled on Saturdays and some weekdays.

Uploaded by

Harold Wilson
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

COURSE

PAGE No.

ASIC DESIGN

MOBILE COMMUNICATION & INTERNET TECHNOLOGIES

21

INFORMATION TECHNOLOGY

38
(Click on course name / Page number)

SCHEDULE FOR MS - FIRST CONTACT PROGRAM


Monday
Tuesday
Wednesday
Thursday
Friday
Saturday
Sunday
Monday
Tuesday
Wednesday
Thursday
Friday
Saturday

Paper - 1
Paper - 4
Paper - 2
Paper - 5
Paper - 3
LAB
Optional Lab
Optional Lab

11:00 - 11:30

11:30 - 1:30

1:30 - 02:00

Paper - 2
Paper - 5
Paper - 3
Paper - 1
Paper - 4
LAB
Holiday
Optional Lab
Optional Lab
Paper Presentation / Discussion / Seminar
Paper Presentation / Discussion / Seminar
Paper Presentation / Discussion / Seminar
Paper Presentation / Discussion / Seminar

Lunch Break

14-06-2010
15-06-2010
16-06-2010
17-06-2010
18-06-2010
19-06-2010
20-06-2010
21-06-2010
22-06-2010
23-06-2010
24-06-2010
25-06-2010
26-06-2010

09:00 - 11:00

Tea Break

Date/Time

02:00 - 04:00
Paper - 3
Paper - 1
Paper - 4
Paper - 2
Paper - 5
LAB
Optional Lab
Optional Lab

HOME

Date

0B

HOME

Paper-1
Subject: Basic VLSI and Analog VLSI Design
Texts books(TB):
1.
2.
3.
4.
5.

Hour

Basic VLSI Design (Third Edition) by Douglas.A.Pucknell , Kamaran Eshraghian


CMOS Digital Integrated Circuits (Third Edition) by Sung MO Kang, Yousf Leblebici
Introduction to VLSI Circuits & Systems, by John.P. Uyemura
Analog Circuits and Devices - Principles and Applications in Engineering, by Wai-Kai Chen
Analysis and Design of Analog Integrated Circuits (4th Edition) by Paul R. Gray

Date

0B

Time

1B

Chapter

Main Topics
As per syllabus
Introduction to
MOS technology

Contents

14-06-10

9.00-11.00

113B

Introduction to IC technology, Basic MOS Transistor Enhancement Mode, Depletion


Mode, Threshold Voltage, Body Effect, VLSI Design flow, VLSI Design Styles.

Fabrication
Process

NMOS, CMOS, P Well, N Well process, Twin Tub Process, Silicon on insulator

15-06-10

2.00-4.00

Electrical
Properties of
MOS Circuits

Drain to Source Current VS Voltage relationship, MOS Transistor, transconductance


and output conductance, figure of merit, pass transistors, NMOS inverters,
determination pull up to pull down ratio for NMOS inverter driven by another NMOS
inverter, determination pull up to pull down ratio for NMOS inverter driven through
one or more pass transistors, alternative forms of pull up latch up in CMOS circuits

17-06-10

11.30 1.30

Basic Circuits
concepts

Sheet resistance, Sheet resistance applied to MOS Transistors and inverters, Area
capacitance of layers, Standard unit of capacitance, delay unit, inverter delay, driving
large capacitive loads, propagation delays

Faculty In charge: Prof. Poornima M.


E-Mail :
: [email protected]

HOME

Paper-2
Subject : ASIC Design
Texts books(TB):
1. Michael John Sebastin Smith, - Application - Specific Integrated Circuits Pearson Education, 2003
2. Malcolm R.Haskard; Lan. C. May, Analog VLSI Design - NMOS and CMOS Prentice Hall, 1998.
3. Andrew Brown, - VLSI Circuits and Systems in Silicon, McGraw Hill, 1991.
4. S.D. Brown, R.J. Francis, J. Rox, Z.G. Uranesic, Field Programmable Gate Arrays- Kluwer Academic Publishers, 1992.
,
Hour
Date
Time
Chapter
Main Topics
Contents
As per syllabus
1
14-06-10 11:30-1.30
1
Introduction to ASICs
Types of ASICs, Design flow, Case Study, Economics of ASICs, ASCI cell library.
5B

6B

7B

8B

9B

126B

127B

CMOS logic cells

16-06-10

9:00-11:00

ASIC Library Design

17-06-10

2:00-4:00

4
5

Gate Design
Programmable ASICs

Combinational logic cells, Sequential Logic Cells, Datapath Logic cells, I/O cells,
Cell Compilers.
Transistor as resistors, Transistor as parasitic capacitance, Logic effort, Library
cell design, Library architecture.
Gate array cell design, standard cell design, datapath cell design.
Antifuse, Static RAM, EPROM, EEPROM technology, practical issues

Faculty In charge: Prof. Roopa


E Mail : [email protected]

HOME

Paper-3
Subject : CAD Tools for VLSI
Texts books (TB):
1.
2.
3.
Hour

Synthesis and Optimization of Digital Circuits. By Gionni De Micheli (Publisher TATA Mc Graw Hill Edition)
Algorithms for VLSI design Autmation by Sabih H. Gerez (Publisher Willey)
Algorithms for VLSI Physical Design Automation(3rd Edition) Naveed Shervani (Publisher Springer International Edition )
Date

10B

Time

11B

Chapter

Main Topics
As per syllabus
Scheduling
Algorithms without
resource constraints.

Introduction, A model for scheduling problems, scheduling without and with resource
constraints, scheduling algorithms for extended sequencing models, scheduling
pipelined circuits

Resource Sharing and


Binding:

Introduction, sharing and binding for resource-dominated circuits, sharing and


binding for general circuits, concurrent binding and scheduling

Data Structure

Basic Terminology, Basic Data structures

Basic Algorithms:

Graph Search Algorithms, Computational Geometry Algorithms,

Partitioning:

Problem Formulation, Classification of Partitioning Algorithms, Group migration


Algorithms, Simulated Annealing and evolution algorithm, other partitioning
algorithms

12B

Contents

13B

14B

14-06-10

2:00-4:00

16-06-10

11.30-1.30

18-06-10

9:00-11.00

140B

Faculty in charge: Shilpa. D. R


E Mail:[email protected]

HOME

Paper-4 (Elective I a)
Subject: Digital Circuit Design using VERILOG
Texts books (TB):
1.
2.
3.
4.

Hour

Verilog Hardware Description Language by Thomas & Moorby, 5th Edition.


Verilog HDL a guide to digital design & synthesis by Samir Palnithkar, Sunsoft press, 1996,
Verilog HDL synthesis A practical primer by J. Bhasker, Star Galaxy press, 1997.
Digital system Design Using VHDL by Charles H. Roth PWS Publishing Company

Date

15B

Time

16B

Chapter
1

Main Topics
As per syllabus
Verilog Introduction

Logic Synthesis

17B

Contents

18B

19B

15-06-10

16-06-10

09:00-11:00

2.00-4.00

153B

3
0

18-06-10

11:30-1:30

Behavioral Modeling

Concurrent Processes
Module Hierarchy

Logic Level Modeling

Structural Description , Creating Ports For the Module, Test bench For a
Module, Behavioral Modeling of Combinational Circuits, Procedural
Modeling of Clocked Sequential Circuits, Module Hierarchy
Synthesis, Combinational Logic, Procedural Statements to Specify
Combinational Logic, Inferring Sequential Elements: Latch , Flip Flop.
Inferring Tri-State Devices; Describing Finite State Machines.
Process Model, If-Then-Else, Loops, Multi-way Branching, Functions and
Tasks, Rules of Scope and Hierarchical Names, The Wait Statement.
Concurrent Processes, A Simple Pipelined Processor, Disabling Named Blocks,
Intra-Assignment Control and Timing Events, Procedural Continuous
Assignment, Sequential and Parallel Blocks
Module Instantiation, Port Specifications, Parameters, Arrays of Instances,
Generate Blocks.
Logic Level Modeling; Introduction, Logic Gates and Nets, Continuous
Assignment, A Mixed Behavioral/Structural Example, Logic Delay Modeling .

Faculty In charge: Prof. Lakshmi Prathap


E Mail : [email protected]

HOME

Paper-4 (Elective I b)
Subject : RF Micro Electronics
Texts books(TB):
1.
2.
3.
4.
5.
,
Hour
1

B Razavi, RF microelectronics PHI PTR 1998


T H Lee, Design of CMOS RF ICs, Cambridge university press 1998
R Jacob Baker, HW Li and D.E boce CMOS circuit design layout and simulation PHI India 1998
Y P Tsividis Mixed Analog & Digital VLSI devices and techology Mc Graw Hill 1996
Behzad Razavi, RF Microelectronics, Upper Saddle River, NJ: Prentice Hall, 1998.
Date

20B

15-06-10

16-06-10

18-06-10

Time

21B

09:00-11:00

2.00-4.00

11:30-1:30

Chapte
r
1

22B

166B

Main Topics
As per syllabus
Introduction to RF and
wireless technology

Contents

23B

24B

167B

Complexity, design and applications. Choice of technology.

Basic concepts in RF
design

Non linearity and time variance, intersymbol interference, random processes


and noise. Definitions of sensitivity and dynamic range, conversion gains and
distortions.

Analog and digital


modulation

RF circuits; comparison of various techniques for power efficiency. Coherent


and non-coherent detections mobile RF communications.

Mobile communication
systems

Basics of multiple access techniques. Receiver and Tx architecture and testing


heterodyne homodyne image reject direct IF and sub sampled Rxs..

Direct conversion and


two step Transmitters

BJT & MOSFET behavior at RF frequencies modeling of the transistor and


SPICE models

Performance and
limitation

Noise performance and limitation of the devices integrated parasitic elements at


high frequencies and their monolithic implementations

Faculty In charge: Prof. Ram Vankatesh


E Mail : [email protected]

HOME

Paper-5 (Elective II a)
Subject: PLD and FPGA
Texts books(TB):
1.
2.
3.
4.
5.
,
Hour

John F Wakerly, Digital Design: Principles & Practices, Prentice Hall.


Kevin Skahil, VHDL for Programmable Logic, Addison Wesley.
PLD & FPGA Data Sheets.
Wayne Wolf, FPGA -Based Design, Prentice-Hall, 2004.
S. Brown, Z.Vranesic, Fundamentals of Digital Logic with VHDL Design .-McGraw-Hill, 2000.
Date

25B

Time

26B

Chapter

27B

Main Topics
As per syllabus
Programmable logic
device

Contents

28B

29B

15-06-10

17-06-10

18-06-10

11.30-1:30

180B

181B

Programmable logic arrays (PLAs), Programmable array logics (PALs),


Programmable logic devices (PLDs).

FPGAs

Xilinx 3000 series FPGAs, Designing with FPGAs, Xilinx 4000 series
FPGAs, Using a one-hot state assignment, ALTERA CPLDs, ALTERA flex
10K series CPLDs

09:00-11:00

Hierarchy in Design

Controllers, Mealy and Moore Machines, Meta-stability, synchronization

2:00-4:00

4
5

FSM issues
VHDL

Clock Trees, Clock skew, Pipelining, Multiple clock domains, Case studies.
Behavioral, Data Flow, Structural Models, Simulation Cycles, Process,
Concurrent and Sequential Statements

Faculty in charge: Prof. B.S. Kariyappa


E Mail: [email protected]

Prof. M Govinda Raju


[email protected]

HOME

Paper-5 (Elective II b)
Subject: Low Power VLSI Design
Texts books (TB):
1.
2.
3.
4.
5.
,
Hour

Gary K. Yeap, Practical Low Power Digital VLSI Design, KAP, 2002
Rabaey, Pedram, Low power design methodologies Kluwer Academic, 1997
Kaushik Roy, Sharat Prasad, Low-Power CMOS VLSI Circuit Design Wiley, 2000
Low Power Design in Deep Sub-micron Electronics by W. Nebel and J. Mermet, Kluwer Academic Publishers, 1997
Gary K. Yeap, Practical Low power Digital VISI Design, Kluwer Academic Publishers, 1998.
Date

30B

Time

31B

Chapter

32B

Main Topics
As per syllabus
Introduction

Contents

33B

34B

15-06-10

11.30-1:30

194B

2
2

17-06-10

18-06-10

09:00-11:00

2:00-4:00

Need, sources of power dissipation, emerging low power approaches, physics


of power dissipation in cmos devices

Device and technology


impact on low power

Dynamic dissipation in cmos, transistor sizing & gate oxide thickness,


Impact of technology scaling, technology and device innovation
Introduction, spice circuit simulator,Gate level logic simulation,Data
correlation analysis in dsp systems

Power estimation,
simulation power analysis
Power estimation,

simulation power analysis

Statistical methods, monte-carlo method,Estimation of glitching power

Probabilistic power analysis

Random logic signals,Characterization of logic signals, partially reversible


logic and quasi-adiabatic memories

Circuit level & logic level

Transistor and gate sizing, gate reorganization, local restructuring

Faculty in charge: Prof. P.Narashimaraja


E Mail: [email protected]

HOME

10

ASSIGNMENT QUESTIONS
Paper -1
Basic VLSI and Analog VLSI Design

1) "Depletion mode MOSFET", acts as a "closed" switch and "Enhancement mode MOSFET", acts as an "open" switch Justify this statement.
2) Explain the different regions of operation of the MOSFET.
3) Briefly explain different VLSI design styles with an example.
4) Explain the Voltage Transfer Characteristics of CMOS inverter.
5) VTC Calculations: A CMOS inverter is designed with Wn=1.4um and Wp=3um. Assume all additional device parameters match the default 0.25um
technology.
a) Using Tanner EDA (or another suitable software tool), plot the VTC for this inverter.
b) On the same plot, graph the current between VDD and Ground as
a function of Vin.
c) Using the plot as support, justify the statement CMOS has no static power consumption.

6) Design a stable bias circuit with a Q point of IC = 2.5 mA and VCE = 7.5 V. Transistor ranges from 50 to 200.
7) Design a BJT amplifier with a gain of 4 and a lower cut-off frequency of 100 Hz. The Q point parameters should be IC = 3 mA and VCE = 7:5 V.
(Manufacturers' spec sheets give: min = 100, = 200, hie = 5 k, hoe = 10 S).
8) Draw a complex gate that implements the following function:

9) What are the short channel effects of the MOSFETs explain.


10) Pass Transistor Logic: Consider the circuit in Figure 4.1. Assume the inverter switches ideally at VDD/2, neglect body effect, channel length modulation and
all parasitic capacitance throughout this problem.
a. What is the logic function performed by this circuit? (Write a function for OUT)
b. Explain why this circuit has non-zero static power dissipation.
c. Using only 1 transistor, design a fix to the pass transistor design so that there will not be any static power dissipation in the circuit. Qualitatively explain how
you would choose the size of the transistor.
d. Implement the same function using transmission gates.
e. Replace the pass-transistor network in Figure 2 with a pass transistor network that computes the following function: x = ABC at the node x. Assume you have
the true and complementary versions of the three inputs A,B and C.
HOME

11

11) Using the circuit diagram below,


a) Determine the function at node OUT in terms of A,B,C,D,E,F,and G.
b) Determine the dual to part A using Demorgans Law.

HOME

12

12)
13)
14)
15)
16)
17)

What do you mean by Full Custom Design relating to the VLSI design? Explain.
What is the top-down design approach in the VLSI design flow? Explain with an example
Derive the threshold voltage equations of the MOS transistor.
Explain body effect in CMOS circuits.
Explain why substrate and well contacts are important in CMOS.
What is latch-up condition? How can it be prevented?

18) Derive the Pull-up to Pull-down ratio for an nMOS inverter driven through one or more pass transistors.
19) Derive the Pull-up to Pull-down ratio for an nMOS inverter driven directly from the output of another.
20) Explain the different forms of pull-up for the MOSFET device

HOME

13

Paper 2
ASIC DESIGN
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.

What are the steps required for ASIC design and explain briefly.
Explain the different types of MGA or Gate array ASICS.
List out the types of adders & multipliers and its advantages and disadvantages
Compare Xilinx LCA logic cells: XC3000CLB, XC4000, XC5000
What are logic expanders? What are the advantages and disadvantages
What is metastability?
Explain clock spin, clock skew and clock latency.
What are the types of routing? Explain them briefly.
What are PLDs? Discuss different PLDs.
How does CMOS work as an inverter, NAND & NOR.?
Consider an Actel 1020b-2 with a 20 MHz clock. We shall initially assume 100% utilization of the 547 logic models and assume that each switches at an
average speed of 5 Mhz. Assume that 69 I/O modules and that each switches at an average speed of 5 Mhz. Calculate the total power dissipation.
Calculate power dissipation and clock spine interconnects for the following specification. 40,000FFs, input capacitance of clock input to each FF is
0.025pf. Clock frequency is 200 MHz, Vdd=3.3V, Chip size is 20mm on a side, clock spine consists of 200 lines across the chip, interconnect capacitance
is 2pf/cm.
Differentiate between full custom and semi-custom design.
Design a NAND3 gate using an 8:1 MUX
Design a NOR3 gate using an 8:1 MUX as a basis.
Use an AOI22 gate to design a 2:1 MUX. Inverters are permitted in your design.
Design a 4:1 MUX using three 2:1 TG multiplexors.
Consider the 2-input XOR function. Design an XOR gate using a 4:1MUX. Modify the circuit to produce a 2-input XNOR.
Design a CMOS circuit for the OAI expression f= complement of (a+b).(a+c).(b+d)
Calculate the logical area and logical efficiency by giving an example.

HOME

14

Paper 3
CAD Tools for VLSI
1.

What is significance of ASAP Algorithm and ALAP Algorithm in Scheduling functional units in VLSI. Explain briefly.

2.

Write the pseudo code for ASAP Algorithm and ALAP Algorithm explain briefly.

3.

Define mobility. With an example determine mobility of each functional unit using ASAP and ALAP Algorithm.

4.

With an example explain the integer linear programming model used for Scheduling

5.

Write the pseudo code for Hus Algorithm and explain with an example.

6.

Write the pseudo code for heuristic List Algorithm and schedule the following functional unit using heuristic List Algorithm.
X1= x+dx; U1= u-(3xudx)-(3ydx); Y1=y+udx; c=X1<a;

7. With sketch and pseudo code explain DFS and BFS algorithm.
8. Write an algorithm for Minimum Spanning Tree. With an example explain each steps of algorithm
9. With sketch and pseudo code explain dijkstra shortest path algorithm.
10. Explain list scheduling for Pipe lined architecture.
11. Write a note on Compatibility and conflict graph. Explian its significance in Resource sharing in VLSI design.
12. What are the conditions of integer linear programming model for Resource sharing. Explain briefly.
13. With sequencing graph explain and variable life time graph eaxplain register sharing technique.
14. Write a note on Sharing and binding of general circuits.
15. Define Acyclic graph, Path in a graph, In-degree and out-degree of a vertex, directed graph.
16. What are the constraints and objectives of Partitioning in VLSI design explain briefly.
17. Explain Kernighanlin algorithm for Partitioning.
18. Write a note on design style specific problems of Partitioning.
19. Write a pseudo code for simulated Annealing algorithm used for Partitioning.
20. Classify Partitioning algorithm based on initial partitioning, nature of algorithm and nature of process used for partitioning

HOME

15

Paper 4 (Elective I A)
Digital Circuit Design using VERILOG
1.
2.
3.

Give the structure of a HDL module in Verilog with an example. Explain data types and operators of Verilog .
Explain always and initial construct with an example.
Write a code to generate a clock of time period 10ns using forever statement.
Differentiate between casex and casez with example
4. What does the logic in a function get synthesized into? What are the area and timing implications of calling functions in RTL?
5. Write Verilog code 4bit parallel adder using full adders(structural).Write a note on

Generate statement

6 What are the differences between if-else and the (?:) conditional operator?with example
7. Write a VHDL code to create a memory of 256 bytes and access 2nd element of third row.
8. What are the differences between the looping constructs forever, repeat, while, for, and do-while?Write VHDL code 4bit parallel adder using full adders
with
loop statement.
9. Write a note on Generate statement Can the generate construct be nested?
10 a. Write Verilog code for 4-bit counter with asynchronous clear input and rising edge clock.
b. Write Verilog code for 4-bit counter with synchronous clear input and rising edge clock
c. Which one is better, asynchronous or synchronous reset for the storage elements?
11 Draw the circuit diagram for an xor gate, using nmos and pmos switches. Write the Verilog description for the circuit.
12 Use the array-of-instances construct to specify a multi-bit full adder. The module header is:
module fullAdder (Cout, sum, a, b, Cin);
a. Describe this as an 8-bit adder where sum, a, and b are 8-bit elements and COut and Cin are one-bit inputs.
b. Parameterize the bit-width of elements sum, a, and b of module fullAdder.
13. Illustrate the differences between binary encoding and one hot encoding mechanisms state machines.
14 a .What is the importance of a default clause in a case construct?
b What is the difference in using (== or !=) vs. (===or !==) in decision making of a flow control construct in a synthesizable code?
15. What logic is inferred when there are multiple assign statements targeting the same wire?
16. What logic gets synthesized when one use an integer instead of a reg variable as a storage element? Is use of integer recommended?
17. How to avoid a priority encoder in an if-else tree?
18. Design a multiplier that will multiply two 16 bit signed binary integers to give a 32 bit product. (Negative numbers should be represented in 2s
complement form).
19. Design and write verilog code for standard 4X4 keypad scanner.
20. Design and write veilog code for debouncing circuit that detects when a key has been pressed Or depressed.

HOME

16

Paper 4 (Elective I B)
RF-Micro Electronic Chip Design
1.
2.
3.
4.
5.
6.
7.
8.
9.

Explain the three reasons which become the design bottlenecks, concerned with RF sections.
With neat block diagram compare digital RF system with Analog RF system.
Discuss the effects of Non Linearity in detail with example.
Discuss the condition to introduce zero inter symbol interface.
Write short notes on Random processes and noise.
Discuss the term probability density function and power spectral density by supporting mathematical equations.
Define the term Noise figure and discuss with mathematical equations the effect of noise figure on cascaded stages.
Prove the expression for spurious free dynamic range.
If receiver having the following specifications, calculate SFDR
i) NF = 9 dB
ii) PIP3 = -15 dBm
iii) B = 200 KHz
iv) SNRmin = 12 dB
10. Write short notes on passive impedance transformation.
Discuss the various forms of Analog modulation technique with supporting mathematical equations.
2 Explain the various essential concepts required for digital modulation technique.
11. By deriving a suitable expression, prove that the error rate depends on only the difference signal energy and the noise spectral density.
12. prove the following
(Pe)BPSK = Q((2Eb/No))
(Pe)BFSK = Q((Eb/No))
13. Write a detailed note on Quadrature modulation.
14. Write short notes on Non-coherent FSK detection and differential phase shift keying.
15. Discuss the following in detail.
a. Cellular systems
b. Co-channel interference
c. Hand- off
d. Path loss and multipath fading.
e. Diversity
f. Delay spread
g. Interleaving
16. Explain Time division multiple access, frequency division multiple access and code division multiple access.
17. Explain direct sequence CDMA and frequency hopping CDMA
18. Discuss various wireless standards.
19. Discuss in detail the various problems associated with heterodyne receiver.
20. Discuss in detail the various problems associated with homodyne receiver.
OR Why homodyne receiver has not taken upper hand when been compared
with heterodyne receiver.
HOME

17

Paper 5 (Elective II A)
PLD & FPGA
1.
2.
3.

What is a PLD? How are PLDs categorized?


What is the difference between Programmable logic array (PLA) and Programmable array logic (PAL)? Explain PAL in detail.
The pair of Boolean functions
a. f1 (w, x, y, z) = m (2, 4, 5, 10, 12, 13, 14)
b. f2 (w, x, y, z) = m (2, 9, 10, 11, 13, 14, 15)
are to be realized with a PLA having only true outputs. By considering just the Prime implicants of each individual function and the product function,
determine the minimal number of product terms needed for a realization. Draw the logic diagram of the realization in PLD notation and show the
corresponding PLA table.
4. Using the PAL device, draw the logic diagram of a realization in PLD notation for the following set of Boolean functions
a. f1 (x, y, z) = m (1, 2, 4, 6, 7)
b. f2 (x, y, z) = m (2, 4, 5, 6)
c. f3 (x, y, z) = m (1, 4, 6)
5. Compare CPLDs and FPGAs
6. Explain the features of Xilinx 3000 series FPGA
7. What are the advantages of one-hot state assignment?
8. Explain Altera MAX 7000 macro-cell.
9. Draw a state diagram for an FSM with an input gcnt and three outputs: x, y, and z. The xyz outputs generate a sequence called a Gray code in which exactly
one of the three outputs changes from 0 to 1 or from 1 to 0. The Gray code that the FSM should output is 000, 010, 011, 001, 101, 111, 110, 100, repeat. The
output should change only on a rising clock edge when the input gcnt = 1. Make the initial state 000.
10. Using the five step processor for designing a controller; convert the FSM of figure to a controller, implementing the controller using a state register and logic
gates.

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18

11.
12.
13.

14.
15.
16.
17.
18.
19.
20.

Create an FSM that has an input X and an output Y. whenever X changes from 0 to 1, Y should become 1 for five clock cycles and then return to 0-even if X is
still 1. Using the five step process for designing a controller, convert the FSM to a controller, stopping once you have created the state table.
Design a controller with a 4 bit state register that gets synchronously initialized to state 0101 when an input reset is set to 1.
Convert the following Mealy FSM to the nearest Moore equivalent.
Define the following with respect to clock,
a. Setup time
b. Hold time
c. Clock to Q
d. Cycle time
Elaborate clock distribution network with examples.
Define clock skew. Discuss the timing parameters of sequential circuits.
Explain pipelined system.
What is PLL? State the advantages and disadvantages of globally Asynchronous locally synchronous system.
Explain Behavioral, Data Flow and Structural model of VHDL. Write a VHDL program for Full Subtractor in Behavioral, Data Flow and Structural model.
Explain the comparison of sequential and concurrent statements.
Write a VHDL program for 8:3 encoder using with select and case statement.

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19

Paper 5 (Elective II B)
Low power VLSI design
1) (a). Explain the need for low power VLSI chips
(b). Explain the physics of power dissipation in CMOS devices
2) (a). Explain the emerging low power approaches
(b). Explain the sources of power dissipation on digital integrated circuits
3) (a). Write short notes on need for low power VLSI chips
(b). Write short notes on physics of power dissipation in CMOS devices
4) Write short notes on Emerging low power approaches
5) Write short notes on the Sources of power dissipation on digital integrated circuits
6) What are the applications of low power VLSI chips?
7) What do you mean by short circuit current in CMOS circuit?
8) Explain the dynamic dissipation in CMOS
9) (a). Write short notes on transistor sizing
(b). Write short notes on gate oxide thickness
10) Explain briefly about impact of technology scaling
11) (a). Write short notes on technology and device innovation.
(b). Write short notes on dynamic dissipation in CMOS circuits
12) What is the importance of transistor sizing with respect to low power circuits
13) Bring out the difference between static dissipation in CMOS circuits and dynamic dissipation in CMOS circuits?
14) Explain briefly about SPICE circuit simulation
15) Explain briefly about discrete transistor modeling and analysis
16) Draw and explain tabular transistor model
17) Explain briefly about switch level analysis
18) Explain briefly about gate level logic simulation
19) Write short notes on gate level capacitance estimation
20) Explain the architectural level analysis

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20

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21

Paper-1
Subject : Data Structure & System Software
Texts books(TB):
1.
2.
Hour

Data Structures in C and C++: Andrew S Tenenbaum


Design of Algorithms: Sahani
Date

35B

Time

36B

Chapter

37B

Main Topics
As per syllabus
Introduction

14-06-10

9.00-11.00

207B

2
2

15-06-10

17-06-10

2.00-4.00

11.30 1.30

Contents

38B

39B

(Mobile Communication and Internet Technologies

)
Expressions and Operators, Decision Control statements, Conditional
Operators, Loop Control Structures, Input and Output Statements, Functions,
Structures and Unions

208B

Stacks
Introduction to Stacks, Implementation of stack, Applications of stack, Infix to
Postfix conversions, Infix to Prefix conversions
Introduction to Queues, Implementation of Queues, Applications, Circular
Queues, Priority Queues, Linked List, Singly Linked List and Doubly linked
list, Implementation

Queues and Linked List

Recursion and Trees

Recursions with example, Factorial, Fibinoci, Tower Hanoi Problem,


Trees, Binary Tree, Tree traversals

Sorting Technique.

Bubble Sort, Selection Sort, Merge Sort, Quick Sort

Searching Technique

Searching Technique, Hashing, Sequential Search

Faculty In-charge: Prof. B.M. Sagar,


E Mail: [email protected]

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22

Paper-2
Subject : Mobile Computing
Texts books(TB):
3.
4.
5.
6.
7.
Hour

Jochen Schiller, Mobile Communications, Pearson 2004.


Rapaport: Wireless communication
Asoke Talukder & Roopa Yavagal Mobile Computing, McGraw-Hill Communications Engineering Publications
Mobile Computing And Wireless Communications by Amjad Umar
Principles of Mobile Computing and Communications by Mazliza Othman

Date

40B

Time

41B

Chapter

42B

Main Topics
As per syllabus
Introduction

Contents

43B

44B

14-06-10

11:30-1.30

222B

Wireless Transmission

16-06-10

9:00-11:00

Medium Access Control

17-06-10

2:00-4:00

Telecommunication
Systems

Satellite Systems

Applications, History of wireless communications, Applications of wireless technology,


A market for mobile communications, A simplified reference model
Frequencies for Radio Transmission, Standards and Regulations, Path Loss of Radio
Signals, Signal Propagation and Propagation Effects, Multipath Propagation, Space
division multiple access, Frequency division multiple access, Time division multiple
access, Spread spectrum, Frequency hopping and Direct Sequence Spread Spectrum
Systems, Cellular Systems, Modulation: Amplitude, Phase and Frequency Shift Keying,
Spread Spectrum,
Motivation, RF Link Quality, Hidden Node Problem, Near and Far Terminals,
Technical explanation, Analogies, Space division multiple access, Frequency division
multiple access, Time division multiple access, Aloha techniques, Aloha protocol,
Carrier sense multiple access, CSMA/CA and CSMA/CD, Demand assigned multiple
access, Packet reservation multiple access Inhibit Sense Multiple Access (ISMA)
GSM, System Architecture, The Switching System, Radio Interface, Handover, UMTS,
UMTS Architecture, UMTS Radio Interface, TETRA
History: International Communications, Applications, Basics, LEO, GEO, MEO,
Routing in Satellite Systems, Localization, Handover

Faculty In-charge: Prof. H.V. Kumara Swamy,


E-mail ID: [email protected]

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23

Paper-3
Subject: Data Communications
Texts books(TB):
Alberto Leon Garcia and Indra Widjaja , Communication Networks -Fundamental Concepts and Key architectures, Tata McGraw-Hill 2nd edition.
Behrouz A. Forouzan , Data Communications and Networking, Tata McGraw-Hill 3rd Edition .
William Stallings , Data and Computer Communication, Fifth Edition, Prentice Hall India.
William A. Shay, Understanding Data Communications and Networks, 2nd Edition, Thomson.
Godbole, Data Communications and Networks, Tata McGraw-Hill 2002.

1.
2.
3.
4.
5.

Hour

Date

Time

45B

46B

Chapter
1

Main Topics
As per syllabus
Communication
Networks and
Services

Applications
And Layered
Architectures

Protocols, Services and Layers, Characteristics of Protocols, Functions of Protocol,


Interfaces and Services, Services: Connection Oriented and Connectionless , HTTP,
DNS and SMTP, TCP and UDP Transport Layer Services

Applications
And Layered
Architectures

OSI Reference Model., Overview of TCP/IP Architecture, TCP/IP Protocol: How the
Application Layer Protocols and TCP/IP Utilities.

Digital
Transmission
Fundamentals - I
Digital
Transmission
Fundamentals II

Digital Representation of Information., Block-Oriented Information & Stream


Information, Digital Representation of Analog Signals., Bandwidth of Analog Signals,
Sampling of Analog Signals, Digital Transmission Of Analog Signals,
BTransmission of information, Nyquist Signaling Rate- Sampling:, Shannon Channel
Capacity, ASK, FSK, PSK QAM and Telephone Modem, Optical fiber waveguide,
Radio Transmission: The Electromagnetic Spectrum

Circuit
Switching
Networks

Multiplexing:, T1 carrier System (TDM), CCITT, SONET:

47B

Contents

48B

49B

14-06-10

16-06-10

2:00-4:00

11.30-1.30

4
3

18-06-10

9:00-11.00

Faculty In charge:
Prof. G. Sadashivappa
Prof. P. Nagaraju

Introduction to Communication and Communication Networks, , Telegraph Networks


and Message Switching, Telephone Networks and Circuit Switching, Internet,
Computer Networks and Packet Switching, Protocols, Terminal Oriented Networks ,
Computer Networks , Packet Switching

E-mail ID: [email protected] ,


E-mail ID: [email protected]
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24

Paper-4(Elective-1a)
Subject: Code Division Multiple Access
Texts books(TB):
1.
2.
3.
4.
Hour

W. Stallings, Wireless Communication and Networks, Prentice hall. 2002


T.S.Rappaport, Wireless Commn.: Principles & Practice. 2E, PHI, 2002
J.Schiller, Mobile Communications, Addision Wesley, 2000
Vijay K. Garg, IS-95 CDMA and CDMA2000: Cellular/PCS Systems Implementation, Pearson Education 2000
Date

50B

Time

51B

Chapter

52B

Main Topics
As per syllabus
Introduction to
Access Technologies

Contents

53B

54B

15-06-10

09:00-11:00

16-06-10

2.00-4.00

18-06-10

11:30-1:30

Major Attributes of CDMA Systems.,Third-Generation Systems.


Multiple Access Technologies.,Modes of Operation in Wireless Communications.

Direct Sequence
Spread Spectrum
and Spreading
Codes.
Diversity,
Combining, and
Antennas

Types of Techniques Used for Spread Spectrum., The Concept of Spread Spectrum
System.
The Performance of DSSS., Bit Scrambling., The Performance of a CDMA System.
Pseudorandom Noise Sequences.
Diversity Reception., Types of Diversity., Basic Combining Methods., BPSK
Modulation and Diversity., Examples of Base Station and Mobile Antennas.

IS-95 CDMA :
System Architecture
and Air Interface
Physical and
Logical Channels of
IS-95 CDMA.

TR-45/TR-46 Reference Model., Functional Model Based on Reference Model.,


Wireless Intelligent Network., TIA IS-95 CDMA System.

IS-95 CDMA Call


Processing and
Signaling
Applications.

CDMA Call Processing State., CDMA Registration., Authentication., Layered


Structure.
A-Interface,Roaming

Physical Channels., Modulation., Bit Repetition., Block Interleaving., Channel Coding.,


Logical Channels.

Faculty In charge: Prof. A. S. Pradeep.


E-Mail : [email protected]
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25

Paper-4(Elective-1b)
Subject : Multimedia Computing
Texts books(TB):
1 . Nalin K Sharad: Multimedia Information Networking, PHI, 2001.
2. K. R. Rao, Zoran S: Multimedia Communications, 2002.

Hour

Date

55B

Time

Chapter

Main Topics
As per syllabus
Introduction
58B

59B

15-06-10

09:00-11:00

259B

260B

Media and Data


Streams

16-06-10

2.00-4.00

Audio Tecnology

18-06-10

11:30-1:30

Graphics and Images

Multimedia Elements, Application, System Architecture, Evolving Technologies for


Multimedia; Defining objects to multimedia, Data Interface Standards , Need for data
compression, Multimedia Database.
All Medias, Presentation Space And Values, Presentation Dimensions , Discrete &
Continuous Media, Independence media, Computer controlled system, Integration;
Charactering Data Streams : All Transmission Modes; Charactering Continuous
Media Data Streams
Properties of Sound, Sound Perception and Psychoacoustics; Three Dimensional
Sound Projection, Audio Representation on Computers, Music and MIDI Standards;
Speech Signals and Speech Output; Speech Input,;
Speech Transmission, Capturing Graphics and Images, Computer Assisted
Graphics. Images Processing, Image properties , Reconstructing Images , Graphics
and Image Output Options.

Faculty In-charge: Prof. Smitha G.R


E Mail: [email protected]

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26

Paper-5(Elective-11 a)
Subject : JAVA & J2ME
Texts books(TB):
1. Patrick Naughton : The Java Hand Book, TMH, Eleventh Reprint, 2002
2. Herbert Schildt : The Complete Reference, TMH,Fourth Edition, 2002.
3. James Lee & Brent Ware : Open Source Web Development with LAMP using Linux, Apache, MySQL, Perl and PHP by James Lee and Brent Ware,
Addison Wesley/Person Education Inc. 2003
,
Hour
Date
Time
Chapter Main Topics
Contents
As per syllabus
1
15-06-10 11.30-1:30
1
Java Language
The Java Revolution Java Applets, Revolutionary Programming Language, Rich
Object Environment, Java Language Introduction- Hello World, Lexical Issues,
Variables, Types- Simple Types, Arrays, Classes-Object References, The new
operator, The Dot(.) Operator, Method Declaration, Constructors, Method
Overloading, Inheritance, Dynamic Method Dispatch, Abstract, Packages and
Interfaces- Packages, Interfaces.
2
Java Classes
String handling- Constructors, String syntax, Character Extraction, Comparison,
String Copy Modifications, Exception Handling Exception Types, try and Catch,
Multiple catch Clauses, Nested try Statements, Exception sub Classes, Threads and
Synchronization- Single Threaded Event Loop, The Java Thread Model, Input/
Output- File, Input Stream, Output Stream, File Streams, Applets- HTML Applet
Tag.
2
17-06-10 09:00-11:00
6
Java Language
Java Virtual Machine and bytecode, Classes, source and compilers, Class files,
loaders and compilers, Object orientation, Classes and instances, Object Oriented
techniques, Classes and Objects, Abstract classes, Interfaces, Polymorphism,
Dynamic dispatch, Error handling, Using inner classes.
7
Standard Libraries
Storing data in Java, Collections, Hashtable and HashMap, Vector and List,
Collections in Java 2, I/O Programming, GUI Programming, AWT, Swing.
3
18-06-10 2:00-4:00
3
Structural
The Web Explained- How It Works, Apache Web Server- Introduction, Starting,
Stopping and Restarting Apache, Configuration, Securing Apache, Create The
Website, Apache Log Files, MySQL- Introduction, Tutorial, Database
Independent Interface, Table Joins, Loading and Dumping a Database.
Faculty Incharge :

Prof. Rashmi R

E Mail : [email protected]
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27

Paper-5(Elective-11 b)
Subject: Wireless and ATM Network
Texts books(TB):
1.
2.
3.
4.
5.

Yi-Bing Lin, Imrich Chlamtac, Wireless and mobile network architectures, John Wiley, 2001
Kaveh Pablavan, P. Krishnamurthy, Principles of wireless networks, Pearson education, 2002
P. Venkataram, S. S. Manvi, B. P. Vijaykumar, WLANs: Architectures, Protocols and Applications, Pearson education (In Press), 2005
Marlyn Mallick, Mobile and wireless design essentials, Wiley, 2003
Wireless Network Security: Books: John R. Vacca by John R. Vacca.

Hour

Date

15-06-10

11.30-1:30

17-06-10

09:00-11:00

Mobility
Management

Handoff, Roaming management for SS and CT2, Handoff detection strategies,


Channel assignment, Link transfer types, Hard and soft handoff

IS-41 Signaling

Land mobile systems, IS-41 handoff, Handoff measurement, Authentication, CDPD


Architecture and CDPD Air Interface, Radio Resource allocation, GSM
Architecture

Data Services

GSM Short message services (SMS), HSCSD (High Speed Circuit Switched Data),
GPRS Architecture, GPRS Mobility Management

International
Roaming

GPRS Network Component, Architecture, Interfaces, WAP, International Roaming,


GSM to GPRS

18-06-10

Faculty In charge:

Time

2:00-4:00

Chapter

Prof. K.N.Rajarao
Prof. T. P. Mithun

Main Topics
As per syllabus
PCS
Architecture:

Contents
Cellular telephony, Advanced Mobile Phone Services (AMPS), Cordless telephony &
low tier PCS, 3rd & 4th , Generation wireless systems., Second Generation wireless
systems:, A Global System for Mobile Communication (GSM), IS-136 digital cellular
system:, IS-95 Digital Cellular System:, Cordless telephony and low tier PCS.,
Cellular Systems and Multiple Access :, Third generation and fourth generation
wireless systems, Beyond 3G

E-Mail : [email protected]
[email protected]
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28

ASSIGNMENTS QUESTIONS
Paper 1
Data Structure and System Software
Objective Questions
1. Which of the following operators in C programming languages takes only integer operands?
a. +
b. *
c. /
d. %
2. A structure brings together a group of
a. item of the same data type
b. Related data items and variables
c. Integer with user defined names d. none of these
3. If integer needs two bytes of storage, then maximum value of an unsigned integer is .
4. The statement printf (%f, 9/5); prints
a. 1.8
b. 1.0
c. 2.0

d. None of these

5. Bit filed is a
a. Field having many sub-fields
b. Structure declaring the sizes of the members in terms of bits
c. Members of a structure whose size is specified in terms of bits
d. None of these
6. If one wants to retain certain bits and invert the rest from a given bit pattern, then the correct masking operation is
a. or

b. and

c. exclusive or

d. complementation

7. The post-fix form of the following infix (A+B) * (C+D-E) *F is


8. Syntax of malloc and calloc functions
9. Syntax of Ternary operator
10. Example for typedef
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29

Write any [3] programs in the following list


1.
2.
3.
4.
5.

Write a program to find factorial of n


Write a program to check whether a number is even or odd by bit-wise operator
Write a program to check whether a number is prime or not
Print largest and smallest element in an array
Reverse a number

Write following programs:


1.
2.

Write a program to copy from source file to destination file. And read source file and destination file from command line arguments.
Write functions to find
a. String length
b. String copy
(Use Pointers for the string functions)

Answer the following


1.
2.
3.
4.
5.

Difference between arrays and Structures


Advantage of using pointers in C
Mention all storage class in C
Explain the modes in which file can be opened?
Differentiate between sprintf with printf and sscanf with scanf functions?

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30

Paper 2
Mobile Computing
1.

Discuss all possible applications of wireless networks and mobile communications you can think off.

2.

What are the various issues on which mobile communication market will depend?

3.

How the network model for structure communication different from the OSI reference model?

4.

What are the strategies of different network operators while migrating towards third generation systems? Why is a single common system not in sight?

5.

Explain pathloss of radio signals and the associated propagation effects?

6.

Explain Various multiple access schmes.

7.

Explain multipath propagation as associated with radio propagation.

8.

Explain Amplitude, Phase and Frequency Shift Keying techniques.

9.

What is Hidden Node Problem in 802.11 networks?

10. Which shared medium access control protocol is prevalent in wireless LANs? Explain?
11. What are three common characteristics of IEEE 802b, IEEE 811a, and IEEE 811g?
12. Explain CSMA/CA and CSMA/CD techniques.
13. Explain the difference b/w Call Establishment and Registration with relevant sequence diagrams.
14. How does GSM convert 456 bits of speech, data or control signals into a normal burst of 156.25 bits?
15. Draw diagrams illustrating the main components (network nodes and connections) of a GSM and UMTS system.
16. What is the basic difference in network architecture and services between GSM and GSM/GPRS system?
17. Why are GEO systems for Telecommunications currently being replaced by fiber optics?
18. Discuss various types of handovers and routing in case of satellite communications ?
19. What special problems do customers of a satellite system with mobile phones face if they are using it in big cities? Think of in-building use and skyscrapers.
20. Explain LEO, GEO and MEO satellites.

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31

Paper - 3
Data Communications
1.

Explain the following: Telegraph Networks and Telephone Networks.

2.

Describe and differentiate between Circuit Switching and Packet Switching.

3.

Briefly explain the Local area network, Metropolitan area network and wide area network. Compare them.

4.

Define Computer Network. Explain the role computer network in communication.

5.

a) Explain the features of the Terminal oriented networks.


b) Describe the various functions of the essential elements of a Network Architecture.

6.

a) Define and explain Protocols.


b) Define Services. Explain the various types of services.

7.

Define Protocol and explain the importance of the protocols in networks.

8.

Explain OSI model with functions of each layer with a neat block diagram.

9.

Describe the functions and applications of the following layers in an OSI reference model: i) Physical layer ii) Network layer iii) Transport layer.

10. Describe the functions and applications of the following layers in an OSI reference model: i) Application Layer ii) Presentation layer iii) Session layer.
11. Describe the functions and applications of all layers in TCP/IP model.
12.

a) Compare the functions of an OSI model with TCP/IP model.


b) Compare the applications of an OSI model with TCP/IP model.

13. Describe how all layers work together in TCP/IP model.


14. Describe the functions of various TCP/IP utilities.
15. a) Describe the various methods of digital representation of information.
b) Explain the basic properties of digital transmission systems.
16. Explain the sampling process of analog signals. Data is to be transmitted over the telephone network with channel bandwidth of 4000 Hz. Deduce the Nyquist
maximum data transfer rate C and the modulation efficiency B. Assume that data transmission scheme is with eight level per signaling element.
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32

17. Explain the following:


a) Bandwidth
b) Signal to Noise ratio
c) Quantization.
18. Describe types of Quantization. Compare Uniform and Non-uniform quantization.
19.

a) What is the bandwidth required to achieve a data rate of 8 Mbps using a channel with SNR of 24 dB.
b) Assuming that a PSTN has a bandwidth of 3000 Hz and a typical S/N power ratio of 20 dB, determine the maximum theoretical (data) rate that can be
achieved

20. a) Find the channel capacity of a standard 4 kHz telephone line with a 32dB signal-to-noise ratio.
b) Suppose that a low pass channel has a bandwidth of 1 MHz. What bit rate is attainable using 8 level pulses? What is the Shannon capacity of this channel if
the SNR is 20 dB.
21. Explain the frequency domain and time domain characterization of communication channels.
22. Describe the Frequency domain representation of a low-pass channel and sketch the amplitude response and phase shift functions of a low pass channel.

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33

Paper 4 (Elective I A)
Code Division Multiple Access (CDMA)
1.
2.
3.
4.
5.

What is Multiple Access? How are multiple access technologies classified?


Differentiate between the following modes of operation in wireless communications: TDD and FDD.
Compare TDMA, FDMA, CDMA technologies for multiple channel access.
Derive the expressions for SNR and Processing gain of a DSSS system.
Calculate the processing gain for a DSSS system that has a 10 Megachips per second (Mcps) code clock rate and 4.8kbps information rate. How much improvement
in the processing gain will be achieved if the code generation rate is changed to 50Mcps? Is there an advantage in going to a higher code generation rate with a
4.8kbps information rate.
6. Describe the working of a QPSK transmitter and derive an expression for the bit error probability.
7. Estimate the number of mobile users that can be supported by a CDMA system using an RF bandwidth of 2 MHz to transmit data at 10.4 KBPS. Assume the Eb/No
= 8dB; the interference from neighboring cells = 60%; voice availability factor = 50 %; power control accuracy factor = 0.9.
8. What is the role of PRN sequences in a CDMA system? List the properties of a Maximal length PR sequence.
9. Calculate the bandwidth efficiency of the system using the data given in Q6. and assuming an orthogonal code with K = symbols. If an orthogonal code with K = 16
symbols is used for the system, how many simultaneous mobile users can be supported and what is the bandwidth efficiency of the system?
10. A pseudo random sequence is generated using a feed back shift register of length m=5. The chip rate is 10 power 8 chips per second. Find the following
PN sequence length
Chip duration of PN sequence
PN sequence period
11. A direct sequence spread binary phase shift keying system uses a feedback shift register of length 17 for the generation of PN sequence. Calculate the processing
gain of the system.
12. A Spread spectrum communication system has the following parameters. Information bit duration Tb = 1.124 msecs and PN chip duration of 1.5secs. The average
probability of error of system is not to exceed 10-6. calculate a) Length of shift register b) Processing gain c) jamming margin
13. What is Diversity technique in wireless communication system? Describe the different types of diversity schemes.
14. What is Multipath? Describe any two effects of Multipath on mobile systems.
15. Write a note on smart antenna standards
16. Compare the bit error performance of BPSK modulation having SNR = 10dB with 2-branch diversity using selection, equal-gain and maximal ratio combining.
17. Derive the expression for total Probability of error of a Coherent BPSK system.
18. What is antenna diversity? How does it improve the performance of a wireless communication system?
19. What are smart antennas? How is intelligence built into antenna pattern?
20. With neat diagrams describe the working of Switched beam and Adaptive beam antennas.

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34

Paper 4 (Elective I B)
Multimedia Computing
1. What are the elements of Multimedia?
2. Briefly describe the applications of Multimedia.
3. Explain Multimedia Data Interface Standards.
4. What are JPEG and MPEG? Discuss the two standards in detail.?
1. Explain Information Exchange Media
2. What are presentation spaces and presentation values?
3. What are the presentation dimensions?
5. Describe the key properties of a multimedia system
6. Differentiate between strongly and weakly regular data streams
7. Differentiate between interrelated and non-interrelated periodic data streams.
8. What is an aperiodic data stream?
9. What is an irregular data stream?
10. Explain spatial sound and reflection systems.
11. What is MIDI? What are the various MIDI devices?
12. Explain sound concatenation in the time range
13. Explain sound concatenation in the frequency range
14. How is speech synthesized?
15. Explain different image compression formats .
16. How do you create graphics?
17. What are the steps involved in image processing?
18. Explain any three image segmentation method.
19. Explain the processes of image recognition with a neat diagram.
20. How is dynamic graphics different from static graphics?

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35

Paper 5 (Elective II A)
JAVA & J2ME
1.

What are the features of Java language?

2.

How are application programs different from Applets?

3.

What are the features of Object oriented Programming languages?

4.

What are the building blocks of a java program? Explain with structure of a java program.

5.

What are expressions? Briefly explain different types of expressions.

6.

Explain different types of Data Types in java language.

7.

Define classes and objects. Explain how do you instantiate objects?

8.

What is Method Overloading? How is it different from Method Overriding?

9.

What are Packages? How are they created? Explain the advantages of Packages.

10. How are interfaces helpful in implementing multiple inheritance? Explain.


11. How are strings stored in Java? Why strings are not null terminated?
12. Differentiate between String and StringBuffer class.
13. Explain different methods of StringBuffer class with examples.
14. Write a program to copy a file.
15. What is Exception handling? Explain different key words used in exception handling.
16. How can you create your own Exception? Explain in steps.
17. What are Threads? Write a program to demonstrate Priority of Threads.
18. With a neat diagram, explain the life cycle of threads.
19. Explain briefly, the Input/Output Streams and Reader/Writer classes.
20. What are Applets? Write a program to demonstrate life cycle of an Applet.

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36

Paper-5 (Elective II B)
Wireless and ATM Network
1. With the help of a neat diagram explain the concept of Cellular communication.
2. Discuss the non cellular mobile communication services.
3. What are the different systems in mobile communication, in what frequency Spectrums these fall.
4. What are the three generations that have passed by in cellular mobile?
5. Explain the difference between first and second-generation systems.
6. What is meant by multiple accesses, how these are combined with two way Communication in various cellular systems.
7. What is the basic architecture used in GSM, explain each layer.
8. What is the basic difference between 2G and 2.5G.
9. How 4G defers from 2G and 3G systems.
10. Why is SS7 classified as a common channel signaling protocol? What are the

main elements in the SS7 architecture? Describe them

11. Describe in detail the roaming management under SS7 with suitable diagram.
12. Explain the paging problems, Location Information Dissemination and Location

registration

13. Explain in detail the location management with suitable diagram


14. Describe in detail the inter BS handoff and intersystem handoff.
15. Describe in detail the types of handoff and basic CT2 system
16. Describe the channel assignment strategies and also discuss mobility problems.
17. Describe in detail the Roaming Management for CT2 and Handoff Detection Strategies
18. Explain in detail with suitable diagram the CDPD Architecture and CDPD Air Interface.
19. Discuss in detail the Authentication.
20. Describe with suitable figure the Land mobile systems and handoff measurement.

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37

0BD
ate

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38

Paper-1
Subject : Principles of Programming Languages
Texts books(TB):
1.
2.
3.
4.
5.
Hour
1

Programming Languages, design and implementation second edition by Terrence W. Pratt Pretice Hall of India pvt.ltd. New Delhi
Programming Language. Kenneth Louden, Principles and practices 2nd Edition.
Principles of Programming Languages: Design, Evaluation and Implementation: Books: Bruce J. MacLennan.
Principles of Programming Languages, Sriram Krishnamurthi Addision-Wesley
Principles of Programming Languages, M.L Scott, Pragmatics publisher.
Date

0B

14-06-10

Time

1B

9.00-11.00

Chapter

Main Topics
As per syllabus

Contents

Introduction

Brief history of programming language, Characteristics of programming language.

Programming
Language Processors

The structure and operation of a computer, Hardware and firmware computers,


Translators and simulator computers, Syntax, semantics and virtual computers,
hierarchies of computers, binding and binding time.

15-06-10

2.00-4.00

Elementary data
Types

Data object, variable and constants, data types, Specification of elementary data types,
declarations, type checking and type conversion, assignment and initialization, numeric
data types, Enumerations, Boolean, Characters.

17-06-10

11.30 1.30

Structured Data Types

Structured data object and data types, specification of data structure types,
implementation of data structure types, declarations and type checking for data structures.
vectors and arrays, record, character strings, variable sized data structures, pointers and
programmer-constructed data objects, sets, file and input/output.

Subprogram and
Programmer-Defined
Data Types

Evolution of the data type concept, Abstraction, encapsulation and information hiding,
subprogram, type definitions, abstract data types.

Faculty In charge:
Prof. Anala. M. R
E Mail : [email protected]

Prof. Hemavathy R
E Mail : [email protected]
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39

Paper-2
Subject :Operating Systems
Texts books ((TB):
1.
2.
3.
4.
5.

Hour

Operating Systems: Gary Nutt,3rd Edition, Pearson Education,2005.


Operating Systems: Deitel, Deitel and Choffnes,3rd Edition, Pearson Education,2004
Operating System Concepts: Silberschatz,6th Edition, John Wiley and Sons,2003
Modern Operating Systems(2nd Edition): Andrew Tanenbaum, Pearson publications
Operating Systems: Design and Implementation, Third Edition with Albert S. Woodhull

Date

75B

Time

76B

Chapter

77B

Main Topics
As per syllabus
Introduction

Contents

78B

79B

14-06-10

11:30-1.30

311B

2
2

16-06-10

9:00-11:00

3,4

17-06-10

2:00-4:00

Using The Operating


System
Operating system
organization, Device
Management
File Management

Software and Hardware, Operating System Strategies.


The Programmers Abstract machine, Resources,Processes and
Threads,Writing Concurrent Programs
Objects, I/O system, Device class Characteristics, Modern memory
Manager Strategies
File implementations, Abstractions, Abstract Machine Interface,The
process Abstraction

Faculty In charge: Prof.Sandhya. S


E Mail : [email protected]

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40

Paper-3
Subject : Software Engineering
Texts books(TB):
1.
2.
3.
4.
5.
Hour

Ian Sommerville, - Software Engineering - Pearson Education Asia.


Pressman R. S., - Software Engineering - McGraw Hill
Jalote P., - An Integrated approach to Software Engineering- Narosa
Shari Lawrence Pfleeger, - Software Engineering Theory and Practice- Pearson Education Asia.
Mall R, - Fundamentals of Software Engineering - Prentice Hall of India.
Date

80B

Time

81B

Chapter

82B

Main Topics
As per syllabus
Introduction

Contents

83B

84B

14-06-10

2:00-4:00

324B

325B

Requirements
Engineering

16-06-10

11.30-1.30

Software
Prototyping

18-06-10

9:00-11.00

Software Design

Introduction: FAQs about software Engineering, Professional and ethical responsibility.


Computer based system engineering: System modeling, System engineering process
Software processes: Software process models, Process iteration, Software specification,
Software design and implementation, Software validation, Software evolution, Automated
process support
Software requirements: Functional and non-functional requirements, User requirements,
System requirements, Software requirement specification
Requirements engineering processes: Feasibility studies, Requirements elicitation,
Requirements analysis, Communicating requirements, Requirements validation, Requirements
management
System models: Context models, Behavioral models, Data models, Object models, CASE
workbenches Software Prototyping: Prototyping in the software process, Rapid prototyping,
User interface prototyping Formal Specification: Formal specification in the software
process, Interface specification, Behavioral specification.Architectural design: System
structuring, Control models, Modular decomposition, Domain specific architectures.
Distributed systems architecture: Multiprocessor architectures, Client-server architectures,
Domain-specific architectures
Object-oriented design: Objects and object classes, An object oriented design approach,
Design evolution.Real-time software design: System design, Real time executives,
Monitoring and control systems.Design reuse: Component based development, Application
families, Design patterns.User interface design: User interface design principles, User
interaction, Information presentation, User support, Interface evaluation

Faculty In charge: Prof. Usha. B. A


E Mail : [email protected]

Prof. Shambhavi. B. R
E Mail : [email protected]
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41

Paper-4(Elective-I a)
Subject : System Simulation & Modeling
Texts books(TB):
1.
2.
3.
4.
5.
Hour

Jerry Banks, John S. Carson, Barry L. Nelson, David M. Nicol, Discrete-Event System Simulation, Third Edition, Prentice-Hall India
Averill M. Law, W. David Kelton, Simulation Modeling and Analysis, Third Edition,
McGraw-Hill.
Geoffrey Gordon, System Simulation, Second Edition, Prentice-Hall India.
Jerry Banks, John S. Carson, Barry L. Nelson, David M. Nicol Event System Simulation (3rd Edition)
An Introduction to System Simulation : Books : Howard T. Odum, Elisabeth C. Odum
Date

Time

Chapter

Main Topics
As per syllabus
Introduction To
Simulation

Contents

88B

89B

15-06-10

09:00-11:00

338B

16-06-10

18-06-10

2.00-4.00

11:30-1:30

339B

When Simulation is the Appropriate Tool; When Simulation Is Not Appropriate;


Advantages and Disadvantages of Simulation; Areas of Application; Systems and
System Environment; Components of a System; Discrete and Continuous Systems;
Model of a System; Types of Models; Discrete-Event System Simulation; Steps in a
Simulation Study.

Simulation Examples
Characteristics of Queuing Systems; Queuing Notation, Simulation of Queuing
Systems; Simulation of Inventory Systems.
Concepts in Discrete-Event Simulation: The Event-Scheduling / Time-Advance
Algorithm, World Views, Manual simulation Using Event Scheduling.

General Principles:

Random-Number
Generation:

Properties of Random Numbers; Generation of Pseudo-Random Numbers;


Techniques for Generating Random Numbers; Tests for Random Numbers. Tests
for Random Numbers

Random-Variate
Generation:

Inverse Transform technique: Exponential Distribution, Uniform Distribution,


Discrete Distributions; Acceptance-Rejection Technique: Poisson Distribution.

Faculty In charge: Prof. Soumya A


E Mail : [email protected]

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42

Paper-4(Elective-I b)
Subject : Multimedia Systems (ITCS142)
Texts books(TB):
1.
2.
3.

Ralf Steinmetz, Klara Narstedt, Multimedia Fundamentals: Vol 1-Media Coding and Content Processing, Pearson Education, 2004.
Prabhat K. Andleigh, Kiran Thakrar, Multimedia Systems Design, PHI, 2004.
Fred Halsall, Multimedia Communications, applications, networks, protocols, and standards, PearsonEducation, 2002.

Hour

Date

90B

Time

91B

Chapter
1

Main Topics
As per syllabus
Media and Data Streams

Multimedia System

Audio Technology

Music and MIDI


Standards

92B

Contents

93B

94B

15-06-10

16-06-10

18-06-10

09:00-11:00

2.00-4.00

11:30-1:30

Graphics and Images

Media: Perception Media, Representation Media, Presentation Media, Storage


Media, Transmission Media, Information Exchange Media, Presentation Spaces
& Values, and Presentation Dimensions; Key Properties of a multimedia system.
Discrete & Continuous Media, Independence Media, Computer Controlled
Systems, Integration; Characterizing Data Streams: Asynchronous
Transmission Mode, Synchronous Transmission Mode, Isochronous
Transmission Mode; Characterizing Continuous Media Data Streams.
Sound: Frequency, Amplitude, Sound Perception and Psychoacoustics; Audio
Representation on Computers; Three Dimensional Sound Projection;
Speech Signals; Speech Output; Speech Input; Speech Transmission.

Capturing Graphics and Images Computer Assisted Graphics , Graphics and


Image Processing; Reconstructing Images; Graphics and Image Output
Options.

Faculty In charge: Prof. Rajashree Shettar


E Mail : [email protected]
H

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43

Paper-5(Elective-II a)
Subject: Object oriented Analysis and design using UML
Text books (TB):
1.
2.
3.
4.
5.

Grady Booch, James Rumbaugh, Ivar Jacobson. The Unified Modeling Language User Guide, Pearson Education 2002.
Ian Sommerville, Software Engineering Sixth Edition 2003.
Meilir Page Jones, Fundamentals of Object Oriented Design in UML , Addison Wesley, 2000
James J. Odell by James J. Odell. Object-Oriented Analysis and Design Using UML
Agile Software Development, Principles, Patterns, and Practices by Robert C. Martin

Hour

Date

95B

Time

Chapter

Main Topics
As per syllabus
Object oriented Design
and Modeling

Contents

98B

99B

15-06-10

11.30-1:30

366B

Object oriented fundamentals, object and object classes, object oriented


design process, importance of modeling, principles of modeling, and object
oriented modeling.

Introduction to UML

Conceptual model of UML, building blocks of UML, Mechanisms in UML,


architecture, software development life cycle.

17-06-10

09:00-11:00

Classes and Objects

Basic Structural Modeling Classes, relationships, common mechanisms,


class and object diagrams.

18-06-10

2:00-4:00

Advanced structural
Modeling

Advanced classes, advanced relationships, Interfaces types and roles.


Packages, instances and object diagrams

Sequence Diagrams

Terms and concepts in sequence diagrams

Faculty In charge: Prof. Mari Kirthima. A


E Mail : [email protected]

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44

Paper-5(Elective-II b)
Subject : COMPILER DESIGN
Text Books:
1.
2.
3.
4.
5.
Hour

Compiler Construction Principles & Practice By Kenneth C Louden, International Student Edition, 2003, Vikas Publishing.
Compilers Principles Techniques & Tools By A V Aho, Ravi Sethi & J D Ullman
Engineering a compiler by Keith, D Cooper & Linda Torezon, Margan Kafmann publishers, First Indian reprint 2004
The Essence of Compilers by Robin Hunter, Pearson Education, First Indian Reprint 2004
The Art of Compiler Design: Theory and Practice by Thomas Pittman and James Peters.
Date

100B

Time

101B

Chapter

Main Topics
As per syllabus
Introduction to
Compilers

Contents

103B

104B

15-06-10

11.30-1:30

Lexical Analysis

17-06-10

09:00-11:00

Syntax Analysis

18-06-10

2:00-4:00

Top-Down parsing

Bottom-Up Parsing

Faculty In charge: Prof. Cauvery N K


E Mail : [email protected]

Introduction to Compilers, Overview of Compilers, Why Compilers? A brief


History, Program Related to Compilers, The Translation Process, Major
data structures in a Compiler, Other issues in compiler structure,
Bootstraping and porting, Compiler Construction Tools.
The Role of the Lexical analyser, The scanning process, regular expressions,
Finite Automata, From regular expressions to DFAs, Design of a Lexical
Analyser generator, Use of Lex to generate a Scanner Automaticall
The role of parser, The parsing process, Context-free grammars, parse tree
and Abstract syntax trees, Ambiguity, External Notations, EBNF and syntax
diagrams, Formal properties of context-free languages, The parser
Generator.
Top Down parsing by Recursive Descent, LL(1) parsing, First and Follow
sets, Error-recovery in Top Down parsers
Overview of Bottom-Up parsing, Finite Automata of LR(0) Items and LR(0)
Parsing, SLR(1) parsing

Prof. Usha. B. A
E Mail : [email protected]

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45

ASSIGNMENT QUESTIONS
Paper -1

Principles of Programming Languages


1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.

Write a brief note on History of Programming Languages


Explain the attributes of a good language , write the different issues to be considered in order to use standards effectively.
Write about Application Domains.
Write about the structure and operation of computer.
Discuss the Organization of a Conventional Computer and firmware computers.
Discuss in detail the Translator and Simulator computers.
What is Syntax and Semantics ? taking any two languages explain .
Explain layers of virtual computers in C.
Give a detail description on Virtual computers and language implementations.
Write the Importance of Binding times. How is binding times are classified ? Explain.
What are Data Objects ? A data object participates in various bindings during its life time, give description of this statement.
Give full description on Variables and Constants.
Under Specification of Elementary Data Types write about the following terms with examples.
Attribute.
Values
Operation
Subtypes

14.
15.
16.
17.
18.

Give a detail explanation on Implementation of Elementary Data Types.


Write a note on purposes of Declarations and Declaration of operations.
What is Dynamic type checking in Type Checking and Type Conversion? Give the advantages and disadvantages of it .
Discuss on Assignment and Initialization and Equality and equivalence.
Write a note on Specification and Implementation on the following:
Integers
Floating point real numbers
Fixed point real numbers
19. Write a note on Specification and Implementation on the following:
Enumeration.
Booleans
Characters.
20. Write the difference between
Equality and equivalence .
Assignment and Initialization.
Complex and rational numbers.
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46

Paper 2
Operating Systems
1. What is an Operating System?
2. Define,Compare and discuss the interdependability between the hardware and the software.
3. What do you mean by resources in a system.
4. What is a process. List the types.
5. Discuss threads and the types of threads.
6. What is a device Management?
7. What is memory management?
8. What do you mean by virtual memory?
9. What are the memory manager strategies?
10. What is a OS Kernel?
11. What are objects?
12. Write an example for concurrent programs in OS.
13. What are the different types of OS? Compare them.
14. What are the basic functions of OS organization?
15. What do you mean by the Address Space? How do the OS allot it?
16. What is a buffer in OS?
17. List the general implementation considerations in OS.
18. What is paging?
19. What do you mean by static and dynamic paging?
20. What is segmentation?

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47

Paper -3
Software Engineering
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.

Explain the major differences between software engineering and other traditional engineering disciplines. Distinguish between generic and customized software
products. Which one has larger share of market and why?
Distinguish between software product and software process. Explain the salient features of IEEE code of ethics.
Explain why it is important to produce an overall description of the system architecture at an early stage in the system specification process.
Explain the different generic models along with their merits and demerits.
Discuss the characteristics of a good process model. Should a development organization adopt a single process model for all its development projects? Discuss the
pros and cons.
Explain the characteristic features of a software requirements document
Describe the major activities of requirement engineering process.
Discuss VORD method in detail. Explain its advantages against other techniques.
Sometimes a customer requires a requirement that you know is impossible to implement. Should you agree to put the requirement in the SRS, thinking that you
might come up with a novel way of meeting it or that you will ask the requirement to be dropped later? Discuss the ethical implications of promising what you
know you cannot deliver.
Draw the data flow diagram for an ATM transaction.
Draw a data model of a Hospital Management System.
Draw DFD to represent the student registration process as described belowConsider registration of students for the different courses offered by the university. Each student has to register for the compulsory courses which are recommended
by their department. In addition every student has to take a fixed number of optional courses offered by the department. Every course has a fixed number of seats.
The students are given a registration card at the end of the registration process.
Draw a state diagram for a graphical user interface that has a main menu, a file menu with a file open command, and quit commands at each menu. Assume that
only one file can be open at a time.
Using prototyping how user can improve in its requirements specification? Explain.
What are the different types of prototyping approaches? Explain any one of them with neat figure.
What are the problems faced by the managers during delivering Throwaway prototype.
You have been asked to investigate the feasibility of prototyping in the software development process in your organization. Write a report for your manager about
the prototype to be used in the classes of projects by highlighting the benefits.
Under what circumstances would you recommend that prototyping should be used as a means of validating requirements?
Discuss prototypes using reusable components. Also suggest the problems encountered.

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48

Paper 4 (Elective I A)
System Simulation and Modeling
1.
2.
3.
4.

What is Simulation? When Simulation is the appropriate tool? When Simulation is not an appropriate tool?
What is a Model? Explain the different types of Models.
Explain with the flowchart the various steps involved in Simulation study.
Name several entities, attributes, activities, events and state variables for the following systems:
a. A small appliance repair shop.
b. A cafeteria.
c. A grocery store.
d. A Laundromat.
e. A fast-food restaurant.
f. A hospital emergency room.
g. A taxicab company with 10 taxis.
h. An automobile assembly line.
5. A small grocery store has one checkout counter. Customers arrive at this checkout counter at random from 1 to 8 minutes apart. Each possible value of
interarrival time has the same probability of occurrence, as shown in Table (1). The service times vary from 1 to 6 minutes with probabilities shown in
Table (2).
Table (1) Distribution of Time Between Arrivals
Time
between
Arrivals
(Minutes)
1
2
3
4
5
6
7
8

Probability

Cumulative
Probability

Random-Digit
Assignment

0.125
0.125
0.125
0.125
0.125
0.125
0.125
0.125

0.125
0.250
0.375
0.500
0.625
0.750
0.875
1.000

001-125
126-250
251-375
376-500
501-625
626-750
751-875
876-000

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Table (2) Distribution of Service-Time


Service
Time
(Minutes)
1
2
3
4
5
6

Probability

Cumulative
Probability

Random-Digit
Assignment

0.10
0.20
0.30
0.25
0.10
0.05

0.10
0.30
0.60
0.85
0.95
1.00

01-10
11-30
31-60
61-85
86-95
96-00

Develop the Simulation table and analyze the system by simulating the arrival and service of 20 customers.
Find the following:
a) Average waiting time for a customer.
b) Probability that a customer has to wait in the queue.
c) Fraction of the idle time of the server.
d) Fraction of the busy time of the server.
e) Average Service time.
f) Average time between arrivals
g) Average waiting time of those who wait.
h) Average time customer spends in the system.
6. Consider a drive-in restaurant where carhops take orders and bring food to the car.
Cars arrive in the manner shown in Table (1). There are two carhops- Able and
Baker. Able is better able to do the job and works a bit faster than Baker. The
distribution of their service times is shown in Table (2) and Table (3).
Table (1) Distribution of Time Between Arrivals of cars
Time
between
Arrivals
(Minutes)
1
2
3
4

Probability

0.25
0.40
0.20
0.15
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50

Table (2) Distribution of Service-Time of Able


Service
Time
(Minutes)
2
3
4
5

Probability
0.30
0.28
0.25
0.17

Table (3) Distribution of Service-Time of Baker


Service
Time
(Minutes)
3
4
5
6

Probability
0.35
0.25
0.20
0.20

Develop the Simulation table and analyze the system for a period of 1 hour.
Find the following:
a) Average waiting time for a customer.
b) Probability that a customer has to wait in the queue.
c) Fraction of the idle time of the server.
d) Fraction of the busy time of the server.
e) Average Service time.
f) Average time between arrivals
g) Average waiting time of those who wait.
h) Average time customer spends in the system.
7. In Problem 5, let the service distribution be changed to the following:
Service
Time
(Minutes)
Probability

0.05

0.10

0.20

0.30

0.25

0.10

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51

Develop the Simulation table and the analysis for 20 customers. What is the effect of changing the service-time distribution?
8. In Problem 5, determine the time-weighted-average number of customers in the system and the time-weighted-average number of customers waiting.
9. In Problem 6, change the arrival distribution of cars to the following:
Time
between
arrivals
(Minutes)
Probability

0.10

0.20

0.35

0.20

0.15

Develop the Simulation table and the analysis for a period of 1 hour. What is the effect of changing the arrival time distribution?
10. Consider the following continuously operating job shop. Interarrival times of jobs
are distributed as follows:
Time
between
arrivals
(Hours)
Probability

0.23

0.37

0.28

0.12

Processing times for jobs are normally distributed with mean 50 minutes and Standard deviation 8 minutes. Construct a simulation table, and perform a
simulation for 10 new customers. Assume that when the Simulation begins there is one job being processed (Scheduled to be completed in 25 minutes) and there is
one job with a 50- minute processing time in the queue.
a) What was the average time in the queue for the 10 new jobs?
b) What was the average processing time of the 10 new jobs?
c) What was the maximum time in the system for the 10 new jobs?

11.

Explain in detail the various steps used in Event-Scheduling/ Time Advance algorithm in a discrete event simulation with live example

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52

12. Explain the following concepts in Discrete-Event Simulation:


a) List
b) Delay.
c) Clock
d) Model.
e) System State.
13.

Explain Process-interaction and Activity-scanning approach.

14.Six dump trucks are used to haul coal from the entrance of a small mine to the railroad. Each truck is loaded by one of the two loaders. After loading, a truck
immediately moves to the scale, to be weighed as soon as possible. Both the loaders and the scale have a first-come, first-served waiting line ( or queue) for trucks.
Travel time from a loader to the scale is considered negligible. After being weighed, a truck begins a travel time(during which time the truck unloads) and then
afterward returns to the loader queue. Develop the model and give Event-logic diagrams for all the events.
15. What do you mean by World View? Discuss the various types of World Views.
16. Six dump trucks are used to haul coal from the entrance of a small mine to the rail- road. Each truck is loaded by one of two loaders. After loading, a truck
immediately moves to a scale to be weighed as soon as possible. Both the loaders and the scale have a FCFS waiting line for trucks. Travel time from a loader to the
scale is considered negligible. After being weighed a truck begins a travel time and then afterwards returns to the loader queue.
Develop the model for the problem.
Estimate loader and scale utilizations.
Note: Assume that 5 of the trucks are at the loaders and 1 is at the scale at time 0.
Consider the activity times as follows:
Loading time
Weighing Time
Travel Time

10
12
60

5
12
100

5
12
40

10
16
40

15
12
80

10
16

10

17. In the dump truck problem (Question 7), it is desired to estimate mean response time and the proportion of response times which are greater than 30 minutes. A
response time for a truck begins when the truck arrives at the loader queue, and ends when the truck finishes weighing. Add the model components and
cumulative statistics needed to estimate these two measures of system performance. Simulate for 8 hours.
18. Redo Example 2.4 (the (M, N) inventory system by a manual simulation using the event-scheduling approach.
19. Redo Example 2.2 (the Able-Baker carhop problem) by a manual simulation using the event-scheduling approach.
20. Bring out the important features of the three-phase approach. Explain the three-phase approach.

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53

Paper - 4 (Elective I B)
Multimedia Systems
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.

Define the term multimedia with suitable examples.


Explain the different types of media and give their representation.
What is meant by discrete media and continuous media give examples.
Identify five novel multimedia applications and list the novel feature in each one of them.
Suppose you are asked to design a multimedia kiosk which provides information regarding flight reservations. What are requirements you need to
gather to build this multimedia kiosk and what are the media you will be selecting to meet those needs.
What are the key properties of a multimedia system.
Differentiate between synchronous and asynchronous mode of data transmission.
Define all the properties of sound wave.
Define sampling and quantization of audio signals.
Write a note on sound perception.
Define the Nquist sampling theorem.
How is audio signal represented on computers?
What is MIDI? Explain.
What are the different types of MIDI messages? Explain.
Explain how speech signal is generated and transmitted.
What is meant by a MIDI Device?
Explain the components of speech transmission system.
Generate an image format converter which reads raw images and writes them as BMP format. The generated BMP file has to be readable by general image
viewer.
Explain the concept of Dithering.
Explain how raster scan display technology works.

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54

Paper 5 (Elective II A)
OOAD using UML
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.

What are Objects and classes? Explain with example.


What are the differences between procedure oriented and object oriented programming?
List the salient features and advantages of OOPs.
What are the terms OOA, OOD and OOP mean. Explain.
What is the importance of modeling? Explain.
What are Inheritance and polymorphism? Discuss.
What is a Use case diagram? Write the use case diagram of consultation of a patient in a hospital or a library system.
What is class diagram and object diagram? Draw the object and class diagram of a bank transaction.
What is a sequence diagram? Explain with example. Write a sequence diagram of ATM transaction.
What is a state chart diagram? Write the state diagram of operations of a Microwave oven.
Explain with example the waterfall model of SDLC and explain why it is called as waterfall model.
Explain Aggregation and association.
Write a note on Packages. Give the graphical representation of packages with a generalization example.
What are Instances? Explain the Terms and concepts that are essential to represent instances.

15. What are Interfaces? Explain with examples Types and Roles in interfaces.
16. Why collaboration diagram is called an interaction diagram? What are the guidelines for drawing collaboration diagrams?
17. For a Bank ATM transaction draw the collaboration diagram to depict the following scenarios:
a)

Invalid PIN use case: The ATM system asks for a pin from the client in order to proceed with his transactions. The system checks for the right PIN from its
database/server and if the user enters a invalid pin, the message is sent to the ATM machine by the server and this in turn is directed to the user.

b) Withdraw checking Use case: The ATM system, takes in the PIN of the Bank Client(customer) and waits for a selection of transaction. The BankClient
selects to withdraw amount from his checking account.
18. What is an activity diagram? Draw an Activity diagram for processing an order.
19. What are events and signals? Explain call events and synchronous call events.
20. What are process and threads? Explain
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55

Paper- 5 (Elective II B)
Compiler Design
1. Explain the working of two pass assembler.
2. Describe the concept of error detection and reporting in compiler.
3. Explain different compiler construction tools.
4. Classify the lexemes that make up the tokens in the following program.
Generate symbol table and literal table.
main ( )
{ float a[10], x;
int i;
for (i = 1; i < 10 ; i + +)
{
a [i] = 0;
Printf (%d; a [i]);
}
}
5. Write transition diagram to recognize relational operators in C.
6. Construct NFA and convert to DFA for the regular expression (b)+a(a/b/)
7.

Consider the grammar with productions


S A S1 S1 B
S1 a S1 b
A aAa
B bBb
And show the derivation for a a b b b
8. Show the following grammar is ambiguous
E E
E E+E
E E*E
E (E)
I abc
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56

9. Show the following grammar is ambiguous


S

A B a a B
A

aAa
B

b
And discuss importance of not having ambiguous grammar.
10. Remove left recursion from the following grammar and left factor it later
A

A c A a d b d A b d e
11. Explain working of a predictive parser
12. Calculate FIRST SET for the following grammar
E

T E1
1
E

+ T E1
T

F T1
T1

* F T1
F

(E) a b
13. Calculate the Follow Set for the above grammar
14. Design a predictive parser for the grammar given in Q. No. 12
15. Calculate the predictive parser for the grammar
S

a ^ (T)
T

T1 S S
16. Show the parsing for (a + b) * b for the grammar Q. No. 12
17. Construct LR (0) items for grammar
E(L)/a
L L,E/E
18. Construct LR (0) items for grammar
S A a b A cB cb B a
A d
B d
19. Consider the grammar with productions
S aAB
A bBb
B A
Show the derivation tree for a b b b b and also give rightmost and leftmost derivations.
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20. Consider the grammar with productions


S

A S1 S1 B
S1

a S1 b
A

aAa
B

bBb

And show the derivation for a a b b b

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