NAND Flash Part Numbering System

Micron's part numbering system is available at [Link]/support/designsupport/documents/png

MT 29F 2G 08 A A A A A WP - xx xx x ES : A
Micron Technology Design Revision (shrink)

Single-Supply Flash Production Status

29F = NAND Flash Blank = Production
29E = Enterprise NAND Flash ES = Engineering Samples
QS = Qualification Samples
Density MS = Mechanical Sample
1G = 1Gb
2G = 2Gb Features
4G = 4Gb E = Internal ECC enabled
8G = 8Gb M = Media
16G = 16Gb R = FortisFlash features
32G = 32Gb S = Security features
64G = 64Gb X = Product Longevity Program
128G = 128Gb Z = Polyimide (if applicable)
256G = 256Gb
384G = 384Gb Operating Temperature Range*
512G = 512Gb Blank = Commercial (0°C to +70°C)
1T = 1024Gb AAT = Automotive Grade (–40°C to +105°C)
1T2 = 1152Gb AIT = Automotive Industrial (–40°C to +85°C)
1HT = 1536Gb IT = Extended (–40°C to +85°C) (AKA ET)
2T = 2048Gb WT = Wireless Temp (–25°C to +85°C)
3T = 3072Gb *Wafers support only the 0°C to +70°C temperature range
4T = 4096Gb
6T = 6144Gb Speed Grade
Blank = Async only
Device Width 12 = 166 MT/s
01 = 1 bit 10 = 200 MT/s
08 = 8 bits 6 = 333 MT/s
16 = 16 bits 5 = 400 MT/s
37 = 533 MT/s
Level 3 = 667 MT/s
Mark Level
A SLC Package Code (dimensions in mm)**
C MLC-2 WP = 48-pin TSOP I (CPL version)
E MLC-3 WC = 48-pin TSOP I (OCPL version)
C5 = 52-pad VLGA, 14 x 18 x 1.0 (SDP/DDP/QDP)
Classification G1 = 272-ball VBGA, 14 x 18 x 1.0 (SDP, DDP, 3DP, QDP)
G2 = 272-ball TBGA, 14 x 18 x 1.3 (QDP, 8DP)
Mark Die nCE RnB IO Channels G6 = 272-ball LBGA, 14 x 18 x 1.5 (16DP)
A 1 0 0 1 H1 = 100-ball VBGA, 12 x 18 x 1.0
B 1 1 1 1 H2 = 100-ball TBGA, 12 x 18 x 1.2
D 2 1 1 1 H3 = 100-ball LBGA, 12 x 18 x 1.4 (8DP)
E 2 2 2 2 H4 = 63-ball VFBGA, 9 x 11 x 1.0
F 2 2 2 1 HC = 63-ball VFBGA, 10.5 x 13 x 1.0
G 3 3 3 3 H6 = 152-ball VBGA, 14 x 18 x 1.0 (SDP, DDP)
J 4 2 2 1 H7 = 152-ball TBGA, 14 x 18 x 1.2 (QDP)
K 4 2 2 2 H8 = 152-ball LBGA, 14 x 18 x 1.4 (8DP)
L 4 4 4 4 H9 = 100-ball LBGA, 12 x 18 x 1.6 (16DP)
M 4 4 4 2 J1 = 132-ball VBGA, 12 x 18 x 1.0 (SDP, DDP)
Q 8 4 4 4 J2 = 132-ball TBGA, 12 x 18 x 1.2 (QDP)
R 8 2 2 2 J3 = 132-ball LBGA, 12 x 18 x 1.4 (8DP)
T 16 8 4 2 J4 = 132-ball VBGA, 12 x 18 x 1.0 (SDP, DDP)
U 8 4 4 2 J5 = 132-ball TBGA, 12 x 18 x 1.2 (QDP)
V 16 8 4 4 J6 = 132-ball LBGA, 12 x 18 x 1.4 (8DP)
J7 = 152-ball LBGA, 14 x 18 x 1.5 (16DP)
Operating Voltage Ra J9 = 132-ball LBGA, 12mm x 18mm x 1.5mm (16DP)
A = VCC: 3.3V (2.70–3.60V), VCCQ: 3.3V (2.70–3.60V) **Wafers are available for some products, please contact
B = 1.8V (1.70–1.95V) Micron for more information.
C = VCC: 3.3V (2.70–3.60V), VCCQ: 1.8V (1.70–1.95V) All NAND packages are Pb-free.
E = VCC: 3.3V (2.70–3.60V), VCCQ: 3.3V (2.70–3.60V) or 1.8V (1.70–1.95V)
F = VCC: 3.3V (2.50–3.60V), VCCQ: 1.2V (1.14–1.26V) Interface
G = VCC: 3.3V (2.60–3.60V) , VCCQ: 1.8V (1.70–1.95V) Mark Interface
H = VCC: 3.3V (2.50–3.60V), VCCQ: 1.2V (1.14–1.26) or 1.8V (1.70–1.95V) A Async only
J = VCC: 3.3V (2.50–3.60V), VCCQ: 1.8V (1.70–1.95V) B Sync/Async
K = VCC: 3.3V (2.60–3.60V), VCCQ: 3.3V (2.60–3.60V) C Sync only
L = VCC: 3.3V (2.60–3.60V), VCCQ: 3.3V (2.60–3.60V) or 1.8V (1.70–1.95V) D SPI

Generation Feature Set

A = 1st set of device features
B = 2nd set of device features (rev only if different than 1st set)
C = 3rd set of device features (rev only if different)
D = 4th set of device features (rev only if different)
etc.

Rev. 1/25/2016

© 2016 Micron Technology, Inc.

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Products and specifications are subject to change without notice. Dates are estimates only.