PIC16F877A - ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE
The A/D module has four registers. These registers are:
• A/D Result High Register (ADRESH) - Bank 0
Analog input signal 10-bit binary digital number
• A/D Result Low Register (ADRESL) - Bank 1
• A/D Control Register 0 (ADCON0) - Bank 0
• A/D Control Register 1 (ADCON1) - Bank 1
ADCON0 Register
ADCS1 ADCS0 CHS2 CHS1 CHS0 GO/DONE ADON
bit 7-6 ADCS1:ADCS0 A/D Conversion Clock Select bits
bit 5-3 CHS2:CHS0 Analog Channel Select bits
1 = ADC in progress 0 = ADC not in progress
bit 2 GO/DONE A/D Conversion Status bit
1 = ADC module is 0 = ADC module is shut-
bit 0 ADON A/D On bit powered up off and consumes no
operating current
(** GO/DONE setting this bit starts the A/D conversion which is automatically cleared by hardware when the A/D
conversion is complete)
CHS2:CHS0 CHANNEL ADCON1 ADCON0 CLOCK
ADCS2 ADCS1:ADCS0 CONVERSİON
000 Channel 0 (AN0) 0 00 FOSC/2
001 Channel 1 (AN1) 0 01 FOSC/8
010 Channel 2 (AN2) 0 10 FOSC/32
011 Channel 3 (AN3) 0 11 FRC
100 Channel 4 (AN4) 1 00 FOSC/4
101 Channel 5 (AN5) 1 01 FOSC/16
110 Channel 6 (AN6) 1 10 FOSC/64
111 Channel 7 (AN7) 1 11 FRC
*FRC (clock derived from the internal A/D RC oscillator)
ADCON1 Register
ADFM ADCS2 PCFG3 PCFG2 PCFG1 PCFG0
1 = Right justified. Six 0 = Left justified. Six Least
bit 7 ADFM A/D Result Format Select bit Most Significant bits of Significant bits of ADRESL
ADRESH are read as ‘0’. are read as ‘0’
bit 6 ADCS2 A/D Conversion Clock Select bit
A/D Port Configuration Control
bit 3-0 PCFG3: PCFG0
bits
PCFG3: PCFG0 AN7 AN6 AN5 AN4 AN3 AN2 AN1 AN0 VREF+ VREF- C/R
0000 A A A A A A A A VDD VSS 8/0
0001 A A A A VREF+ A A A AN3 VSS 7/1
0010 D D D A A A A A VDD VSS 5/0
0011 D D D A VREF+ A A A AN3 VSS 4/1
0100 D D D D A D A A VDD VSS 3/0
0101 D D D D VREF+ D A A AN3 VSS 2/1
011X D D D D D D D D -- -- 0/0
1000 A A A A VREF+ VREF- A A AN3 AN2 6/2
1001 D D A A A A A A VDD VSS 6/0
1010 D D A A VREF+ A A A AN3 VSS 5/1
1011 D D A A VREF+ VREF- A A AN3 AN2 4/2
1100 D D D A VREF+ VREF- A A AN3 AN2 3/2
1101 D D D D VREF+ VREF- A A AN3 AN2 2/2
1110 D D D D D D D A VDD VSS 1/0
1111 D D D D VREF+ VREF- D A AN3 AN2 1/2
***A = Analog input - D = Digital I/O - C/R of analog input channels of A/D voltage references
ADRESH AND ADRESL REGISTERS
To do an A/D Conversion, follow these steps:
1. Initializing ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE: Configure the ADCON1 and ADCON0
2. Wait the required acquisition time.
3. Start conversion: Set GO/DONE bit
4. Wait for convertion to finish (wait for GO/DONE bit to clear)
5. Read A/D Result register pair (ADRESH:ADRESL)
;**************************************************
;Mevra Dilan Erten
;PIC16F877A - ADC
;**************************************************
list p=PIC16F877A
include p16f877A.inc
__config _hs_osc & _wdt_off & _pwrte_on & _lvp_off
errorlevel -302 ;Suppress bank warning
;**************** Label Definition *******************
cblock 0x20
dlow
dhigh
endc
;**************** Program Start *********************
org 0
goto main
org 4
goto int
;**************** Main Program *********************
main:
call init_gpio ;Inıtıalızıng General Purpose Input/Output
call init_CLCD
call ADCinit ;Inıtıalızıng Analog-to-Digital Converter (A/D) Module
loop:
call ADCread ;Read analog value and store
goto loop
;**************************************************
init_gpio:
....
....
....
return
;******************************************************
ADCinit:
banksel adcon1 ;SELECT BANK 1
movlw b'10001110'
movwf adcon1 ;RESULT IN LOW 10 BITS OF ADRESH - ADRESL / ONLY AN0 ANALOG / VREF+=VDD / VREF-=VSS
banksel adcon0 ;SELECT BANK 0
movlw b'10000001'
movwf adcon0 ;FOSC/32 - CHANNEL0(AN0)- A/D ON
call wait_for_40us
return
;**************************************************
ADCread:
banksel adcon0 ;SELECT BANK 0
bsf adcon0,2 ;START A/D CONVERSION. SET GO/DONE BIT
complete:
btfsc adcon0,2
goto complete ;WAIT FOR CONVERTION TO FINISH (WAIT FOR GO/DONE BIT TO CLEAR)
movf adresh,w ;MOVE ADRESH TO W
movwf dhigh
banksel adresl ;SELECT BANK 1
movf adresl,w ;MOVE ADRESL TO W
banksel adcon0 ;SELECT BANK 0
movwf dlow
return
;**********************************************
wait_for_40us:
....
....
....
return
;********************************************
int:
retfie
;*********************************************
end
