2064 IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 10, NO.

4, NOVEMBER 2014

A Brushless DC Motor Drive With Power Factor

Correction Using Isolated Zeta Converter
Vashist Bist, Student Member, IEEE, and Bhim Singh, Fellow, IEEE

Abstract—This paper presents a brushless dc (BLDC) motor [9], [10]. This suffers from high switching losses in three-phase
drive with power factor correction (PFC) for low-power applica- VSI due to high frequency switching of PWM signals. Such
tions. In this work, the speed of the BLDC motor is controlled by losses are reduced by operating the VSI in fundamental fre-
adjusting the dc link voltage of the voltage source inverter (VSI)
feeding a BLDC motor. Therefore, VSI is used for achieving only quency switching by electronically commutating the BLDC
an electronic commutation of the BLDC motor and operates in motor. Moreover, the speed is controlled by varying the dc
a low frequency switching for reduced switching losses. A PFC- link voltage of VSI [11]. This reduces the switching losses
based isolated zeta converter operating in discontinuous conduc- of VSI and eliminates the requirement of current sensors
tion mode (DCM) is used for controlling the dc link voltage of the for PWM-based current control of BLDC motor for speed
VSI with inherent PFC at ac mains using single voltage sensor. The
proposed drive is implemented to achieve a unity power factor at control [11].
ac mains for a wide range of speed control and supply voltage fluc- Power factor correction (PFC) converters are widely used
tuations. An improved power quality is achieved with power qual- for improving the power quality at ac mains. Various config-
ity indices within limits of IEC 61000-3-2 standard. urations of nonisolated and isolated PFC converter have been
Index Terms—Brushless dc (BLDC) motor, discontinuous reported in the literature for improving the power quality at ac
conduction mode (DCM), isolated zeta converter, power factor mains [12]–[14]. The cost of these PFC converters is primar-
correction (PFC), power quality, voltage source inverter (VSI). ily decided by the sensing requirements which in turn depend
upon the mode of operation of the PFC converter. Continuous
I. I NTRODUCTION conduction mode (CCM) and discontinuous conduction mode

B RUSHLESS dc (BLDC) motors are becoming popular

due to their advantages of high efficiency, high energy
density, high torque/inertia ratio, variable speed operation,
(DCM) are two modes of operation of a PFC converter. PFC
converter operating in CCM offers low stress on PFC converter
switches but requires sensing of supply voltage, dc link voltage,
and low electromagnetic interference (EMI) [1]–[6]. They and supply current, which is a costly option in terms of cost of
find applications in household appliances, medical equipments, sensors. However, PFC converter operating in DCM requires
robotics and automation, transportation, and industrial tools single voltage sensor for dc link voltage control, and inherent
[1]–[6]. The BLDC motor is a three-phase synchronous motor PFC is achieved at ac mains but at the cost of high stress on
with three-phase concentrated windings on the stator and per- PFC converter switches [13]. Therefore, this mode of operation
manent magnets on the rotor. It needs a three-phase voltage is limited to low-power applications.
source inverter (VSI) for achieving an electronic commutation A boost-PFC converter has been widely used for feeding
of BLDC motor based on the rotor position as sensed by Hall the BLDC motor drive for power quality improvements at
effect position sensors [1]–[6]. ac mains [15]–[17]. A constant dc link voltage is maintained
A diode bridge rectifier (DBR) with a high value of at the dc link capacitor of VSI, and PWM-based switching
smoothening capacitor is generally used for feeding the BLDC is used for the speed control of BLDC motor. This offers
motor. It draws a distorted supply current from ac mains due to high switching losses in the VSI due to high switching fre-
uncontrolled charging and discharging of the dc link capacitor quency of PWM signals and high cost associated due to a
[7]. Such type of supply current is highly distorted in nature and large number of sensors. Some configuration of a PFC-based
has a very high total harmonic distortion (THD) in the order BLDC motor drive using a single-phase PFC converter has
of 65%–70% which further leads to a poor factor (PF) in the been reported in [18]–[21]. A PFC-based Cuk converter feed-
order of 0.7–0.72 at ac mains. Such power quality indices are ing BLDC motor has been proposed in [18]. This configura-
not acceptable within the limits of international power quality tion uses a variable voltage control of VSI for speed control
standards such as IEC 61000-3-2 [8]. of BLDC motor, and hence operates the VSI in fundamen-
Another major problem in such drive is the cost of cur- tal switching frequency for reduced switching losses. But, a
rent sensors required for achieving the pulse width modulation CCM mode of operation of PFC Cuk converter is used, which
(PWM)-based current control of BLDC motor for speed control requires three sensors for voltage control with PFC at ac mains.
Manuscript received March 04, 2014; revised July 07, 2014; accepted This configuration is mainly suited for high-power applica-
July 27, 2014. Date of publication August 08, 2014; date of current version tions. Nonisolated bridgeless converters have been proposed in
November 04, 2014. Paper no. TII-14-0277. [19]–[21] for feeding BLDC motor but have high number of
V. Bist and B. Singh are with the Department of Electrical Engineering,
component count. Moreover, these configurations cannot be
Indian Institute of Technology Delhi, Hauz Khas, New Delhi 110016, India
(e-mail: [Link]@[Link]; bsingh@[Link]). used in many applications requiring a galvanic isolation for
Digital Object Identifier 10.1109/TII.2014.2346689 safety issues.

1551-3203 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See [Link] standards/publications/rights/[Link] for more information.

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BIST AND SINGH: BLDC MOTOR DRIVE WITH PFC USING ISOLATED ZETA CONVERTER 2065

Fig. 1. Proposed PFC-based isolated zeta converter fed BLDC motor drive.

II. P ROPOSED PFC-BASED BLDC M OTOR D RIVE W ITH intermediate capacitor (VC1 ) reduces, and the cur-
H IGH -F REQUENCY I SOLATION rent in output inductor (iLo ) and dc link voltage
Fig. 1 shows the proposed PFC-isolated zeta converter-fed (Vdc ) are increased as shown in Fig. 3.
Mode II: When switch (Sw ) is turned “OFF,” the current in
BLDC motor drive. A single-phase supply is used to feed a
magnetizing inductance (Lm ) of HFT and output
DBR followed by a filter and an isolated zeta converter. The fil-
ter is designed to avoid any switching ripple in the DBR and the inductor (Lo ) starts reducing. This energy of HFT
is transferred to the intermediate capacitor (C1 ),
supply system. An isolated zeta converter is designed to operate
and therefore voltage across it increases. Diode
in DCM to act as an inherent power factor corrector. This com-
bination of DBR and PFC converter is used to feed a BLDC (D) conducts in this mode of operation, and the
dc link voltage (Vdc ) increases as shown in Fig. 3.
motor drive via a three-phase VSI as shown in Fig. 1. The dc
link voltage of the VSI is controlled by varying the duty ratio Mode III: This mode is DCM such that the energy of HFT is
of the PWM pulses of PFC converter switch. However, VSI is completely discharged as shown in Fig. 2(c). The
intermediate capacitor (C1 ) and the dc link capac-
operated in a low frequency switching to achieve an electronic
commutation of BLDC motor for reduced switching losses. A itor (Cd ) supply the energy to the output inductor
single voltage sensor is used at the front-end converter for the (Lo ) and the load, respectively. Hence, the dc link
voltage (Vdc ) and intermediate capacitor’s voltage
control of dc link voltage for speed control of BLDC motor. The
proposed drive is designed and its performance is validated on (VC1 ) are reduced, and the output inductor current
a developed prototype for improved power quality at ac mains increases in this mode of operation as shown in
Fig. 3.
for a wide range of speed control and supply voltage variations.
Specifications of the BLDC motor selected for experimental
studies are given in Appendix. IV. D ESIGN OF I SOLATED PFC Z ETA C ONVERTER
An isolated PFC zeta converter is designed to operate in
DCM such that the current flowing in magnetizing inductance
III. O PERATION OF I SOLATED PFC Z ETA C ONVERTER
of HFT (Lm ) becomes discontinuous in a switching period. A
The operation of an isolated zeta converter is classified into PFC converter of 300 W (Pmax ) is designed for the selected
three different modes corresponding to switch turn-ON, switch BLDC motor (complete specifications are given in Appendix).
turn-OFF, and DCM. Three modes are shown in Fig. 2(a)–(c) For a wide range of speed control, the dc link voltage is con-
and their associated waveforms are shown in Fig. 3. These trolled from a low value of 50 V (Vdc min ) to a rated voltage
modes are described as follows. of 130 V (Vdc max ) with supply voltage variation from 170 V
Mode I: When switch (Sw ) is turned “ON,” a cur- (VS min ) to 270 V (VS max ).
rent in magnetizing inductance (Lm ) of high- The input voltage VS applied to the PFC converter as
frequency transformer (HFT) increases as shown √
VS (t) = Vm sin(ωL t) = 220 2 sin(314t)V (1)
in Fig. 2(a). The intermediate capacitor (C1 ) sup- √
plies energy to an output inductor (Lo ) and the where Vm is peak input voltage (i.e., 2VS ) and ωL = 2πfL ;
dc link capacitor (Cd ). Hence, voltage across fL is the line frequency, i.e., 50 Hz.

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2066 IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 10, NO. 4, NOVEMBER 2014

Fig. 3. Operating waveforms of an isolated zeta converter.

Since the speed of the BLDC motor is controlled by vary-

Fig. 2. Three modes of operation of an isolated zeta converter. ing the dc link voltage of the VSI, therefore, the instantaneous
power Pi at any dc link voltage (Vdc ) is taken as linear function
The instantaneous output voltage of DBR is given as of Vdc as
 √   
  Pmax
Vin (t) = |Vm sin(2πfL t)| = 220 2 sin(314t) V (2) Pi = Vdc (5)
Vdc max
where || represents the modulus function. where Vdc max represents maximum dc link voltage, and Pmax
The output voltage Vdc of an isolated zeta converter which is the rated power of the PFC converter.
belongs to a buck-boost category is given as [7] Using (5), the minimum power (Pmin ) corresponding to
  the minimum dc link voltage (Vdc min ) is calculated as
N2 D 115 W.
Vdc = Vin (3)
N1 (1 − D) The critical value of magnetizing inductance of the HFT
(Lmc ) is expressed as [13]
where D represents the duty ratio and N2 /N1 is the turns ratio
of the HFT which is taken as 1/2 for this application. 2  2 2
RL {1 − D(t)} Vdc {1 − D(t)}
The instantaneous value of duty ratio D(t) depends on the Lmc = =
2D(t)fS (N2 /N1 )
2 Pi 2D(t)fS (N2 /N1 )2
input voltage Vin (t) and required dc link voltage Vdc . An instan-
taneous duty ratio D(t) is obtained by substituting (2) in (3) and (6)
rearranging it as where RL represents the emulated load resistance, fs is the
Vdc Vdc switching frequency (which is taken as 20 kHz), and Pi is the
D(t) =   =  . instantaneous power.
N2
N1 Vin (t) + Vdc N2
N1 |Vm sin(ωt)| + Vdc The critical value of magnetizing inductance (Lmc ) is
(4) calculated for maximum current corresponding to lowest

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BIST AND SINGH: BLDC MOTOR DRIVE WITH PFC USING ISOLATED ZETA CONVERTER 2067

possible value of supply voltage, i.e., 170 V (Vs min ) using The worst case design occurs for the minimum value of dc
(6) as link voltage, i.e., 50 V (Vdc min ) and is expressed as
 2   
Vdc max (1 − Da )
2 Pmin 1
Lmc = Cd =
Pmax 2 Vdc min 2ω(ηVdc min )
2Da (t)fS (N2 /N2 )  
  115 1
1302 (1 − 0.5196)
2
= = 2441.6 µF.
= = 2.52 mH 50 2 × 314 × (0.03 × 50)
300 2 × 0.5196 × 20 000 × (0.5)2
(13)
(7)
Therefore, the dc link capacitor (Cd ) with a nearest possible
where Da (t) is the duty ratio calculated at dc link voltage
√ of value of 2200 µF is selected for this application.
130
√ V (V dc max ) and peak value of supply voltage of 170 2V A low-pass LC filter is used to avoid the reflection of higher
( 2 ∗ Vs min ) as 0.5196. order harmonics in supply system. The maximum value of filter
Hence, to achieve a DCM, the value of magnetizing induc- capacitance (Cmax ) is given as [23]
tance of HFT (Lm ) is selected lower than Lmc [22]. Therefore, √
the value of Lm is selected around 1/10th of Lmc , i.e., 250 µH Ipeak (Pmax 2/VS )
Cmax = tan(θ) = √ tan(θ)
to achieve a discontinuous current conduction. ωL V m ωL 2VS
√
The expression for calculation of output inductor is as [13] (300 2/220)
= √ tan(1◦ ) = 344.56 nF (14)
314 × 220 2
Vdc {1 − D(t)} Vdc {1 − D(t)}
Lo = = . (8) where θ is the displacement angle between the fundamental
fS ΔiLo fS (κIo )
component of supply voltage and supply current which is taken
This output inductor is designed for rated dc link voltage of as 1◦ . Thus, a filter capacitor Cf of 330 nF is selected.
130 V (Vdc max ) for a minimum value of duty ratio (Db√ ) cor- The value of filter inductor is designed by considering the
responding
√ to a peak of maximum supply voltage of 270 2V source impedance (Ls ) of 3% of the base impedance. Hence,
( Vs max ) as [13] the additional value of inductance required (Lf ) is given as
Lf = Lreq + Ls ⇒ Lreq = Lf − Ls
Vdc {1 − Db } 130{1 − 0.4051}   2
Lo = = = 4.188 mH 1 1 VS
fS (κIo ) 20 000 × (0.4 × 2.308) Lreq = − 0.03
(9) 4π fc Cf
2 2 ωL Po
1
where κ represents the percentage ripple of the output inductor =
4π 2 × (2000) × 330 × 10−9
2
current which is taken as 40% of output inductor current (κ).
  
Therefore, an output inductor of 4.2 mH is selected. 1 2202
−0.03 = 3.77 mH (15)
An expression for intermediate capacitor (C1 ) is as [13] 314 300
 
Vdc D(t) Vdc D(t) Pi where fc is the cutoff frequency which is selected such that
C1 = = √ (10) fL < fc < fS . Therefore, fc is taken as fS /10.
ΔVC (t)fS RL η{ 2VS + Vdc }fS Vdc2
This LC filter with inductance Lf and capacitance Cf is
where η is the permitted ripple voltage across intermediate selected as 3.77 mH and 330 nF, respectively.
capacitor and is taken as 10% of VC1 .
The intermediate capacitor (C1 ) is calculated at maximum
V. C ONTROL OF I SOLATED PFC Z ETA C ONVERTER -F ED
value of dc link voltage (Vdc ) as
BLDC M OTOR D RIVE
 
Vdc max Db (t) Pmax The control of the proposed PFC-based BLDC motor drive is
C1 = √ 
η 2VS max + Vdc max fS Vdc2 max divided into two categories: control of PFC converter for dc link
  voltage control and control of three-phase VSI for electronic
130 × 0.4051 300
=  √  = 456.6 nF. commutation of BLDC motor.
0.1 × 270 2 + 130 × 20 000 1302 (11)
A. Control of Front-End PFC Converter
Hence, an intermediate capacitor of 0.44 µF is selected for
the application. A voltage-follower approach is used for the control of iso-
The value of dc link capacitor (Cd ) is calculated as [13] lated zeta converter operating in DCM. This control scheme
  consists of a reference voltage generator, voltage error gener-
Idc Pi 1 ator, voltage controller, and a PWM generator. A “reference
Cd = = (12)
2ωΔVdc Vdc 2ω(ηVdc ) voltage generator” generates a reference voltage Vdc∗
by mul-
tiplying the reference speed (ω∗) with the motor’s voltage con-
where ΔVdc represents the permitted ripple in dc link voltage,
stant (kv ) as
η represents the percentage of permitted dc link voltage ripple
which is selected as 3% of Vdc min . Vdc∗ = kv ω ∗ . (16)

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2068 IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 10, NO. 4, NOVEMBER 2014

The “voltage error generator” compares this reference dc link

∗
voltage (Vdc ) with the sensed dc link voltage (Vdc ) to generate
an error voltage (Ve ) given as

Ve (k) = Vdc (k)∗ − Vdc (k) (17)

where “k” represents the kth sampling instance.

This error voltage Ve is given to a voltage PI (proportional-
integral) controller to generate a controlled output voltage (Vcc )
which is expressed as

Vcc (k) = Vcc (k − 1) + Kp {Ve (k) − Ve (k − 1)} + Ki Ve (k)

(18)

where Kp and Ki are the proportional and integral gains of the

PI controller (values are given in Appendix).
Finally, the PWM signal for switch Sw is generated by com-
paring the output of PI controller (Vcc ) with high-frequency
saw-tooth signal (md ) given as

if md < Vcc , then Sw = “ON”

(19)
if md > Vcc , then Sw = “OFF”
where Sw represents the gate signal to PFC converter
switch.
A rate limiter is also introduced for limiting the stator cur-
rents of the BLDC motor during step change in dc link voltage
for speed control. This rate limiter limits the rate of change of
duty ratio of PWM pulses which is to be given to the PFC con-
verter switch. The rising and falling slew rates of the rate limiter
are selected to limit the peak current within twice the rated cur-
rent of BLDC motor.

B. Control of BLDC Motor

Fig. 4. Performance of BLDC motor drive at rated load with supply voltage as
An electronic commutation of BLDC motor includes proper
220 V and dc link voltage as (a) 130 V and (b) 50 V.
switching of VSI in such a way that a symmetrical dc current
is drawn from the dc link for 120◦ and placed symmetrically for satisfactory operation of the BLDC motor [26]. Test results
at the centre of back-EMF of each phase [24], [25]. A Hall of proposed BLDC motor drive are discussed as follows.
effect position sensor is used to sense the rotor position on a
span of 60◦ ; which is required for the electronic commutation
of BLDC motor. As shown in Fig. 1, when two switches of A. Steady-State Performance of Proposed Drive
VSI, i.e., S1 and S4 are in conduction states, a line current iab Fig. 4(a) and (b) shows test results of BLDC motor drive
is drawn from the dc link capacitor whose magnitude depends operating at rated load with supply voltage as 220 V and dc
on applied dc link voltage (Vdc ), back EMF’s (ean and ebn ), link voltages of 130 and 50 V corresponding to the speed of
resistances (Ra and Rb ), and self and mutual inductance (La , BLDC motor as 1440 and 530 rpm, respectively. As shown in
Lb , and M ) of stator windings [18]. This current produces the these figures, the dc link voltage is maintained at desired ref-
electromagnetic torque (Te ) which in turn increases the speed erence value. Moreover, magnitude and frequency of the sta-
of the BLDC motor. tor current demonstrate the operation BLDC motor at different
speeds. A sinusoidal supply current in phase with supply volt-
VI. R ESULTS AND D ISCUSSION age is obtained which shows a near unity power factor at both
the values of dc link voltages. Table I shows a variation of speed
Performance of proposed drive is validated on a developed with BLDC motor corresponding to the reference dc link volt-
prototype of BLDC motor drive. A digital signal processor age and the voltage applied at the analog to digital converter
(DSP) is used for the development of proposed drive. An (ADC) of the DSP.
optoisolation is used between DSP and gate driver of VSI and
PFC switches. Hall signal filtering and power circuitries are
also developed for Hall effect position sensors. Moreover, a B. Performance of PFC-Isolated Zeta Converter
DSP-based moving average filter (MAF) is also designed for Fig. 5(a) and (b) shows the discontinuous current in a HFT
Hall signal filtering to obtain an improved rotor position sensing (iHFT p and iHFT s ) and its enlarged waveforms, respectively.

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BIST AND SINGH: BLDC MOTOR DRIVE WITH PFC USING ISOLATED ZETA CONVERTER 2069

TABLE I
S PEED OF BLDC M OTOR W ITH C HANGE IN DC L INK VOLTAGE

Fig. 6. Performance of proposed drive at rated condition with supply voltage

(vs ), supply current (is ), dc link voltage (Vdc ), and (a) output inductor current
(iLo ) and (b) intermediate capacitor voltage (VC1 ).

respectively. A peak voltage and current stresses of 400 V and

15 A are observed as shown in Fig. 7(b), which are acceptable
for a PFC converter of 300 W operating in DCM.

C. Dynamic Performance of the Proposed Drive

Fig. 8 shows the dynamic performance of the proposed
BLDC motor drive for various conditions of dc link voltages
and supply voltages. Fig. 8(a) shows the performance during
starting of BLDC motor at 50 V. A limited in-rush current
within the maximum current limit of stator windings is drawn
from dc link and supply system. As shown in obtained test
results, during an increase in dc bus voltage of the VSI, the
Fig. 5. Performance of the proposed drive at rated condition. (a) Current in magnitude and frequency of the stator current (ia ) of BLDC
high-frequency transformer and (b) its enlarged waveforms.
motor are increasing which confirms that the motor is gain-
ing speed. Fig. 8(b) shows dynamic performance during speed
This confirms the DCM operation of PFC-based isolated control corresponding to step change in dc link voltage. More-
zeta converter. Moreover, a continuous current in output side over, dynamic behavior of proposed drive during supply voltage
inductor (iLo ) and continuous voltage across the intermediate fluctuations corresponding to step change in supply voltage
capacitor (VC 1) are obtained as shown in Fig. 6(a) and (b), (270–200 V) is shown in Fig. 8(c). A smooth variation of
respectively. The voltage and current of PFC converter switch dc link voltage with limited stator current is obtained in all
and its enlarged waveform are shown in Fig. 7(a) and (b), mentioned cases, which demonstrate a satisfactory closed-loop

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2070 IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 10, NO. 4, NOVEMBER 2014

Fig. 7. (a) Performance of the proposed drive at rated condition showing sup-
ply voltage (Vs ), voltage, and current of the PFC converter switch and its
(b) enlarged waveforms.

performance of proposed BLDC motor drive. The controller

gains are given in Appendix.

D. PFC and Improved Power Quality

Fig. 9 shows obtained power quality indices demonstrating
the unity power factor of the proposed BLDC motor drive.
The performance indices such as ac mains voltage (vs ), ac
mains current (is ), active (Pac ), reactive (Pr ), and apparent (Pa )
powers, power factor (PF), displacement power factor (DPF),
and THD of supply current are measured on a “Fluke” make
PQ analyzer. Fig. 9(a)–(c) and (d)–(f) shows the test results
obtained for the proposed drive operating at rated load on Fig. 8. Dynamic performance of proposed drive during (a) starting at dc link
BLDC motor with supply voltage as 220 V and dc link volt- voltage of 50 V, (b) speed control for change in dc link voltage from 50 to
ages as 130 and 50 V, respectively. Moreover, Fig. 9(g)–(i) and 90 V, and (c) supply voltage fluctuation corresponding to step change in supply
voltage from 270 to 200 V.
(j)–(l) shows the performance of proposed drive at rated load on
BLDC motor with dc link voltage as 130 V and supply voltages
as 270 and 170 V, respectively. A unity power factor is obtained
in all mentioned cases with power quality indices under accept- VII. C ONCLUSION
able limits of IEC 61000-3-2 [8]. This demonstrates a satisfac- An isolated zeta converter-fed BLDC motor drive has been
tory performance in terms of improved power quality at varying proposed for targeting low-power household appliances. A vari-
speeds and different supply voltages. able dc link voltage of VSI feeding BLDC motor has been used

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BIST AND SINGH: BLDC MOTOR DRIVE WITH PFC USING ISOLATED ZETA CONVERTER 2071

Fig. 9. Measured power quality indices of proposed BLDC motor drive at rated load on BLDC motor with (a)–(c) Vs = 220 V and Vdc = 130 V, (d)–(f) Vs =
220 V and Vdc = 50 V, (g)–(i) Vs = 270 V and Vdc = 130 V, and (j)–(l) rated load on BLDCM with Vs = 170 V and Vdc = 130 V.

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[10] H. A. Toliyat and S. Campbell, DSP-based Electromechanical Motion [25] Q. Han, N. Samoylenko, and J. Jatskevich, “Average-value modeling of
Control. Boca Raton, FL, USA: CRC Press, 2004. brushless DC motors with 120◦ voltage source inverter,” IEEE Trans.
[11] T. Gopalarathnam and H. A. Toliyat, “A new topology for unipolar brush- Energy Convers., vol. 23, no. 2, pp. 423–432, Jun. 2008.
less DC motor drive with high power factor,” IEEE Trans. Power Elec- [26] P. Alaeinovin and J. Jatskevich, “Filtering of hall-sensor signals for
tron., vol. 18, no. 6, pp. 1397–1404, Nov. 2003. improved operation of brushless DC motors,” IEEE Trans. Energy Con-
[12] B. Singh et al., “A review of single-phase improved power quality vers., vol. 27, no. 2, pp. 547–549, Jun. 2012.
AC–DC converters,” IEEE Trans. Ind. Electron., vol. 50, no. 5, pp. 962–
981, Oct. 2003.
[13] B. Singh, S. Singh, A. Chandra, and K. Al-Haddad, “Comprehensive
study of single-phase AC–DC power factor corrected converters with Vashist Bist (S’13) received the Diploma and the
high-frequency isolation,” IEEE Trans. Ind. Informat., vol. 7, no. 4, B.E. degrees in instrumentation and control engi-
pp. 540–556, Nov. 2011. neering from Sant Longowal Institute of Engineering
[14] B. Singh and S. Singh, “Single-phase power factor controller topologies and Technology (SLIET Longowal), Punjab, India, in
for permanent magnet brushless DC motor drives,” IET Power Electron., 2007 and 2010, respectively. He is currently pursu-
vol. 3, no. 2, pp. 147–175, Mar. 2010. ing the Ph.D. degree in the Department of Electrical
[15] S. B. Ozturk, O. Yang, and H. A. Toliyat, “Power factor correction of Engineering, Indian Institute of Technology, Delhi,
direct torque controlled brushless DC motor drive,” in Proc. 42nd IEEE India.
IAS Annu. Meeting, Sep. 2007, pp. 297–304. His research interests include power electronics,
[16] C. H. Wu and Y. Y. Tzou, “Digital control strategy for efficiency opti- electrical machines, and drives.
mization of a BLDC motor driver with VOPFC,” in Proc. IEEE Energy
Convers. Congr. Expo. Conf. (ECCE), Sep. 2009, pp. 2528–2534.
[17] L. Cheng, “DSP-based variable speed motor drive with power factor cor-
rection and current harmonics compensation,” in Proc. 35th Intersoc.
Energy Convers. Eng. Conf. Exhibit (IECEC), 2000, vol. 2, pp. 1394– Bhim Singh (SM’99–F’10) received the Bachelor’s
1399. degree in electrical engineering from the University
[18] S. Singh and B. Singh, “A voltage-controlled PFC Cuk converter based of Roorkee, Roorkee, India, in 1977, and the [Link].
PMBLDCM drive for air-conditioners,” IEEE Trans. Ind. Appl., vol. 48, degree in power apparatus and systems and Ph.D.
no. 2, pp. 832–838, Mar./Apr. 2012. degree in electrical engineering from Indian Institute
[19] V. Bist and B. Singh, “A reduced sensor PFC BL-zeta converter based of Technology (IIT), New Delhi, India, in 1979 and
VSI fed BLDC motor drive,” Elect. Power Syst. Res., vol. 98, pp. 11–18, 1983, respectively.
May 2013. In 1983, he joined as a Lecturer with the
[20] B. Singh and V. Bist, “An improved power quality bridgeless Cuk con- Department of Electrical Engineering, University of
verter fed BLDC motor drive for air conditioning system,” IET Power Roorkee. He became a Reader in the same university
Electron., vol. 6, no. 5, pp. 902–913, 2013. in 1988. In December 1990, he joined as an Assistant
[21] V. Bist and B. Singh, “An adjustable speed PFC bridgeless buck-boost Professor with the Department of Electrical Engineering, IIT Delhi, where he
converter fed BLDC motor drive,” IEEE Trans. Ind. Electron., vol. 61, became an Associate Professor in 1994 and a Professor in 1997. His research
no. 6, pp. 2665–2677, Jun. 2014. interests include power electronics, electrical machines, electric drives, power
[22] D. S. L. Simonetti, J. Sebastian, and J. Uceda, “The discontinuous quality, flexible ac transmission systems (FACTS), high-voltage direct current
conduction mode Sepic and Cuk power actor preregulators: Analysis (HVDC) transmission systems, and renewable energy generation. He has been
and design,” IEEE Trans. Ind. Electron., vol. 44, no. 5, pp. 630–637, granted one U.S. patent and filed 10 Indian patents.
Oct. 1997. Prof. Singh is a Fellow of the Indian National Academy of Engineering
[23] V. Vlatkovic, D. Borojevic, and F. C. Lee, “Input filter design for power (INAE), the National Science Academy (NSc), the Indian Academy of Science
factor correction circuits,” IEEE Trans. Power Electron., vol. 11, no. 1, (IASc), the Institute of Engineering and Technology (IET), the Institution of
pp. 199–205, Jan. 1996. Engineers (India) [IE(I)], the World Academy of Sciences (FTWAS), the Indian
[24] J. S. Mayer and O. Wasynczuk, “Analysis and modeling of a single-phase National Science Academy (INSA), and the Institution of Electronics and
brushless DC motor drive system,” IEEE Trans. Energy Convers., vol. 4, Telecommunication Engineers (IETE).
no. 3, pp. 473–479, Sep. 1989.

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