UDN2987x-6

DABIC-5 8-Channel Source Driver

with Overcurrent Protection
Features and Benefits Description
▪ 4.75 to 35 V driver supply voltage Providing overcurrent protection for each of its eight
▪ Output enable-disable (OE/R) sourcing outputs, the UDN2987LW-6 driver is used as an
▪ 350 mA output source current interface between standard low-level logic and relays, motors,
▪ Overcurrent protected solenoids, LEDs, and incandescent lamps. This device includes
▪ Internal ground clamp diodes thermal shutdown and output transient protection/clamp diodes
▪ Output Breakdown Voltage 35 V minimum for use with sustaining voltages to 35 V.
▪ TTL, DTL, PMOS, or CMOS compatible inputs
In this driver, each channel includes a latch to turn off that
▪ Internal Thermal Shutdown (TSD)
channel if the maximum channel current is exceeded. All
channels are disabled if the thermal shutdown is activated. A
common FAULT output is used to indicate either chip thermal
Package: 20-pin SOICW (suffix LW) shutdown or any overcurrent condition. All outputs are enabled
by pulling the common OE/R input high. When OE/R ¯ is low,
all outputs are inhibited and the eight latches are reset. The
OE/R¯ function can be especially important during power-up,
in preventing floating inputs from turning on the outputs.
Under normal operating conditions, each of eight outputs
will source in excess of 100 mA continuously at an ambient
Not to scale
temperature of 25°C and a supply of 35 V. The overcurrent
fault circuit will protect the device from short-circuits to ground
with supply voltages of up to 30 V.

Continued on the next page…

Typical Application

IN1 OUT1
IN2 OUT2
IN3 OUT3
IN4 OUT4
2987 1 to 8 Load
CPU IN5 OUT5 Components
IN6 OUT6
IN7 OUT7
IN8 OUT8
FAULT GND
OE/R¯ VS

4.75 to 35 V

29876-DS, Rev. 6
 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

Description (continued)
The inputs are compatible with 5 and 12 V logic systems: TTL, The UDN2987LW-6 is supplied in a 20-lead small-outline (SOIC-W)
Schottky TTL, DTL, PMOS, and CMOS. In all cases, the output is plastic package. All packages are lead (Pb) free, with 100% matte-
switched ON by an active high input level. Compared to predecessor tin leadframe plating.
devices, the UDN2987LW-6 has a significantly faster TPHL (200 ns
typical) and a lower driver supply voltage rating (4.75 V), which
allows the use of 5 V logic.

Selection Guide
Part Number Packing Package
UDN2987LWTR-6-T 1000 pieces/13-in. reel 20-pin SOIC, wide body

Absolute Maximum Ratings

Parameter Symbol Notes Rating Units
Supply Voltage VS 35 V
Continuous Output Current* IOUT Outputs are disabled at approximately –500 mA –500 mA
FAULT Output Voltage VCE 35 V
FAULT Output Current IC 30 mA
Input Voltage VIN –0.3 to 14 V
Junction Temperature TJ 150 °C
Storage Temperature Range TS Range N –55 to 150 °C
Operating Temperature Range TA –20 to 85 °C
*For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection
Functional Block Diagram

VS

Thermal
Shut Down

OE/R¯ FAULT

<1Ω
+
–
R S
Q

IN1

OUT1

Driver 1 of 8 drivers

IN8 OUT8

GND

Pin-Out Diagram
Terminal List Table
Number Name Description
IN1 1 20 OUT1 1 IN1 Logic input 1
2 IN2 Logic input 2
2 19 OUT2
IN2
3 IN3 Logic input 3
IN3 3 18 OUT3 4 IN4 Logic input 4
5 IN5 Logic input 5
4 17 OUT4
IN4
6 IN6 Logic input 6
IN5 5 16 OUT5 7 IN7 Logic input 7
8 IN8 Logic input 8
IN6 6 15 OUT6
9 FAULT Fault output
IN7 7 14 OUT7 10 OE/ R̄¯ Logic input for Output Enable and Reset
11 VS Supply voltage
IN8 8 13 OUT8
12 GND Supply ground
x8
FAULT 9 OEN 12 GND 13 OUT8 Output 8 to load
OE

FF
14 OUT7 Output 7 to load
OE/R 10 SENSE N 11 VS
15 OUT6 Output 6 to load
16 OUT5 Output 5 to load
Dwg. PP-067
17 OUT4 Output 4 to load
18 OUT3 Output 3 to load
19 OUT2 Output 2 to load
20 OUT1 Output 1 to load

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

ELECTRICAL CHARACTERISTICS, valid at TA = 25°C, VOER = 2.4 V, VS = 35 V, unless otherwise noted

Characteristic Symbol Test Conditions Min. Typ.1 Max. Units
Supply Voltage Functional Range VS 4.75 — 35 V
Output Leakage Current2 IOUTCEX VIN = 0.4 V, all inputs simultaneously – 200 <–5.0 – μA
Output Sustaining Voltage VOUT(sus) IOUT = –350 mA, L = 2.0 mH 35 — — V
VIN = 2.4 V, IOUT = –100 mA — 1.6 1.8 V
Output Saturation Voltage VOUT(SAT) VIN = 2.4 V, IOUT = –225 mA — 1.7 1.9 V
VIN = 2.4 V, IOUT = –350 mA — 1.8 2.0 V
Channel Shut Down Threshold2 IM VIN = 2.4 V, Vs = 30 V – –500 – 370 mA
FAULT Leakage Current ICEX VCC = 35 V — <1.0 100 μA
FAULT Saturation Voltage VCE(SAT) IC = 30 mA — 0.3 0.8 V
VIN(ON) 2.4 — — V
Input Voltage
VIN(OFF) — — 0.4 V
VIN = 2.4 V — — 100 μA
IIN(ON) VIN = 5.0 V — — 600 μA
¯ pins
Input Current: INx, OE/R
VIN = 12 V — — 1000 μA
IIN(OFF) VIN = 0.4 V — — 15 μA
Clamp Diode Leakage Current IR VR = 35 V, TA = 70°C — — 50 μA
Clamp Diode Forward Voltage VF IF = 350 mA — 1.5 1.8 V
IS(ON) VIN = 2.4 V, all inputs simultaneously; outputs open — 7.0 18 mA
Supply Current
IS(OFF) VIN = 0.4 V, all inputs simultaneously — 6.0 12 mA
Thermal Shut Down TJTSD — 165 — °C
Thermal Hysteresis TJTSDhys — 15 — °C
Reset Pulse Duration tRPD 1.0 — — μs
tPLH VS = 35 V, RL = 100 Ω, CLOAD = 30 pF — 100 600 ns
Propagation Delay Time
tPHL VS = 35 V, RL = 100 Ω, CLOAD = 30 pF — 200 1000 ns
Blank Time tBLANK — 1.0 — μs
1Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for indi-
vidual units, within the specified maximum and minimum limits.
2For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

THERMAL CHARACTERISTICS
Characteristics Symbol Test Conditions Rating Unit
Package Thermal Resistance* RθJA Package LW, on 4-layer board based on JEDEC standard 48 °C/W
*Additional thermal information is available on the Allegro Web site.

Power Dissipation versus Ambient Temperature

4.0

3.5

3.0

2.5
Pa
PD (W)

(R cka
g
= e LW
QJ
2.0 A
48
ºC
/W
)
1.5

1.0

0.5

0
25 50 75 100 125 150
TA (°C)

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

Characteristic Performance

Output Current Waveshapes

VIN(A) = VIN(B)
tPLH tPHL
— tRTB
OE/R
Output (A) shorted
ISH
IOUT(A)
tBLANK
IM

IOUT(B)
Momentary fault or capacitive charging (<1μs)

Allowable Output Current as a Function of Duty Cycle

(Multiply by 78% for UDN2987LW-6)

TA= 25°C, VS = 35 V TA= 50°C, VS = 35 V

400 400
Quantity of outputs conducting simultaneously Quantity of outputs conducting simultaneously
8 7 6 5 4 3 8 7 6 5 4 3 2
350 350
Collector Current (mA)

Collector Current (mA)

300 300

250 250

200 200

150 150

100 100

50 50

0 0
0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100
Duty Cycle (%) Duty Cycle (%)

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

Applications Information and Circuit Description

As with all power integrated circuits, the UDN2987LW-6 pared to the voltage drop across a reference resistor with
has a maximum allowable output current rating. The a constant current. The two resistors are matched to
500 mA rating does not imply that operation at that value eliminate errors due to manufacturing tolerances or tem-
is permitted or even obtainable. The channel output current perature effects. Each channel includes a comparator and
trip point is specified as –370 mA, minimum; therefore, its own latch. An overcurrent fault (VSENSE > VREF) will
attempted operation at current levels greater than –370 mA set the affected latch and shut down only that channel.
may cause a fault indication and channel shutdown. The All other channels will continue to operate normally. The
device is tested at a maximum of –350 mA and that is the latch includes a 1 μs blanking delay, tBLANK, to prevent
recommended maximum output current per driver. It pro- unwanted triggering due to crossover currents generated
vides protection for current overloads or shorted loads up to when switching inductive loads. For an abrupt short circuit,
30 V. the blanking and output switching times will allow a brief,
¯ input high. permissible current in excess of the trip current before the
All outputs are enabled by pulling the OE/R
¯ is low or allowed to float (internal pull-down), output driver is turned off.
When OE/R
all outputs are inhibited and the latches are reset. Note that A common thermal shutdown disables all outputs if the
the reset pulse duration (OE/R¯ low) should be at least 1 μs. chip temperature exceeds 165°C. At thermal shutdown, all
This will ensure safe operation under attempted reset condi- latches are reset. The outputs are disabled until the chip
tions with a shorted load. The latches are also reset during cools down to approximately 150°C (thermal hysteresis).
power-up, regardless of the state of the OE/R ¯ input.
In the event of an overcurrent condition on any channel, or
The load current causes a small voltage drop across the chip thermal shutdown, the FAULT open-collector output is
internal low-value sense resistor. This voltage is com- pulled low (turned on).

Overcurrent Fault Sense Circuit

VS

+ +
Matched
VREF VSENSE

– –
To Fault Latch – SENSE

+
REF
ILOAD

IREF

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

Package LW, 20-pin SOIC-W

12.80±0.20
4° ±4 20
20
+0.07 2.25
0.27 –0.06

7.50±0.10 10.30±0.33 9.50

A
+0.44
0.84 –0.43

1 2
1 2 0.65 1.27
0.25

B PCB Layout Reference View

20X C SEATING PLANE
SEATING
0.10 C PLANE GAUGE PLANE

0.41 ±0.10 1.27 2.65 MAX

0.20 ±0.10
For Reference Only A Terminal #1 mark area
Dimensions in millimeters
B Reference pad layout (reference IPC SOIC127P1030X265-20M)
(Reference JEDEC MS-013 AC) All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions to meet application process requirements and PCB layout tolerances
Exact case and lead configuration at supplier discretion within limits shown

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 DABIC-5 8-Channel Source Driver
UDN2987x-6
with Overcurrent Protection

Revision History
Revision Revision Date Description of Revision
Rev. 6 April 30, 2012 Update product availability

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