AOTF4126

100V N-Channel MOSFET

SDMOS TM

General Description Product Summary

The AOTF4126 is fabricated with SDMOSTM trench VDS 100V

technology that combines excellent RDS(ON) with low gate ID (at VGS=10V) 27A
[Link] result is outstanding efficiency with controlled RDS(ON) (at VGS=10V) < 24mΩ
switching behavior. This universal technology is well RDS(ON) (at VGS = 7V) < 30mΩ
suited for PWM, load switching and general purpose
applications.

100% UIS Tested

100% Rg Tested

TO220F
Top View Bottom View D

G
S
D G S
G D
S

Absolute Maximum Ratings TA=25°C unless otherwise noted

Parameter Symbol Maximum Units
Drain-Source Voltage VDS 100 V
Gate-Source Voltage VGS ±25 V
Continuous Drain TC=25°C 27
ID
Current B TC=100°C 19 A
C
Pulsed Drain Current IDM 110
Continuous Drain TA=25°C 6
IDSM A
Current A TA=70°C 5
Avalanche Current C IAS, IAR 28 A
Avalanche energy L=0.1mH C EAS, EAR 39 mJ
TC=25°C 42
PD W
Power Dissipation B TC=100°C 21
TA=25°C 2.1
PDSM W
Power Dissipation A TA=70°C 1.4
Junction and Storage Temperature Range TJ, TSTG -55 to 175 °C

Thermal Characteristics
Parameter Symbol Typ Max Units
Maximum Junction-to-Ambient A t ≤ 10s 10 12 °C/W
RθJA
Maximum Junction-to-Ambient A D Steady-State 48.5 58 °C/W
Maximum Junction-to-Case Steady-State RθJC 2.9 3.5 °C/W

Rev0 : Sep 2011 [Link] Page 1 of 7

 AOTF4126

Electrical Characteristics (TJ=25°C unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

STATIC PARAMETERS
BVDSS Drain-Source Breakdown Voltage ID=250µA, VGS=0V 100 V
VDS=100V, VGS=0V 10
IDSS Zero Gate Voltage Drain Current µA
TJ=55°C 50
IGSS Gate-Body leakage current VDS=0V, VGS= ±25V 100 nA
VGS(th) Gate Threshold Voltage VDS=VGS, ID=250µA 2 3.3 4 V
ID(ON) On state drain current VGS=10V, VDS=5V 100 A
VGS=10V, ID=20A 19 24
mΩ
RDS(ON) Static Drain-Source On-Resistance TJ=125°C 36 43
VGS=7V, ID=15A 23.5 30 mΩ
gFS Forward Transconductance VDS=5V, ID=20A 34 S
VSD Diode Forward Voltage IS=1A,VGS=0V 0.66 1 V
IS Maximum Body-Diode Continuous Current 40 A
DYNAMIC PARAMETERS
Ciss Input Capacitance 1400 1770 2200 pF
Coss Output Capacitance VGS=0V, VDS=50V, f=1MHz 115 165 214 pF
Crss Reverse Transfer Capacitance 33 55 80 pF
Rg Gate resistance VGS=0V, VDS=0V, f=1MHz 0.3 0.65 1.0 Ω
SWITCHING PARAMETERS
Qg Total Gate Charge 22 28 34 nC
Qgs Gate Source Charge VGS=10V, VDS=50V, ID=20A 7 9 11 nC
Qgd Gate Drain Charge 6 10 14 nC
tD(on) Turn-On DelayTime 12 ns
tr Turn-On Rise Time VGS=10V, VDS=50V, RL=2.5Ω, 4 ns
tD(off) Turn-Off DelayTime RGEN=3Ω 17 ns
tf Turn-Off Fall Time 5 ns
trr Body Diode Reverse Recovery Time IF=20A, dI/dt=500A/µs 12 20 26 ns
Qrr Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs 60 82 110 nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.

COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.

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 AOTF4126

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

60 60
10V VDS=5V
8V
7V 50

40 40
ID (A)

ID(A)
6.5V 30

20 20
125°C
VGS=6V 10
25°C

0 0
0 1 2 3 4 5 3 4 5 6 7
VDS (Volts) VGS(Volts)
Fig 1: On-Region Characteristics (Note E) Figure 2: Transfer Characteristics (Note E)

30 2.4

Normalized On-Resistance 2.2

27 VGS=7V VGS=10V
2 ID=20A
Ω)

1.8
RDS(ON) (mΩ

24
17
1.6 5
21 1.4 2
VGS=7V 10
VGS=10V 1.2 ID=15A
18
1

15 0.8
0 5 10 15 20 25 30 35 40 0 25 50 75 100 125 150 175 200
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate Temperature (°C) 0
Voltage (Note E) Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)

50 1.0E+02
ID=20A 1.0E+01

40 40
1.0E+00
125°C
1.0E-01
IS (A)
Ω)
RDS(ON) (mΩ

125°C
30 1.0E-02
25°C
1.0E-03

20 1.0E-04
25°C 1.0E-05
0.0 0.2 0.4 0.6 0.8 1.0 1.2
10
VSD (Volts)
5 6 7 8 9 10 Figure 6: Body-Diode Characteristics (Note E)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)

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 AOTF4126

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

10 2500
VDS=50V
ID=20A
8 2000
Ciss

Capacitance (pF)
VGS (Volts)

6 1500

4 1000
Coss

2 500 Crss

0 0
0 5 10 15 20 25 30 0 20 40 60 80 100
Qg (nC) VDS (Volts)
Figure 7: Gate-Charge Characteristics Figure 8: Capacitance Characteristics

1000.0 1000

100.0 10µs 800 TJ(Max)=175°C

10µs
RDS(ON) TC=25°C
100µs
ID (Amps)

Power (W)

10.0 limited 600 17

1ms 5
1.0
DC 10ms 400 2
10
0.1 TJ(Max)=175°C 200
TC=25°C
0.0 0
0.01 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10
VDS (Volts) 0
Pulse Width (s)
Figure 9: Maximum Forward Biased Safe 18Junction-to-
Figure 10: Single Pulse Power Rating
Operating Area (Note F) Case (Note F)

10
D=Ton/T In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Zθ JC Normalized Transient

TJ,PK=TC+PDM.ZθJC.RθJC
Thermal Resistance

RθJC=3.5°C/W 40
1

0.1
PD
Single Pulse
Ton
T
0.01
0.00001 0.0001 0.001 0.01 0.1 1 10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)

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 AOTF4126

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

100 50
IAR (A) Peak Avalanche Current

TA=25°C
40

Power Dissipation (W)

30
TA=100°C
TA=150°C
20

10
TA=125°C

10 0
0.000001 0.00001 0.0001 0.001 0 25 50 75 100 125 150 175
Time in avalanche, tA (s) TCASE (°C)
Figure 12: Single Pulse Avalanche capability (Note Figure 13: Power De-rating (Note F)
C)

30 1000

25 TA=25°C
Current rating ID(A)

20 100
17
Power (W)

5
15
2
10 10 10

0 1
0 25 50 75 100 125 150 175 0.001 0.1 10 0
1000
TCASE (°C) Pulse Width (s) 18
Figure 14: Current De-rating (Note F) Figure 15: Single Pulse Power Rating Junction-to-
Ambient (Note H)

10
D=Ton/T In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Zθ JA Normalized Transient

TJ,PK=TA+PDM.ZθJA.RθJA
Thermal Resistance

1 RθJA=58°C/W 40

0.1

0.01 PD
Single Pulse
Ton
T
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note H)

Rev 0 : Sep 2011 [Link] Page 5 of 7

 AOTF4126

TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS

300 15 24 2
di/dt=800A/µs 125ºC 1.8
125ºC 20 di/dt=800A/µs
250 12 1.6
1.4
16 trr 25ºC
200 9 1.2
Qrr (nC)

trr (ns)
25ºC

Irm (A)
12 1

S
Irm
150 6 0.8
125ºC
8
0.6
S 125ºC
100 3 0.4
Qrr 4
25ºC 0.2
25ºC
50 0 0 0
0 5 10 15 20 25 30 0 5 10 15 20 25 30
IS (A) IS (A)
Figure 17: Diode Reverse Recovery Charge and Peak Figure 18: Diode Reverse Recovery Time and
Current vs. Conduction Current Softness Factor vs. Conduction Current

150 30 30 3
Is=20A 26 Is=20A
125ºC 125ºC 2.5
120 24
22
2
90 18 18
Qrr (nC)

25ºC 25ºC trr

trr (ns)
Irm (A)

14 1.5

S
60 Qrr 125ºC 12
10
1
6
30 25ºC 6 125ºC
Irm 0.5
2 S
25ºC
0 -2 0 0
0 200 400 600 800 1000 0 200 400 600 800 1000
µs)
di/dt (A/µ µs)
di/dt (A/µ
Figure 19: Diode Reverse Recovery Charge and Peak Figure 20: Diode Reverse Recovery Time and
Current vs. di/dt Softness Factor vs. di/dt

Rev 0 : Sep 2011 [Link] Page 6 of 7

 AOTF4126

Gate Charge Test Circuit & Waveform

Vgs
Qg
10V
+
VDC
+ Vds Qgs Qgd
- VDC

DUT -
Vgs

Ig

Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds

90%
DUT
+ Vdd
Vgs VDC

Rg - 10%

Vgs Vgs t d(on) tr t d(off) tf

t on toff

Unclamped Inductive Switching (UIS) Test Circuit & Waveforms

L 2
Vds E AR = 1/2 LIAR BVDSS

Id Vds

Vgs + Vdd I AR
Vgs VDC

Rg - Id

DUT
Vgs Vgs

Diode Recovery Test Circuit & Waveforms

Vds + Q rr = - Idt
DUT
Vgs

t rr
Vds - L Isd IF
Isd dI/dt
+ Vdd I RM
Vgs VDC
Vdd
Ig
- Vds

Rev 0 : Sep 2011 [Link] Page 7 of 7