ER1731 – Digital Electronics and Programmable Systems.
Digital Logic Systems 4 – Combinational Logic Design
Carl Berry
[email protected]
Where opportunity creates success
ER1731 - Digital Electronics and
Programmable Systems
For the Degree Apprenticeship Programme
Knowledge, Skills and Behaviours underpinned during this
session
Apprentice Standard Knowledge, Skills and Behaviour
Electrical/Electronic Technical Support K6, K8
Engineer
Circuits from expressions
• One to have a go at for next week:
• ( A . C ) + ( B . C ) + (A . B . C)
• Using only 2 input gates.
• Bonus Question to try:
• Does ( X + Y ) = ( X + Y )
Circuits from expressions
• ( A . C ) + ( B . C ) + (A . B . C)
Circuits from expressions
• However we now know how to simplify.
• ( A . C ) + ( B . C ) + (A . B . C)
• A.C + !B + !!C + !A.B.C – Demorgan’s Theorem
• A.C + !B + C + !ABC
• !B + C + !ABC - (A.C + C = C)
• !B + C
Circuits from expressions
• Does (!X+!Y) = !(X+Y) ?
X Y !X !Y !X+!Y X Y X+Y !(X+Y)
0 0 1 1 1 0 0 0 1
0 1 1 0 1 0 1 1 0
1 0 0 1 1 1 0 1 0
1 1 0 0 0 1 1 1 0
• No they are opposites.
Exercise to do over the week:
iii) A.C.D + !A.B.C.D
• C.D.(!AB+A) - AB+AC = A(B+C)
• C.D.(B+A) - !A.B+A = B+A
• C.D.B + C.D.A
In This Material
In this section we are going to look at how to:-
Identify a Sum-of-Product (SOP) expression.
Derive the SOP expression of a truth table.
Derive a Karnaugh Map from a truth table or logic expression.
Use the Karnaugh map as a tool to simplify and design logic circuits.
Use the Karnaugh map to derive a logic circuit using NAND gates only or NOR
gates only.
Introduction
• The output of a combinational logic circuit at any time depends on the combination
of the current logic levels at the inputs.
• A Sum-of-Product (SOP) expression consists of two or more AND terms (often
referred to as products) that are OR’ed (summed) together.
• A Product-of-Sums (POS) expression is the opposite where we have two or more OR
terms that are AND’ed together. This is less common so we will be concentrating on
SOP.
Simplifying a Logic Expression
• Once the expression has been obtained either from the problem description or a
given circuit diagram, it may be possible to reduce it to a simpler form containing
fewer terms or fewer variables in one or more of the terms.
• The new expression can then be used to implement a circuit that is equivalent to the
original circuit but which contains fewer gates and interconnections.
• The Boolean algebra theorems (previous lecture) can be used to simplify the
expression. Unfortunately, it is not always obvious which theorem should be applied
to produce the simplest expression.
Simplifying a Logic Expression
• In general there are two essential steps:-
1) the original expression is put into SOP form through:-
i. Repeated application of DeMorgan’s theorems and..
ii. Multiplication of terms
2) In the SOP form the terms are checked for common factors. Hopefully factoring
will eliminate one or two terms.
Simplifying a Logic Expression
• Examples
• Z = A.B.C + A.!B.!(!A.!C)
• Z = A.B.C + A.!B.(!!A+!!C) – (Inverse of an AND is equal to OR sum of the inverts)
• Z = A.B.C + A.!B.(A+C) – (cancel double inversions)
• Z = A.B.C + A.!B.A + A.!B.C – (multiply out)
• Z = A.B.C. + A.!B + A.!B.C – (A.A=A)
• This is now in SOP form (3 AND terms OR’ed together)
• We can now try to simplify
• Z = A.C.(B+!B) + A!B – (1st and 3rd terms have A.C in common, so factor those out)
• Z = A.C.(1) + A.!B – (B+!B = 1)
• Z = A.C + A.!B
• Z = A.(C+!B) – Factor out A. This is the final result.
Simplifying a Logic Expression
• Examples
• Z = A.!B.!C + A.!B.C + A.B.C
• This is already in SOP form.
• There are two ways to go from here:
• Method 1
• Z = A.!B.(!C+C) + A.B.C – (first two terms have A.!B in common so factor out)
• Z = A.!B.(1) + A.B.C – (!C+C = 1)
• Z = A.!B + A.B.C
• Z = A.(!B+B.C) – (Factor A out)
• Z = A.(!B+C)- (From last week !X+X.Y = !X+Y)
Simplifying a Logic Expression
• Method 2
• Z = A.!B.!C + A.!B.C + A.B.C
• First two terms have A.!B in common (method 1) but also the last two have A.C I common.
• We can rewrite the expression (using both terms) as
• Z = A.!B.!C + A.!B.C + A.!B.C + A.B.C
• We’ve added an extra term, A.!B.C, we can do this because it’s already in the expression and A.!B.C + A.!B.C
= A.!B.C
• Z = A.!B.(C+!C) + A.C.(!B+B) – (Factor out A.!B)
• Z = A.!B.1 + A.C.1
• Z = A.!B + A.C
• Z = A.(!B + C)
• Same as method 1 (which is what we’d expect).
Simplifying a Logic Expression
• One to try for yourselves for next week:
• Z = !A.C.!(!A.B.D) + !A.B.!C.!D + A.!B.C
• Hint : Start with DeMorgan’s theorem on the first term.
Designing Combinational Logic Circuits
• Create a truth table based on the problem statement(s)
• Example: three switches are used to indicate the status of a car’s driver door, ignition and headlights. Design
a circuit to generate a logic ‘1’ alarm signal when either of the following conditions exists:-
a) Headlight on and ignition off ‘1’
or
b) Door open and ignition on
• D = 1 (door open) D = 0 (door closed); Door
• I = 1 (ignition on) I = 0 (ignition off);
Ignition Alarm
• L = 1 (lights on) L = 0 (lights off);
Lights
‘0’
Designing Combinational Logic Circuits
D I L A
0 0 0 0
0 0 1 1 !D.!I.L
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 1 D.!I.L
1 1 0 1 D.I.!L
1 1 1 1 D.I.L
So the expression for this circuit is !D.!I.L + D.!I.L + D.I.!L + D.I.L
Minimising the Expression
• !D.!I.A + D.!I.L + D.I.!L + D.I.L
• !I.L.(!D+D) + D.I.!L + D.I.L – (1st and 2nd term contain !I.L)
• !I.L.(1)+D.I.!L + D.I.L
• !I.L + D.I.!L + D.I.L
• !I.L + D.I.(!L+L) – (2nd and 3rd term contain D.I)
• !I.L + D.I.(1)
• !I.L + D.I
Drawing the circuit
• !I.L + D.I
I
L !I.L
D.I
D
I
NAND and NOR
• For many technologies (including CMOS (Complementary Metal-Oxide Semiconductor) and TTL (Transistor
Transistor Logic)) NAND and NOR gates are the simplest. It is therefore often desirable to convert the sum of
product (or POS) logic expression to NAND (or NOR) form.
• We can convert ANDs and ORs to either NANDs or NORs
NAND equivalent of OR
NAND equivalent of AND
NAND and NOR
NOR equivalent of OR
NOR equivalent of AND
Karnaugh Maps
• SOP (and POS) methods for simplification can be a bit tricky
• There are no hard and fast rules on how to approach simplifying a circuit
• It comes down to experience and perseverance
• But there is another way, Karnaugh Maps.
• Karnaugh Maps are a graphical way of simplifying a logic circuit or turning a truth table into a logic circuit.
• Karnaugh Maps do struggle with lots of inputs, anything beyond 4 is general left up to computer programs to
solve.
• They represent relationship between logic inputs in the same way that truth tables do.
• Karnaugh Maps are 2D arrangements where vertical and horizontal squares differ only by one variable.
• This will be important later but it means that they must be labelled in a particular order.
Karnaugh Maps – 2 input example.
Truth Table
Karnaugh Map
A B X
!B B
0 0 1
!A 1 0
0 1 0
1 0 0 A 0 1
1 1 1
Karnaugh Maps – 3 input example.
Truth Table
Karnaugh Map
A B C X
0 0 0 1 !C C
0 0 1 1 !A!B 1 1
0 1 0 1
0 1 1 0 !AB 1 0
1 0 0 0
AB 1 0
1 0 1 0
1 1 0 1 A!B 0 0
1 1 1 0
Karnaugh Maps – 4 input example.
Truth Table
A B C D X
Karnaugh Map
0 0 0 0 0
0 0 0 1 1
0 0 1 0 0
!C!D !CD CD C!D
0 0 1 1 0
0 1 0 0 0
0 1 0 1 1 !A!B 0 1 0 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
!AB 0 1 0 0
1 0 0 1 0
1 0 1 0 0
AB 0 1 1 0
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1 A!B 0 0 0 0
1 1 1 0 0
1 1 1 1 1
Using Karnaugh Maps - Looping
• We look for instances of 1’s in the map that are adjacent (either vertically or horizontally).
• From this we can write down the terms.
!C!D !CD CD C!D • For the example here :
• !A!BCD + !A!BC!D + A!B!C!D + A!BC!D
!A!B 0 0 1 1 • We can then use SOP to simplify but
Karnaugh Maps offer a more structured
!AB 0 0 0 0 method.
AB 0 0 0 0
A!B 1 0 0 1
Karnaugh Maps - Looping
• First we look for 1’s that have no adjacent 1’s. !C!D !CD CD C!D
• Note that 1’s on the edge loop round.
• EG. !A!B 0 0 1 1
• In the map on the right the two 1’s in yellow are adjacent
and so are the two in green. !AB 0 0 0 0
• So for this grid there are no isolated 1’s. AB 0 0 0 0
• Any isolated 1 is a term we can’t simplify.
A!B 1 0 0 1
• For the 1’s here they are both in pairs.
• If we look at the yellow pairing we can see that the only
variable that changes is D.
• This group doesn’t care about the value of D (it has no effect).
• So we can see that the value for this grouping is !A!BC.
• Similarly for the green group the only variable that changes is C.
• So this grouping is A!B!D.
• The final circuit is therefore !A!BC + A!B!D
• This only works because of the specific labelling of the rows and columns.
Karnaugh Maps – Looping
• The next to check for is a quad (group of 4). !C!D !CD CD C!D
• Again we are looking for variable that do not change within the
group. !A!B 0 0 0 0
• In the example of the right this is B and !C.
• Therefore the circuit is X=B!C !AB 1 1 0 0
• A group of 4 will always remove 2 variables.
AB 1 1 0 0
A!B 0 0 0 0
• This leaves the Octets (groups of 8). !C!D !CD CD C!D
• In the example on the right there is a group that wraps around
both edges of the table. !A!B 1 0 0 1
• Here the only variable that does not change is !D
• Therefore the circuit is X=!D !AB 1 0 0 1
• A group of 8 will always remove 3 variables.
AB 1 0 0 1
A!B 1 0 0 1
Karnaugh Maps – An Example
!C!D !CD CD C!D
!A!B 0 0 0 1
!AB 0 1 1 0
AB 0 1 1 0
A!B 0 0 1 0
• Here we have 3 loops, a 1, a 2 and a 4 (notice that ABCD is part of 2 separate loops)
• The 1 loop gives us : !A!BC!D
• The 2 loop gives us : ACD
• The 4 loop gives us : BD
• So the circuit is !A!BC!D + ACD + BD
Karnaugh Maps – One to try for next week
!C!D !CD CD C!D
!A!B 0 1 1 0
!AB 1 0 0 1
AB 0 0 0 0
A!B 0 1 1 0
Karnaugh Maps – Don’t Care Conditions
• Sometimes in a logic circuit design certain combinations of input will never occur; it does not matter
whether the output is HIGH or LOW for these don’t care conditions.
• The output for a don’t care condition is represented by a ‘X’ in a truth table or K-map.
• In the reduction process, the ‘X’ condition can be looped as though it is a ‘1’ if it contributes to a simpler
expression. Leaving it un-looped means that the output will be 0 if the don’t care condition does occur.
• It’s not always obvious which value to set a don’t care condition to.
• The aim is to produce the simplest circuit.
